CN108415867B - Signal processing method and processing system of electronic equipment - Google Patents
Signal processing method and processing system of electronic equipment Download PDFInfo
- Publication number
- CN108415867B CN108415867B CN201810208012.1A CN201810208012A CN108415867B CN 108415867 B CN108415867 B CN 108415867B CN 201810208012 A CN201810208012 A CN 201810208012A CN 108415867 B CN108415867 B CN 108415867B
- Authority
- CN
- China
- Prior art keywords
- signal
- external
- equipment
- interfaces
- electronic device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
- G06F13/4068—Electrical coupling
- G06F13/4072—Drivers or receivers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
- G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0026—PCI express
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Information Transfer Systems (AREA)
Abstract
The present disclosure provides a signal processing method of an electronic device, the electronic device including a Basic Input Output System (BIOS), the method being applied to the BIOS, the method including: detecting whether the electronic equipment is connected with external equipment or not, wherein the external equipment comprises a plurality of interfaces; under the condition that the electronic equipment is connected with external equipment, converting a first signal of the electronic equipment into at least one second signal, wherein the first signal comprises a plurality of paths of PCIE signals, and the second signal comprises a plurality of paths of PCIE signals and/or a single path of PCIE signal; and transmitting the at least one second signal to the external device, wherein the at least one second signal is used for enabling at least one interface of the plurality of interfaces of the external device to be in a communicable state with the electronic device. The present disclosure also provides a signal processing system of an electronic device.
Description
Technical Field
The present disclosure relates to a signal processing method and a processing system of an electronic device.
Background
With the rapid development of electronic technology, various electronic devices are increasingly applied to many scenes such as life and work. The electronic device gradually develops towards the portable electronic device, that is, the internal structure of the electronic device becomes more and more compact, and the size of the electronic device becomes smaller and smaller. However, as electronic devices are increasingly miniaturized, their functional components are reduced due to size limitations. Therefore, how to expand more functions on electronic equipment with compact structure and small size becomes a problem which needs to be solved urgently.
Disclosure of Invention
One aspect of the present disclosure provides a signal processing method of an electronic device, the electronic device including a basic input output system BIOS, the method being applied to the BIOS, the method including: the method comprises the steps of detecting whether the electronic equipment is connected with external equipment or not, wherein the external equipment comprises a plurality of interfaces, converting a first signal of the electronic equipment into at least one second signal under the condition that the electronic equipment is connected with the external equipment, wherein the first signal comprises a plurality of paths of PCIE signals, the second signal comprises a plurality of paths of PCIE signals and/or a single path of PCIE signal, and transmitting the at least one second signal to the external equipment, wherein the at least one second signal is used for enabling at least one interface of the plurality of interfaces of the external equipment to be in a communication state with the electronic equipment.
Optionally, the electronic device includes a high-speed solid state disk interface, the multiple interfaces of the external device include a first interface, and the connecting the electronic device with the external device includes: the electronic equipment is connected with a first interface of the external equipment through the high-speed solid state disk interface.
Optionally, the above-mentioned multiple interfaces of the external device include at least one second interface, and the transmitting the at least one second signal to the external device includes: and transmitting the at least one second signal to at least one second interface of the external equipment.
Optionally, the at least one second signal enables at least one of the plurality of interfaces of the external device to be in a communicable state with the electronic device, including: the method comprises the steps of converting a first clock signal corresponding to a first signal into at least one second clock signal and transmitting the at least one second clock signal to an external device under the condition that the electronic device is connected with the external device, and enabling at least one interface of a plurality of interfaces of the external device to be in a communicable state with the electronic device through the at least one second signal and the at least one second clock signal.
Optionally, the detecting whether the electronic device is connected to an external device includes: when the electronic equipment detects the equipment information of the external equipment, determining that the electronic equipment is connected with the external equipment.
Another aspect of the present disclosure provides a signal processing system of an electronic device including a basic input output system BIOS, the system comprising: the device comprises a detection module, a conversion module and a transmission module. The detection module detects whether electronic equipment is connected with external device, external device includes a plurality of interfaces, conversion module under the electronic equipment is connected with external device, will electronic equipment's first signal converts into at least one second signal, wherein, first signal includes multichannel PCIE signal, the second signal includes multichannel PCIE signal and/or one-way PCIE signal, the transmission module will at least one second signal transmission extremely external device, wherein, at least one second signal is used for making external device at least one interface among a plurality of interfaces with electronic equipment is in can communication state.
Optionally, the electronic device includes a high-speed solid state disk interface, the multiple interfaces of the external device include a first interface, and the connecting the electronic device with the external device includes: the electronic equipment is connected with a first interface of the external equipment through the high-speed solid state disk interface.
Optionally, the above-mentioned multiple interfaces of the external device include at least one second interface, and the transmitting the at least one second signal to the external device includes: and transmitting the at least one second signal to at least one second interface of the external equipment.
Optionally, the at least one second signal enables at least one of the plurality of interfaces of the external device to be in a communicable state with the electronic device, including: the method comprises the steps of converting a first clock signal corresponding to a first signal into at least one second clock signal and transmitting the at least one second clock signal to an external device under the condition that the electronic device is connected with the external device, and enabling at least one interface of a plurality of interfaces of the external device to be in a communicable state with the electronic device through the at least one second signal and the at least one second clock signal.
Optionally, the detecting whether the electronic device is connected to an external device includes: when the electronic equipment detects the equipment information of the external equipment, determining that the electronic equipment is connected with the external equipment.
Another aspect of the disclosure provides a non-volatile storage medium storing computer-executable instructions for implementing the method as described above when executed.
Another aspect of the disclosure provides a computer program comprising computer executable instructions for implementing the method as described above when executed.
Drawings
For a more complete understanding of the present disclosure and the advantages thereof, reference is now made to the following descriptions taken in conjunction with the accompanying drawings, in which:
fig. 1 schematically illustrates an application scenario of a signal processing method and a processing system for an electronic device according to an embodiment of the present disclosure;
FIG. 2 schematically shows a flow chart of a signal processing method for an electronic device according to an embodiment of the present disclosure;
FIG. 3 schematically shows a block diagram of a signal processing system for an electronic device according to an embodiment of the disclosure; and
FIG. 4 schematically shows a block diagram of a computer system for signal processing of an electronic device according to an embodiment of the disclosure.
Detailed Description
Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. It should be understood that the description is illustrative only and is not intended to limit the scope of the present disclosure. In the following detailed description, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of the embodiments of the disclosure. It may be evident, however, that one or more embodiments may be practiced without these specific details. Moreover, in the following description, descriptions of well-known structures and techniques are omitted so as to not unnecessarily obscure the concepts of the present disclosure.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. The terms "comprises," "comprising," and the like, as used herein, specify the presence of stated features, steps, operations, and/or components, but do not preclude the presence or addition of one or more other features, steps, operations, or components.
All terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art unless otherwise defined. It is noted that the terms used herein should be interpreted as having a meaning that is consistent with the context of this specification and should not be interpreted in an idealized or overly formal sense.
Where a convention analogous to "at least one of A, B and C, etc." is used, in general such a construction is intended in the sense one having skill in the art would understand the convention (e.g., "a system having at least one of A, B and C" would include but not be limited to systems that have a alone, B alone, C alone, a and B together, a and C together, B and C together, and/or A, B, C together, etc.). Where a convention analogous to "A, B or at least one of C, etc." is used, in general such a construction is intended in the sense one having skill in the art would understand the convention (e.g., "a system having at least one of A, B or C" would include but not be limited to systems that have a alone, B alone, C alone, a and B together, a and C together, B and C together, and/or A, B, C together, etc.). It will be further understood by those within the art that virtually any disjunctive word and/or phrase presenting two or more alternative terms, whether in the description, claims, or drawings, should be understood to contemplate the possibilities of including one of the terms, either of the terms, or both terms. For example, the phrase "a or B" should be understood to include the stigmatic property of "a" or "B", or "a and B".
Some block diagrams and/or flow diagrams are shown in the figures. It will be understood that some blocks of the block diagrams and/or flowchart illustrations, or combinations thereof, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus, such that the instructions, which execute via the processor, create means for implementing the functions/acts specified in the block diagrams and/or flowchart block or blocks.
Accordingly, the techniques of this disclosure may be implemented in hardware and/or software (including firmware, microcode, etc.). In addition, the techniques of this disclosure may take the form of a computer program product on a computer-readable medium having instructions stored thereon for use by or in connection with an instruction execution system. In the context of this disclosure, a computer-readable medium may be any medium that can contain, store, communicate, propagate, or transport the instructions. For example, the computer readable medium can include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, device, or propagation medium. Specific examples of the computer readable medium include: magnetic storage devices, such as magnetic tape or Hard Disk Drives (HDDs); optical storage devices, such as compact disks (CD-ROMs); a memory, such as a Random Access Memory (RAM) or a flash memory; and/or wired/wireless communication links.
An embodiment of the present disclosure provides a signal processing method for an electronic device, where the electronic device includes a basic input output system BIOS, and the method is applied to the BIOS, and the method includes: whether the electronic equipment is connected with external equipment or not is detected, the external equipment comprises a plurality of interfaces, under the condition that the electronic equipment is connected with the external equipment, a first signal of the electronic equipment is converted into at least one second signal, wherein the first signal comprises a plurality of paths of PCIE signals, the second signal comprises a plurality of paths of PCIE signals and/or a single path of PCIE signal, and the at least one second signal is transmitted to the external equipment, wherein the at least one second signal is used for enabling at least one interface of the plurality of interfaces of the external equipment to be in a communication state with the electronic equipment.
It can be seen that in the technical solution of the embodiment of the present disclosure, when the electronic device is connected to the external device, the BIOS converts the first signal of the electronic device into at least one second signal, and outputs the at least one second signal to at least one interface of the external device, so that the at least one interface is in a communicable state, thereby implementing expansion of more interfaces on the electronic device with a compact structure and a small size, and implementing function expansion of the compact electronic device.
Fig. 1 schematically shows an application scenario of a signal processing method and a processing system for an electronic device according to an embodiment of the present disclosure. It should be noted that fig. 1 is only an example of a scenario in which the embodiments of the present disclosure may be applied to help those skilled in the art understand the technical content of the present disclosure, but does not mean that the embodiments of the present disclosure may not be applied to other devices, systems, environments or scenarios.
As shown in fig. 1, the application scenario 100 may include, for example, an electronic device 110 and an external device 120.
According to the embodiment of the disclosure, the electronic device 110 may be, for example, a notebook computer, a desktop computer, a tablet computer, or the like. As the internal structure of the electronic device 110 becomes more compact and smaller, the electronic device 110 usually needs external functional components to implement corresponding functions due to size limitation.
According to an embodiment of the present disclosure, the external device 120 may include, for example, a plurality of expansion interfaces (e.g., an interface 121, an interface 122, an interface 123, etc.). In the embodiment of the present disclosure, the electronic device 110 and the external device 120 may be communicatively connected. For example, the communication connection between each interface and the electronic device 110 may be realized by leading out a corresponding signal of the electronic device 110 to each interface of the external device 120.
In the embodiment of the present disclosure, the external device 120 may include, for example, a plurality of functional modules, and when the external functional component communicates with the electronic device 110 through a plurality of interfaces, the functional modules may process communication signals between the external functional component and the electronic device 110, so as to achieve a communication effect between the electronic device 110 and the external functional component. In addition, the functional module of the external device 120 can be conveniently detached or installed on the external device 120, so as to ensure that the functional module in the external device 120 can be replaced at any time. For example, when the external functional component includes a microphone, a projector, and the like, and when the microphone needs to be connected to the electronic device 110 through multiple interfaces of the external device 120, a functional module corresponding to the microphone may be installed in the external device 120, so that a communication signal between the external functional component and the electronic device 110 can be processed through the corresponding functional module.
In the embodiment of the present disclosure, the expansion of the interface of the electronic device 110 can be realized by connecting the external device 120, and the expansion interfaces can be connected with external functional components, so as to realize the function expansion of the electronic device 110.
Fig. 2 schematically shows a flow chart of a signal processing method for an electronic device according to an embodiment of the present disclosure.
As shown in fig. 2, the method includes operations S201 to S203.
In an embodiment of the present disclosure, an electronic device includes a basic input output system, BIOS. The signal processing method for the electronic device of the embodiment of the present disclosure is implemented by the BIOS.
In operation S201, it is detected whether an external device is connected to the electronic device, where the external device includes a plurality of interfaces.
According to an embodiment of the present disclosure, the electronic device may be, for example, a notebook computer, a desktop computer, a tablet computer, or the like. As the internal structure of the electronic device becomes more compact and the size of the electronic device becomes smaller, the electronic device usually needs to be externally connected with functional components to realize corresponding functions due to the size limitation. Therefore, the expansion of the interface of the electronic equipment can be realized by connecting the external equipment, and the expansion interfaces can be connected with external functional components, such as a microphone, a projector and the like, so that the function expansion of the electronic equipment is realized. For example, the external device may include a plurality of interfaces that may be connected with the external functional component, and the plurality of interfaces implement function expansion of the electronic device.
In this disclosed embodiment, whether detection electronic equipment is connected with external device includes: when the electronic equipment detects the equipment information of the external equipment, the electronic equipment is determined to be connected with the external equipment.
In the embodiment of the present disclosure, the device information of the external device includes, for example, an ID of the external device, and the electronic device determines whether to connect the external device by detecting the device information of the external device, specifically, for example, detecting the ID of the external device by a BIOS of the electronic device.
For example, when the electronic device is normally plugged into a power supply, the BIOS of the electronic device automatically detects device information of the external device, and when the electronic device detects the device information of the external device, it is determined that the electronic device is connected with the external device, that is, when the BIOS of the electronic device detects an ID of the external device, it is determined that the electronic device is connected with the external device.
In an embodiment of the present disclosure, an electronic device includes a high-speed solid state disk interface. For example, it may be an m.2 interface on a Printed Circuit Board (PCB) Board of an electronic device.
According to the embodiment of the disclosure, the plurality of interfaces of the external device include a first interface.
The external device of the embodiment of the disclosure comprises a plurality of interfaces, wherein the plurality of interfaces comprise a first interface connected with the electronic device, for example.
According to this disclosed embodiment, electronic equipment and external device are connected and are included: the electronic equipment is connected with a first interface of the external equipment through the high-speed solid state disk interface.
Specifically, the electronic device is connected with a first interface of the external device through the high-speed solid state disk interface, a signal of the electronic device is led out to the first interface of the external device through the high-speed solid state disk interface, and the electronic device is expanded to form multiple interfaces through the external device, so that the function expansion of the compact electronic device is realized.
In operation S202, in a case that the electronic device is connected to an external device, a first signal of the electronic device is converted into at least one second signal, where the first signal includes multiple PCIE signals, and the second signal includes multiple PCIE signals and/or a single PCIE signal.
In the embodiment of the present disclosure, the first signal of the electronic device includes, for example, multiple PCIE signals, for example, a PCIE × 4 signal, and the second signal includes, for example, one or two of multiple PCIE signals and a single PCIE signal, where the multiple PCIE signals include, for example, a PCIE × 4 signal, a PCIE × 2 signal, and the like, and the single PCIE signal includes, for example, a PCIE × 1 signal.
According to the embodiment of the present disclosure, the first signal is converted into at least one second signal, for example, when the first signal includes a PCIE × 4 signal, the PCIE × 4 signal is converted into four PCIE × 1 signals, or the PCIE × 4 signal is converted into two PCIE × 2 signals, or the PCIE × 4 signal is converted into one PCIE × 2 signal and two PCIE × 1 signals, and the like.
It can be understood that the embodiment of the present disclosure does not limit the specific types of the PCIE signals included in the first signal and the PCIE signals included in the second signal, where the first signal may further include PCIE × 8 signals, PCIE × 16 signals, and the like, and those skilled in the art may specifically set the signals according to the actual application situation.
In operation S203, at least one second signal is transmitted to the external device, wherein the at least one second signal is used to enable at least one of a plurality of interfaces of the external device to be in a communicable state with the electronic device.
In the embodiment of the present disclosure, at least one second signal is transmitted to the external device, for example, the at least one second signal is transmitted to the external device through a high-speed solid state disk interface of the electronic device, and specifically, when the at least one second signal is four PCIE × 1 signals, the BIOS of the electronic device transmits the four PCIE × 1 signals to the external device.
According to the embodiment of the disclosure, the plurality of interfaces of the external device include at least one second interface.
For example, the plurality of interfaces of the external device include at least one second interface, and the at least one second interface includes, for example, other interfaces of the plurality of interfaces of the external device except for the first interface connected with the high-speed solid state disk interface.
In the embodiment of the present disclosure, the second interface includes, for example, interfaces commonly used in the field of industrial automation control and internet of things, for example, an RS232 interface, a CAN interface, a LAN interface, a ZigBee interface, and the like, and it is to be understood that the present disclosure does not limit the specific type of the second interface, and a person skilled in the art may specifically set the second interface according to the actual application situation.
According to an embodiment of the present disclosure, transmitting at least one second signal to an external device includes: and transmitting the at least one second signal to at least one second interface of the external equipment.
The at least one second signal is used for enabling at least one second interface of the external device and the electronic device to be in a communicable state, and specifically, each at least one second interface includes, for example, a corresponding conversion chip, and the at least one second signal develops the at least one second interface through the corresponding conversion chip, so that the at least one second interface and the electronic device are in a communicable state.
In the embodiment of the present disclosure, each second interface includes a corresponding conversion chip, and interface information of the second interface is automatically detected by the BIOS of the electronic device, where the interface information includes, for example, PID/VID of the conversion chip (where PID/VID is an identification code of a device (chip), PID is a product identification code, and VID is vendor information), so that the BIOS identifies the at least one second interface by detecting the interface information.
According to the embodiment of the disclosure, under the condition that the electronic equipment is connected with the external equipment, the first clock signal corresponding to the first signal is converted into at least one second clock signal.
In this embodiment of the disclosure, when converting the first signal into the second signal, the first clock signal corresponding to the first signal may also be converted into at least one second clock signal, where the first clock signal and the second clock signal are, for example, PCIE clock signals, and specifically, the first clock signal is converted into the at least one second clock signal through a PCIE clock buffer of the electronic device (for example, at least one independent PCIE clock signal is separated from the PCIE clock buffer). The second clock signal corresponds to, for example, the second signal.
According to an embodiment of the disclosure, at least one second clock signal is transmitted to the external device.
In an embodiment of the disclosure, at least one second clock signal is transmitted to the external device, for example, the at least one second clock signal is transmitted to at least one second interface of the external device.
According to the embodiment of the disclosure, at least one second signal and at least one second clock signal enable at least one interface in the plurality of interfaces of the external device to be in a communicable state with the electronic device.
In the embodiment of the disclosure, at least one second signal and at least one second clock signal of the electronic device are transmitted to at least one second interface of the external device, and after the at least one second interface of the external device receives the at least one second signal and the at least one second clock signal, the at least one second interface and the electronic device are in a communicable state.
According to the embodiment of the disclosure, under the condition that the electronic device is connected with the external device, the BIOS converts the first signal of the electronic device into the at least one second signal, and outputs the at least one second signal to the at least one interface of the external device, so that the at least one interface is in a communicable state.
Fig. 3 schematically shows a block diagram of a signal processing system for an electronic device according to an embodiment of the present disclosure.
As shown in fig. 3, the signal processing system 300 for an electronic device includes a detection module 310, a conversion module 320, and a transmission module 330. The signal processing system 300 for an electronic device may perform the method described above with reference to fig. 2.
Specifically, the detection module 310 may detect whether an external device is connected to the electronic device, where the external device includes a plurality of interfaces. According to the embodiment of the present disclosure, the detection module 310 may, for example, perform the operation S201 described above with reference to fig. 2, which is not described herein again.
The conversion module 320 may convert a first signal of the electronic device into at least one second signal when the electronic device is connected to an external device, where the first signal includes multiple PCIE signals, and the second signal includes multiple PCIE signals and/or a single PCIE signal. According to the embodiment of the present disclosure, the converting module 320 may, for example, perform the operation S202 described above with reference to fig. 2, which is not described herein again.
The transmission module 330 may transmit at least one second signal to the external device, wherein the at least one second signal is used to enable at least one of the plurality of interfaces of the external device to be in a communicable state with the electronic device. According to the embodiment of the present disclosure, the transmission module 330 may, for example, perform operation S203 described above with reference to fig. 2, which is not described herein again.
Any number of modules, sub-modules, units, sub-units, or at least part of the functionality of any number thereof according to embodiments of the present disclosure may be implemented in one module. Any one or more of the modules, sub-modules, units, and sub-units according to the embodiments of the present disclosure may be implemented by being split into a plurality of modules. Any one or more of the modules, sub-modules, units, sub-units according to embodiments of the present disclosure may be implemented at least in part as a hardware circuit, such as a Field Programmable Gate Array (FPGA), a Programmable Logic Array (PLA), a system on a chip, a system on a substrate, a system on a package, an Application Specific Integrated Circuit (ASIC), or may be implemented in any other reasonable manner of hardware or firmware by integrating or packaging a circuit, or in any one of or a suitable combination of software, hardware, and firmware implementations. Alternatively, one or more of the modules, sub-modules, units, sub-units according to embodiments of the disclosure may be at least partially implemented as a computer program module, which when executed may perform the corresponding functions.
For example, any of the detection module 310, the conversion module 320, and the transmission module 330 may be combined and implemented in one module, or any one of them may be split into a plurality of modules. Alternatively, at least part of the functionality of one or more of these modules may be combined with at least part of the functionality of the other modules and implemented in one module. According to an embodiment of the present disclosure, at least one of the detecting module 310, the converting module 320, and the transmitting module 330 may be implemented at least partially as a hardware circuit, such as a Field Programmable Gate Array (FPGA), a Programmable Logic Array (PLA), a system on a chip, a system on a substrate, a system on a package, an Application Specific Integrated Circuit (ASIC), or may be implemented in hardware or firmware by any other reasonable manner of integrating or packaging a circuit, or may be implemented in any one of or a suitable combination of software, hardware, and firmware. Alternatively, at least one of the detection module 310, the conversion module 320, and the transmission module 330 may be at least partially implemented as a computer program module, which when executed, may perform a corresponding function.
FIG. 4 schematically shows a block diagram of a computer system for signal processing of an electronic device according to an embodiment of the disclosure. The computer system illustrated in FIG. 4 is only one example and should not impose any limitations on the scope of use or functionality of embodiments of the disclosure.
As shown in fig. 4, a computer system 400 implementing signal processing for an electronic device includes a processor 401, a computer-readable storage medium 402. The system 400 may perform a method according to an embodiment of the present disclosure.
In particular, processor 401 may comprise, for example, a general purpose microprocessor, an instruction set processor and/or an associated chipset, and/or a special purpose microprocessor (e.g., an Application Specific Integrated Circuit (ASIC)), or the like. The processor 401 may also include onboard memory for caching purposes. Processor 401 may be a single processing unit or a plurality of processing units for performing the different actions of the method flows according to embodiments of the present disclosure.
Computer-readable storage medium 402 may be, for example, any medium that can contain, store, communicate, propagate, or transport the instructions. For example, a readable storage medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, device, or propagation medium. Specific examples of the readable storage medium include: magnetic storage devices, such as magnetic tape or Hard Disk Drives (HDDs); optical storage devices, such as compact disks (CD-ROMs); a memory, such as a Random Access Memory (RAM) or a flash memory; and/or wired/wireless communication links.
The computer-readable storage medium 402 may include a computer program 403, which computer program 403 may include code/computer-executable instructions that, when executed by the processor 401, cause the processor 401 to perform a method according to an embodiment of the disclosure, or any variation thereof.
The computer program 403 may be configured with computer program code, for example, comprising computer program modules. For example, in an example embodiment, code in computer program 403 may include one or more program modules, including 403A, modules 403B, … …, for example. It should be noted that the division and number of modules are not fixed, and those skilled in the art may use suitable program modules or program module combinations according to actual situations, so that when the program modules are executed by the processor 401, the processor 401 may execute the method according to the embodiment of the present disclosure or any variation thereof.
According to an embodiment of the present invention, at least one of the detection module 310, the conversion module 320, and the transmission module 330 may be implemented as a computer program module as described with reference to fig. 4, which, when executed by the processor 401, may implement the respective operations described above.
The present disclosure also provides a computer-readable medium, which may be embodied in the apparatus/device/system described in the above embodiments; or may exist separately and not be assembled into the device/apparatus/system. The computer readable medium carries one or more programs which, when executed, implement:
a signal processing method of an electronic device, the electronic device comprising a Basic Input Output System (BIOS), the method being applied to the BIOS, the method comprising: whether the electronic equipment is connected with external equipment or not is detected, the external equipment comprises a plurality of interfaces, under the condition that the electronic equipment is connected with the external equipment, a first signal of the electronic equipment is converted into at least one second signal, wherein the first signal comprises a plurality of paths of PCIE signals, the second signal comprises a plurality of paths of PCIE signals and/or a single path of PCIE signal, and the at least one second signal is transmitted to the external equipment, wherein the at least one second signal is used for enabling at least one interface of the plurality of interfaces of the external equipment to be in a communication state with the electronic equipment.
Optionally, the electronic device includes a high-speed solid state disk interface, the plurality of interfaces of the external device include a first interface, and the connecting of the electronic device and the external device includes: the electronic equipment is connected with a first interface of the external equipment through the high-speed solid state disk interface.
Optionally, the above-mentioned multiple interfaces of the external device include at least one second interface, and transmit at least one second signal to the external device, including: and transmitting the at least one second signal to at least one second interface of the external equipment.
Optionally, the at least one second signal enables at least one of the plurality of interfaces of the external device to be in a communicable state with the electronic device, including: under the condition that the electronic equipment is connected with the external equipment, converting a first clock signal corresponding to the first signal into at least one second clock signal, transmitting the at least one second clock signal to the external equipment, and enabling at least one interface of a plurality of interfaces of the external equipment and the electronic equipment to be in a communicable state through the at least one second signal and the at least one second clock signal.
Optionally, the above-mentioned detection electronic equipment is connected with external device, including: when the electronic equipment detects the equipment information of the external equipment, the electronic equipment is determined to be connected with the external equipment.
According to embodiments of the present disclosure, a computer readable medium may be a computer readable signal medium or a computer readable storage medium or any combination of the two. A computer readable storage medium may be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination of the foregoing. More specific examples of the computer readable storage medium may include, but are not limited to: an electrical connection having one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In the present disclosure, a computer readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. In contrast, in the present disclosure, a computer-readable signal medium may include a propagated data signal with computer-readable program code embodied therein, for example, in baseband or as part of a carrier wave. Such a propagated data signal may take many forms, including, but not limited to, electro-magnetic, optical, or any suitable combination thereof. A computer readable signal medium may also be any computer readable medium that is not a computer readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device. Program code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to: wireless, wired, optical fiber cable, radio frequency signals, etc., or any suitable combination of the foregoing.
The flowchart and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present disclosure. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams or flowchart illustration, and combinations of blocks in the block diagrams or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
Those skilled in the art will appreciate that various combinations and/or combinations of features recited in the various embodiments and/or claims of the present disclosure can be made, even if such combinations or combinations are not expressly recited in the present disclosure. In particular, various combinations and/or combinations of the features recited in the various embodiments and/or claims of the present disclosure may be made without departing from the spirit or teaching of the present disclosure. All such combinations and/or associations are within the scope of the present disclosure.
While the disclosure has been shown and described with reference to certain exemplary embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the disclosure as defined by the appended claims and their equivalents. Accordingly, the scope of the present disclosure should not be limited to the above-described embodiments, but should be defined not only by the appended claims, but also by equivalents thereof.
Claims (8)
1. A signal processing method of an electronic device including a basic input output system BIOS, the method being applied to the BIOS, the method comprising:
detecting whether the electronic equipment is connected with external equipment or not, wherein the electronic equipment comprises a high-speed solid state disk interface, the external equipment comprises a plurality of interfaces, and the plurality of interfaces comprise a first interface and a plurality of second interfaces; the electronic equipment can be connected with a first interface of the external equipment through the high-speed solid state disk interface;
under the condition that the electronic equipment is connected with external equipment, converting a first signal of the electronic equipment into at least one second signal, wherein the at least one second signal comprises a plurality of second signals which are in one-to-one correspondence with the plurality of second interfaces, the first signal comprises a plurality of paths of PCIE signals, and each second signal in the plurality of second signals comprises a plurality of paths of PCIE signals or a single path of PCIE signal; and
and transmitting the at least one second signal to the external device through the high-speed solid state disk interface, wherein a plurality of second signals which are in one-to-one correspondence with the plurality of second interfaces and are included in the at least one second signal are used for enabling the plurality of second interfaces of the external device and the electronic device to be in a communicable state.
2. The method of claim 1, wherein:
the transmitting the at least one second signal to the external device includes: and transmitting the at least one second signal to a plurality of second interfaces of the external equipment.
3. The method of claim 1, wherein the at least one second signal causing at least one of the plurality of interfaces of the external device to be in a communicable state with the electronic device comprises:
under the condition that the electronic equipment is connected with external equipment, converting a first clock signal corresponding to the first signal into at least one second clock signal;
transmitting the at least one second clock signal to the external device; and
the at least one second signal and the at least one second clock signal cause at least one of the plurality of interfaces of the external device to be in a communicable state with the electronic device.
4. The method of claim 1, wherein the detecting whether the electronic device is connected with an external device comprises: when the electronic equipment detects the equipment information of the external equipment, determining that the electronic equipment is connected with the external equipment.
5. A signal processing system of an electronic device, the electronic device including a basic input output system, BIOS, the system comprising:
the detection module is used for detecting whether the electronic equipment is connected with external equipment or not, the electronic equipment comprises a high-speed solid state disk interface, the external equipment comprises a plurality of interfaces, and the plurality of interfaces comprise a first interface and a plurality of second interfaces; the electronic equipment can be connected with a first interface of the external equipment through the high-speed solid state disk interface;
the conversion module is used for converting a first signal of the electronic equipment into at least one second signal under the condition that the electronic equipment is connected with external equipment, wherein the at least one second signal comprises a plurality of second signals which are in one-to-one correspondence with the plurality of second interfaces, the first signal comprises a plurality of paths of PCIE signals, and each second signal in the plurality of second signals comprises a plurality of paths of PCIE signals or a single path of PCIE signal; and
the transmission module transmits the at least one second signal to the external device through the high-speed solid state disk interface, wherein a plurality of second signals which are included in the at least one second signal and correspond to the plurality of second interfaces in a one-to-one mode are used for enabling the plurality of second interfaces of the external device and the electronic device to be in a communicable state.
6. The system of claim 5, wherein:
the transmitting the at least one second signal to the external device includes: and transmitting the at least one second signal to a plurality of second interfaces of the external equipment.
7. The system of claim 5, wherein the at least one second signal to cause at least one of the plurality of interfaces of the external device to be in a communicable state with the electronic device comprises:
under the condition that the electronic equipment is connected with external equipment, converting a first clock signal corresponding to the first signal into at least one second clock signal;
transmitting the at least one second clock signal to the external device; and
the at least one second signal and the at least one second clock signal cause at least one of the plurality of interfaces of the external device to be in a communicable state with the electronic device.
8. The system of claim 5, wherein the detecting whether the electronic device is connected with an external device comprises: when the electronic equipment detects the equipment information of the external equipment, determining that the electronic equipment is connected with the external equipment.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810208012.1A CN108415867B (en) | 2018-03-13 | 2018-03-13 | Signal processing method and processing system of electronic equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810208012.1A CN108415867B (en) | 2018-03-13 | 2018-03-13 | Signal processing method and processing system of electronic equipment |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN108415867A CN108415867A (en) | 2018-08-17 |
| CN108415867B true CN108415867B (en) | 2021-10-22 |
Family
ID=63131416
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201810208012.1A Active CN108415867B (en) | 2018-03-13 | 2018-03-13 | Signal processing method and processing system of electronic equipment |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN108415867B (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102810085A (en) * | 2011-06-03 | 2012-12-05 | 鸿富锦精密工业（深圳）有限公司 | PCI-E expansion system and method |
Family Cites Families (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100478864C (en) * | 2004-08-27 | 2009-04-15 | 薛萍 | Method and device for connecting hardware on a handhold electronic device |
| KR20070052168A (en) * | 2005-11-16 | 2007-05-21 | 삼성전자주식회사 | Interface device, interface cable apparatus and communication system compriging the same |
| CN101364091B (en) * | 2007-08-07 | 2012-04-11 | 深圳迈瑞生物医疗电子股份有限公司 | Electric supply interface arrangement for external equipment and interface electric supply method |
| CN101625645B (en) * | 2009-08-11 | 2012-12-19 | 成都市华为赛门铁克科技有限公司 | Solid state disk, BIOS device, and method and equipment for booting operating system |
| CN102129881A (en) * | 2010-01-15 | 2011-07-20 | 多利吉科技股份有限公司 | Solid-state storage disc device and system suitable for peripheral component interconnect express interface |
| CN102681807B (en) * | 2011-03-15 | 2015-06-03 | 联想(北京)有限公司 | Electronic equipment and interface identification method |
| US9336130B2 (en) * | 2011-11-30 | 2016-05-10 | Sandisk Technologies Inc. | Methods, systems, and computer readable media for providing basic input/output system (BIOS) data and non-BIOS data on the same non-volatile memory |
| CN202383569U (en) * | 2011-12-31 | 2012-08-15 | 深圳市信步科技有限公司 | Mainboard with multifunctional extensible peripheral component interconnect express (PCIE) interface device |
| CN102541607A (en) * | 2011-12-31 | 2012-07-04 | 曙光信息产业股份有限公司 | BIOS collocation method and device based on UEFI framework |
| US9244872B2 (en) * | 2012-12-21 | 2016-01-26 | Ati Technologies Ulc | Configurable communications controller |
| CN103441393B (en) * | 2013-08-23 | 2016-08-10 | 深圳一电科技有限公司 | Electronic equipment and versatile interface, communication system |
| CN105608030A (en) * | 2015-12-23 | 2016-05-25 | 联想(北京)有限公司 | Electronic device and communication system |
| CN107220205B (en) * | 2017-05-18 | 2022-01-18 | 联想(北京)有限公司 | Information prompting method and electronic equipment |
| CN206993113U (en) * | 2017-06-28 | 2018-02-09 | 上海旗娱网络科技有限公司 | Signal transmitting apparatus and system |
-
2018
- 2018-03-13 CN CN201810208012.1A patent/CN108415867B/en active Active
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102810085A (en) * | 2011-06-03 | 2012-12-05 | 鸿富锦精密工业（深圳）有限公司 | PCI-E expansion system and method |
Also Published As
| Publication number | Publication date |
|---|---|
| CN108415867A (en) | 2018-08-17 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US8433838B2 (en) | Remote multiplexing devices on a serial peripheral interface bus | |
| US9231331B2 (en) | Connector identification through proximity sensing | |
| US20120178378A1 (en) | Wireless test server and method for testing electronic devices | |
| US10832536B2 (en) | Guided cable management | |
| JP6225944B2 (en) | Method and apparatus for using a serial port in a time division multiplexing scheme | |
| US7895376B2 (en) | Hardware configuration information system, method, and computer program product | |
| TW201514706A (en) | Electronic device for detecting state of hard disk | |
| TW201706864A (en) | Port selection at a computing device | |
| US20190289438A1 (en) | Information processing method and apparatus, and electronic device and computer readable medium thereof | |
| EP3805931B1 (en) | Wireless debugger and wireless debugging system | |
| CN108415867B (en) | Signal processing method and processing system of electronic equipment | |
| US20150186317A1 (en) | Method and apparatus for detecting the initiator/target orientation of a smart bridge | |
| CN108491347B (en) | Communication method and electronic device | |
| WO2019091064A1 (en) | Method for reproducing scenario, simulation device and system, and computer readable storage medium | |
| CN108920175B (en) | Method and system for realizing BMC (baseboard management controller) code logic | |
| US9779054B2 (en) | System, apparatus and method for centralized management of security inspection devices via field bus network | |
| CN108959131B (en) | Method for connecting electronic equipment and external equipment and electronic equipment | |
| CN108536267B (en) | Information processing method and electronic device | |
| TW201344450A (en) | Electronic systems, host electronic devices, electronic devices and communication methods | |
| CN112966335B (en) | Interface simulation device and automatic driving simulation test platform | |
| CN102204199A (en) | Bit inversion for communication interface | |
| CN109947690B (en) | Control method and device and electronic equipment | |
| US20110153902A1 (en) | Test Interface Card and Testing Method | |
| KR102256988B1 (en) | Apparatus and method for updating vehicle device having multiple modules | |
| CN108536627B (en) | Control method of electronic equipment and electronic equipment |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |