CN108364951B - Josephson's junction structure, storage unit, memory cell array and preparation method - Google Patents

Josephson's junction structure, storage unit, memory cell array and preparation method Download PDF

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CN108364951B
CN108364951B CN201810062542.XA CN201810062542A CN108364951B CN 108364951 B CN108364951 B CN 108364951B CN 201810062542 A CN201810062542 A CN 201810062542A CN 108364951 B CN108364951 B CN 108364951B
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nbn
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josephson
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top layer
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CN108364951A (en
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李峰
彭炜
王镇
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Shanghai Institute of Microsystem and Information Technology of CAS
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Shanghai Institute of Microsystem and Information Technology of CAS
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    • HELECTRICITY
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    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00Superconducting devices
    • H10N60/10Junction-based devices
    • H10N60/12Josephson-effect devices
    • HELECTRICITY
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
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Abstract

It includes: offer semiconductor substrate that the present invention, which provides a kind of Josephson's junction structure, storage unit, memory cell array and preparation method, the preparation of Josephson's junction structure, sequentially forms bottom NbN material layer, intermediate ferromagnetic material layer and top layer NbN material layer;Etching is to obtain by NbN layers of NbN layers of bottom, intermediate ferromagnetic layer and top layer Josephson junction constituted;Insulating layer and wiring layer are formed, and wiring layer is at least electrically connected with NbN layers of top layer.Through the above scheme, Josephson's junction structure of the invention, based single crystal NbN material, can be improved the response frequency of Josephson junction, the speed for improving the memory based on the Josephson junction ensure that the speed advantage of matched SQF digital circuit is played;By suitable sputtering pressure, target-substrate distance, ratio of gas mixture, sputtering current etc., solve the problems, such as that monocrystalline is difficult to prepare;By the design of Josephson's junction structure and the optimization of intermediate ferromagnetic layer process, solves the uncontrollable technical problem of film thickness.

Description

Josephson's junction structure, storage unit, memory cell array and preparation method
Technical field
The invention belongs to electronic information technical fields, more particularly to a kind of Josephson's junction structure, storage unit, storage Cell array and preparation method.
Background technique
With the failure of Moore's Law, faced using semiconductor transistor as the development of the traditional computer of basic unit great Problem, with the raising of integrated level, quantum effect and fuel factor become the factor that can not ignore.The rise of big data needs higher The server of performance does background support, and every energy once consumed of retrieving can maintain 100 watts of light bulb work one in Google Hour, this energy is most of to be used to radiate to CPU other than energy needed for server CPU operation.A part clothes of Google Business device build Iceland area in, because its average temperature of the whole year is only 1.3 DEG C, can save significant cost.Similar to this One server of major company is enough to consume the generated energy of a Small nuclear power plant.To solve integrated level bottleneck and energy consumption problem, It is the current building next generation trillion with the superconducting computer based on single flux quantum (single-flux-quantum, SFQ) One of the selection of the super Project Computer of level.
SFQ logic circuit is quite mature by semicentennial development, and running frequency is up to dozens or even hundreds of GHz, but since SFQ needs work in the pole low temperature environment of 4.2K or so, traditional semiconductor memory can not adapt to this temperature Therefore range becomes the stumbling-block that superconducting computer comes out with the memory of SFQ circuit compatibility.Initially propose based on nanometer Line and superconducting quantum interference device (SQUID) magnetism flux trapping scheme are difficult to improve integrated level because size is larger, based on semiconductor RAM and The storage method of low temperature interface is also abandoned because of energy consumption and response speed problem.Itd is proposed in recent years with magnetic Josephson junction (Superconductor/Ferromagnetor/Superconductor, SFS) is the storage method of basic unit by pass Note.Because of basic unit (Superconductor/Insulator/Superconductor, SIS) structure with SFQ logic circuit Identical, SFS knot integrates more convenient on its basis.But magnetic material can inhibit the energy gap of superconductor, therefore F layer material There is the difference of several orders of magnitude in the presence of the speed of service and SFQ that will lead to SFS knot.
Currently, since superconduction Nb material technology is highly developed, and it is Nb/Al (AlOx)/Nb structure that SFQ, which is used, at present The SFS of mainstream ties the superconduction Nb material used.But as aforesaid, the speed of memory is urgently to be resolved at present ask Topic, the speed of memory mention to come up, and the speed advantage of SFQ digital circuit can not just play.Wherein, the response of Josephson junction The energy gap of frequency and superconductor has direct relationship, and the energy gap of superconduction Nb film is about 1.5meV, the SFS knot based on Nb Response speed be still unable to satisfy the need of work of SFQ.
Therefore, how to provide a kind of Josephson's junction structure and the storage unit based on it, memory cell array and Preparation method, to solve above-mentioned to be necessary the problems of in the prior art.
Summary of the invention
In view of the foregoing deficiencies of prior art, the purpose of the present invention is to provide a kind of Josephson's junction structure, deposit Storage unit, memory cell array and preparation method, for solving in the prior art, Josephson junction response frequency is low, technique preparation It is difficult to and the problems such as the memory speed of service is slow.
In order to achieve the above objects and other related objects, the present invention provides a kind of preparation method of Josephson's junction structure, Include the following steps:
1) semi-conductive substrate is provided, and in sequentially forming bottom NbN material layer, intermediate ferromagnetic in the semiconductor substrate Material layer and top layer NbN material layer;
2) the etching removal part top layer NbN material layer, the part intermediate ferromagnetic material layer and the part bottom Layer NbN material layer, to obtain by NbN layers of NbN layers of bottom, intermediate ferromagnetic layer and top layer Josephson junction constituted;
3) surface of the structure obtained by step 2) forms an insulating layer, and corresponds to the Joseph in the insulating layer The position of gloomy knot forms the first opening, and first opening exposes described top layer NbN layers;And
4) surface of the structure obtained by step 3) forms a superconducting material, and etches the superconducting material to be formed Wiring layer, and the wiring layer is at least electrically connected with described top layer NbN layers.
As a preferred solution of the present invention, in step 1), the semiconductor substrate includes the monocrystalline MgO in (100) face Substrate.
As a preferred solution of the present invention, material, the top layer of the bottom NbN material layer in step 1) The material of NbN material layer includes monocrystalline NbN.
As a preferred solution of the present invention, the monocrystalline NbN is all made of the mixed gas in nitrogen and argon gas composition Atmosphere under, be prepared using the technique that niobium target is sputtered.
As a preferred solution of the present invention, the ratio of argon gas and nitrogen includes (9~11) in the mixed gas: (2 ~4);Sputtering pressure is between 1~3mTorr;Sputtering current is between 1.0~1.4A;Target-substrate distance between 60~70mm it Between.
As a preferred solution of the present invention, in step 1), the material of the intermediate ferromagnetic material layer includes NiCu, is led to It crosses sputtering technology and forms the NiCu, wherein in the sputtering technology, target-substrate distance is between 8~12cm;Sputtering current between Between 80~120mA;Sputtering pressure is between 0.5~1.5mTorr;Argon flow is between 15~25sccm.
As a preferred solution of the present invention, in step 1), the thickness of the bottom NbN material layer between 100~ Between 300nm;The thickness of the intermediate ferromagnetic material layer is between 2~10nm;The thickness of the top layer NbN material layer between Between 100~300nm.
As a preferred solution of the present invention, in step 1), the bottom NbN material is formed using in-situ sputtering technique Layer, the intermediate ferromagnetic material layer and the top layer NbN material layer;In step 2), it is based on the first photoetching offset plate figure layer, is used Reactive ion beam etching (RIBE) technique etches the top layer NbN material layer, etches the intermediate ferromagnetic material using ion beam etch process The bed of material;Based on the second photoetching offset plate figure layer, the bottom NbN material layer is etched using reactive ion beam etching (RIBE) technique.
As a preferred solution of the present invention, in step 2), described bottom NbN layers include the first hearth electrode being connected Exit and the second hearth electrode exit, and be connected with the first hearth electrode exit and the second hearth electrode exit Functional areas, wherein the intermediate ferromagnetic layer is located at least in the surface of the functional areas, and described top layer NbN layers are located at the function The surface of the corresponding intermediate ferromagnetic floor in energy area.
As a preferred solution of the present invention, in step 3), further include in formed on the insulating layer several second The step of opening, different second openings expose the first hearth electrode exit and second hearth electrode respectively Exit.
As a preferred solution of the present invention, in step 4), the wiring layer includes: several hearth electrode distribution areas, It is electrically connected on the first hearth electrode exit and the second hearth electrode exit appeared;Interface distribution area, It is electrically connected on the top layer NbN layer appeared;And several top electrode distribution areas for being electrically connected with the interface distribution area.
The present invention also provides a kind of preparation methods of storage unit, comprising steps of using such as above-mentioned any one scheme institute The preparation method for the Josephson's junction structure stated prepares Josephson's junction structure;A byte write line is connected to the bottom NbN Layer, connects a write line to described top layer NbN layers;Bias current line is connected to described bottom NbN layers and the top layer NbN On, to provide bias current for the Josephson junction;A voltage comparator is connected to described bottom NbN layers and the top layer On NbN, and the signal of the voltage comparator is exported to position read line and word read line.
The present invention also provides a kind of preparation method of memory cell array, including is formed and multiple be configured to cell row and list The step of storage unit of member column, wherein the storage unit is using the storage unit as described in above-mentioned any one scheme Preparation method is prepared;And one addressing buffer of configuration, to carry out the storehouse write-in of information and read.
The present invention also provides a kind of Josephson's junction structures, comprising:
Semiconductor substrate;
Josephson junction, positioned at the surface of the semiconductor substrate, the Josephson junction includes the bottom being sequentially stacked NbN layers, intermediate ferromagnetic layer and NbN layers of top layer, wherein the described bottom NbN layers surface positioned at the semiconductor substrate;
Insulating layer is continuously covered in the Josephson junction and the surrounding semiconductor substrate, and the insulation Described top layer NbN layers of exposure of the first opening is formed on layer;And
Wiring layer is formed on the insulating layer, and the wiring layer is at least via first opening and the about plucked instrument NbN layers of top layer of the gloomy knot of husband are electrically connected.
As a preferred solution of the present invention, the semiconductor substrate includes the monocrystalline MgO substrate in (100) face;It is described The material that NbN layer of bottom, top layer NbN layers of the material include monocrystalline NbN.
As a preferred solution of the present invention, described bottom NbN layers include the first hearth electrode exit for being connected and Second hearth electrode exit, and the function being connected with the first hearth electrode exit and the second hearth electrode exit Area, wherein the intermediate ferromagnetic layer is located at least in the functional areas surface, and described top layer NbN layers are located at the functional areas and correspond to The intermediate ferromagnetic layer surface;Several the second openings, different second openings are also formed on the insulating layer The first hearth electrode exit and the second hearth electrode exit are exposed respectively;The wiring layer includes: several Hearth electrode distribution area is electrically connected in the first hearth electrode exit and the second hearth electrode exit that appear On;Interface distribution area is electrically connected on the top layer NbN layer appeared;And several are electrically connected with the interface distribution area Top electrode distribution area.
The present invention also provides a kind of storage unit, including Josephson's junction structure as described in above-mentioned any one scheme, Wherein, a byte write line is connected to NbN layers of bottom of Josephson's junction structure, and a write line is to connecting the top layer NbN layers;One bias current line is connected on described bottom NbN layers and the top layer NbN, to provide partially for the Josephson junction Set electric current;One voltage comparator is connected on described bottom NbN layers and the top layer NbN, and the signal of the voltage comparator In output to position read line and word read line.
The present invention also provides a kind of memory cell array, the memory cell array have it is multiple be configured to cell row and The storage unit of cell columns, wherein the storage unit includes the storage unit as described in above-mentioned any one scheme, and described Memory cell array is also configured with an addressing buffer, to carry out the storehouse write-in of information and read.
As described above, Josephson's junction structure of the present invention and the storage unit based on it, memory cell array and respectively Preparation method, have the advantages that
The present invention provides a kind of Josephson's junction structure, which is based on NbN material, especially monocrystalline NbN material The characteristics such as material and its energy gap improve depositing based on the Josephson junction so as to improve the response frequency of Josephson junction The speed of reservoir, to ensure that the speed advantage of matched SQF digital circuit is played;The present invention is closed by setting Suitable sputtering pressure, target-substrate distance, ratio of gas mixture, sputtering current etc. solve monocrystalline and are difficult to the technical issues of preparing, overcome Technology prejudice;Meanwhile by the design of Josephson's junction structure and the optimization of intermediate ferromagnetic layer process, solves film thickness Uncontrollable technical problem has obtained Josephson's junction structure of good quality.
Detailed description of the invention
Fig. 1 is shown as the preparation technology flow chart of Josephson's junction structure of the present invention.
Fig. 2 is shown as providing the structural schematic diagram of semiconductor substrate in Josephson's junction structure preparation of the present invention.
Fig. 3 be shown as being formed in Josephson's junction structure of the present invention preparation bottom NbN material layer, intermediate ferromagnetic material layer with And the structural schematic diagram of top layer NbN material layer.
Fig. 4 is shown as etching top layer NbN material layer and intermediate ferromagnetic material layer in Josephson's junction structure preparation of the present invention The top view of structure afterwards.
Fig. 5 shows Fig. 4 structure along the schematic cross-section in the direction A-B.
Fig. 6 is shown as etching the top view of the structure after bottom NbN material layer in Josephson's junction structure preparation of the present invention.
Fig. 7 shows Fig. 6 structure along the schematic cross-section in the direction A-B.
Fig. 8 is shown as the top view of structure after formation insulating layer in Josephson's junction structure preparation of the present invention.
Fig. 9 shows Fig. 8 structure along the schematic cross-section in the direction A-B.
Figure 10 is shown as the top view of structure after formation wiring layer in Josephson's junction structure preparation of the present invention.
Figure 11 shows Figure 10 structure along the schematic cross-section in the direction A-B.
Figure 12 is shown as the light microscope photo of single SFS Josephson junction of the invention.
Figure 13 is shown as the I-V curve of SFS Josephson junction of the invention.
Figure 14 is shown as SFS Josephson junction Fraunhofer figure of the invention.
Figure 15 is shown as the storage unit height level switch timing diagram that SFS Josephson junction of the invention is constituted.
Figure 16 is shown as the memory cell structure schematic diagram that SFS Josephson junction of the invention is constituted.
Figure 17 is shown as the cryogenic memory array schematic diagram that SFS Josephson junction of the invention is constituted.
Component label instructions
100 semiconductor substrates
101 bottom NbN material layers
102 intermediate ferromagnetic material layers
103 top layer NbN material layers
104 top layer transition zones
106 NbN layers of bottoms
1061 first hearth electrode exits
1062 second hearth electrode exits
107 NbN layers of top layers
108 intermediate ferromagnetic layers
109 insulating layers
1091 first openings
1092,1,093 second opening
110 superconducting materials
111 wiring layers
1111,1112 hearth electrode distribution area
1113 interfaces distribution area
1114,1115 top electrode distribution area
S1~S4 step 1)~step 4)
Specific embodiment
Illustrate embodiments of the present invention below by way of specific specific example, those skilled in the art can be by this specification Other advantages and efficacy of the present invention can be easily understood for disclosed content.The present invention can also pass through in addition different specific realities The mode of applying is embodied or practiced, the various details in this specification can also based on different viewpoints and application, without departing from Various modifications or alterations are carried out under spirit of the invention.
Fig. 1 is please referred to Figure 17.It should be noted that diagram provided in the present embodiment only illustrates this in a schematic way The basic conception of invention, though only show in diagram with related component in the present invention rather than package count when according to actual implementation Mesh, shape and size are drawn, when actual implementation form, quantity and the ratio of each component can arbitrarily change for one kind, and its Assembly layout form may also be increasingly complex.
Embodiment one:
The present invention provides a kind of preparation method of Josephson's junction structure, includes the following steps:
1) semi-conductive substrate is provided, and in sequentially forming bottom NbN material layer, intermediate ferromagnetic in the semiconductor substrate Material layer and top layer NbN material layer;
2) the etching removal part top layer NbN material layer, the part intermediate ferromagnetic material layer and the part bottom Layer NbN material layer, to obtain by NbN layers of NbN layers of bottom, intermediate ferromagnetic layer and top layer Josephson junction constituted;
3) surface of the structure obtained by step 2) forms an insulating layer, and corresponds to the Joseph in the insulating layer The position of gloomy knot forms the first opening, and first opening exposes described top layer NbN layers;And
4) surface of the structure obtained by step 3) forms a superconducting material, and etches the superconducting material to be formed Wiring layer, and the wiring layer is at least electrically connected with described top layer NbN layers.
The preparation of Josephson's junction structure of the invention is illustrated below in conjunction with attached drawing.
Firstly, carrying out step 1) shown in S1 as shown in figure 1 and Fig. 2~3, providing semi-conductive substrate 100, and in described Bottom NbN material layer 101, intermediate ferromagnetic material layer 102 and top layer NbN material layer are sequentially formed in semiconductor substrate 100 103。
As an example, the semiconductor substrate includes the monocrystalline MgO substrate in (100) face in step 1).
Specifically, providing semi-conductive substrate 100, Josephson is prepared on the semiconductor substrate for subsequent Knot, wherein the material of the semiconductor substrate can choose the material that the application function may be implemented being well known in the art.It is excellent Selection of land, in this example, the semiconductor substrate 100 selects the monocrystalline MgO of (100) crystal orientation, this is because, the lattice constant of MgO For 0.42nm, the lattice constant for being subsequently formed the NbN of Josephson junction needs is 0.44nm, and it is good to thereby may be ensured that the two has Good matching properties, so that the performance of the NbN of outer (100) orientation extended is improved on MgO.
As an example, the material of the bottom NbN material layer 101 in step 1), the top layer NbN material layer 103 Material includes monocrystalline NbN.
Specifically, the trilaminate material layer formed in this step, i.e. bottom NbN material layer 101, intermediate ferromagnetic material layer 102 and top layer NbN material layer 103, Josephson junction is finally prepared in subsequent technique in they, wherein the application Top layer and bottom using NbN material as Josephson junction, it is preferable that be selected as monocrystalline NbN.
It should be noted that creative in the application use material of the NbN as Josephson junction, especially monocrystalline The selection of NbN, namely cryogenic memory is creatively prepared using NbN superconducting thin film, the performance of memory is greatly improved, In particular, the Josephson junctions such as existing Nb base SFS can not match the speed of superconducting digital circuits SFQ, for the sound for promoting SFS knot Frequency is answered, the application has selected the higher NbN material of energy gap voltage, because, response time t=Φ0/ (2 π Vc) and character voltage Vc=Ic×RnIt is related, and the energy gap of character voltage and superconductor is directly proportional, as article V.V.Ryazanov, " Magnetic Described in Josephson Junction Technology for Digital and Memory Application ", tradition Nb base SFS knot Vc~10-9V or so, its application in superconducting circuit of rate limitation, and the NbN base SFS of the application Vc~10 of knot-5A layer insulating I shape can be added although speed can not also be tied unanimously at present with the SIS in SFQ in V or so It is tied at SIFS, at this point, Vc can be increased substantially, the character voltage ratio SFS knot of the Nb base SIFS knot of V.V.Ryazanov preparation is mentioned 5 several magnitudes are risen.
Therefore, the use of NbN material is made based on its high energy gap and lesser Josephson junction size in the application It obtains the response frequency based on its Josephson junction to be greatly improved, also allows for the memory based on the Josephson junction Speed be greatly improved so that on the basis of technique is simpler closer to SFQ digital circuit speed.
As an example, the monocrystalline NbN is all made of under the atmosphere of the mixed gas in nitrogen and argon gas composition, niobium target is utilized The technique that material is sputtered is prepared.
As an example, the ratio of argon gas and nitrogen includes (9~11): (2~4) in the mixed gas;Sputtering pressure is situated between Between 1~3mTorr;Sputtering current is between 1.0~1.4A;Target-substrate distance is between 60~70mm.
Specifically, NbN material layer is difficult to be prepared in existing technique, the especially superconduction NbN film ratio of monocrystalline More difficult preparation, this is because in magnetron sputtering NbN film, N in cavity2All can with the electric current when proportion and sputtering of Ar The quality of NbN film is influenced, the superconduction coherence length of the NbN film of monocrystalline is about 7nm or so, superconducting transition temperature 15.6K, Energy gap is about 3meV, and polycrystalline NbN coherence length can be solely 2~3nm or so, and superconducting transition temperature and energy gap also can be obvious Decline.When preparing Josephson junction, it is preferable to use monocrystalline NbN film in this example, in prior art, the difficulty of preparation is caused Everybody is set all to turn to the superconduction Nb technique of comparative maturity, the superconducting transition temperature of Nb superconducting thin film is 9.2K or so, and superconduction is relevant Length is 1.5meV up to 30nm, energy gap voltage, and the superconduction Nb technological development time is long, and technique is very mature.
Wherein, general in the world is Nb material, needs regulation sputtering current in the long membrane process of magnetron sputtering, sputtering pressure with And target-substrate distance, and not mono-crystalline structures, each parameter slightly adjust.And NbN film is in addition to this, to be passed through N2, originally show In example, N2Gas mixture ratio with Ar is preferably using the ratio of 3:10, but simple regulating gas mixing ratio is not enough, also It needs to plan as a whole sputtering current, because NbN is in sputtering process, Nb target and N2Reaction generates NbN, increases with sputtering current, N2Ionization Increase, sputtering voltage has the process of a first increases and then decreases, this limited proportionality is known as negative impedance region, needs to optimize experimental verification Specific sputtering current and many factors such as sputtering pressure and gas mixture ratio can just obtain the NbN monocrystal thin films of high quality, The scheme of the application solves monocrystalline NbN and is difficult to the technical issues of preparing, wherein as an example, nitrogen in the mixed gas The ratio of gas and argon gas is 3:10;Sputtering pressure is 2mTorr;Sputtering current is 1.2A;Target-substrate distance is 65mm, and uses room The technique (cooling water is passed through in sputtering process) of temperature sputtering, thus the available NbN material layer of good performance under the technique, Bottom NbN material layer of good performance and top layer NbN material layer are obtained.
As an example, the material of the intermediate ferromagnetic material layer 102 includes NiCu in step 1), pass through sputtering technology shape At the NiCu, wherein in the sputtering technology, target-substrate distance is between 8~12cm;Sputtering current between 80~120mA it Between;Sputtering pressure is between 0.5~1.5mTorr;Argon flow is between 15~25sccm.
Specifically, film controls in prior art, it is relatively difficult for being especially controlled within several nanometer ranges, and The present invention prepares the intermediate ferromagnetic material layer 102 using above-mentioned technique, so as to effectively control the thickness of the layer of material, Preferably, the sputtering parameter of NiCu are as follows: target-substrate distance 10cm;Sputtering current 100mA, sputtering pressure 1mTorr, gas flow 20sccm, gas Ar.In addition, regrowed on NiCu second layer monocrystalline NbN be also it is difficult, because of the lattice of NbN Constant is 0.44nm or so, and the lattice constant of NiCu is 0.35nm or so, and the two is there are biggish mismatch, therefore top layer NbN film is difficult extension, thus not can guarantee well it is monocrystalline, and the present invention use reasonable structure setting and above-mentioned preparation Technique solves the above problem, and top layer NbN material layer of good performance is prepared on NiCu.Certainly, the intermediate ferromagnetic material The material of the bed of material 102 can also be the material layer of including but not limited to PdNi, NiFe or PdFe etc..
As an example, the thickness of the bottom NbN material layer 101 is between 100~300nm;The intermediate ferromagnetic material The thickness of the bed of material 102 is between 2~10nm;The thickness of the top layer NbN material layer 103 is between 100~300nm.
The Josephson junction of narrow sense is exactly that one layer of insulator is pressed from both sides among two pieces of superconductors in fact, is imitated using quantum tunneling It answers, electric current can pass through intermediate barrier layer, and the thickness of barrier layer is theoretically no more than the coherence length of superconductor, wherein When preparing Josephson junction, the coherence length of NbN is significantly less than Nb, in the scheme of the application, by taking NiCu as an example, and thickness control System is within 10nm, and under existing technology, plastics thickness control is still more difficult in several nanometer ranges, and Nb technique The thickness of middle middle layer is substantially reduced up to tens nanometers, technology difficulty, the above-mentioned preparation side of the intermediate ferromagnetic layer of the application The reason of case solves the problems, such as that thickness is difficult to control, another aspect, selects monocrystalline NbN also resides in, the relevant length of monocrystalline NbN superconduction Spend longer than polycrystalline NbN, monocrystalline is 7nm or so, and polycrystalline may only have 3nm or so, and the thickness of such middle layer NiCu can be with Relatively good control, modification scope are also larger.
Preferably, the thickness of barrier layer (such as described intermediate ferromagnetic material layer) is no more than superconductor (such as described top layer NbN Material layer and the bottom NbN material layer) coherence length, thus further more effectively guarantee super stream will not decay or Person is suppressed.
Preferably, the bottom NbN material layer 101 with a thickness of 200nm;The thickness of the intermediate ferromagnetic material layer 102 For 5nm;The top layer NbN material layer 103 with a thickness of 200nm.
As an example, forming the bottom NbN material layer 101, the intermediate iron using in-situ sputtering technique in step 1) Flux material layer 102 and the top layer NbN material layer 103.
Specifically, selecting in-situ sputtering technique in this example, being due to inherently a kind of interface of Josephson device Device, the performances such as the planarization at interface seriously affect the final performance of device, and in-situ sputtering technique of the invention can be to avoid dirt It catches and states multilayer film (the bottom NbN material layer 101, the intermediate ferromagnetic material layer 102 and the top layer NbN material layer 103) interface improves the performance of Josephson junction.
Then shown in S2, as shown in figure 1 and Fig. 4~7, step 2), the etching removal part top layer NbN material are carried out Layer, the part intermediate ferromagnetic material layer and part the bottom NbN material layer, to obtain by NbN layers of bottom, intermediate ferromagnetic The Josephson junction of layer and NbN layers of top layer composition.
Specifically, the technique by the step, finally etches above-mentioned trilaminate material layer to form Josephson junction, as showing , in step 2), it is based on the first photoetching offset plate figure layer, the top layer NbN material layer is etched using reactive ion beam etching (RIBE) technique 103, the intermediate ferromagnetic material layer 102 is etched using ion beam etch process;Based on the second photoetching offset plate figure layer, using reaction Ion beam etch process etches the bottom NbN material layer 101.
That is, Josephson junction is prepared using the technique of step etching in this example, firstly, in step 1) By sol evenning machine gluing on the surface of structure, and the first layer pattern is shifted using photoetching technique, obtains the first photoresist figure Shape layer (not shown) etches the top layer NbN material layer 103 using the first photoetching offset plate figure layer as exposure mask, forms top Layer transition zone 104, it is preferable that use reactive ion etching (RIE) technique, be further continued for etching the intermediate ferromagnetic material layer 102, shape At intermediate ferromagnetic layer 108, it is preferred to use ion beam etching (IBE) technique, as shown in Figure 4 and Figure 5;Then it, then above-mentioned obtains Structure on the basis of, shift the second layer pattern by sol evenning machine gluing, and using photoetching technique, obtain second photoresist Graph layer (not shown) etches the bottom NbN material layer 101 using the second photoetching offset plate figure layer as exposure mask, is formed Bottom NbN layer 106, it is preferable that performed etching using reactive ion etching (RIE) technique, define hearth electrode and Josephson The interface size of knot, meanwhile, further include the steps that carrying out excess stock processing to top layer transition zone 104, obtains Josephson junction Top layer NbN layer 107, as shown in Figure 6 and Figure 7.
As an example, the bottom NbN layer 106 includes: 1061 He of the first hearth electrode exit being connected in step 2) Second hearth electrode exit 1062, and it is homogeneous with the first hearth electrode exit 1061 and the second hearth electrode exit 1062 The functional areas of connection (underface of intermediate ferromagnetic layer 108, is not shown in the figure in Fig. 6), wherein the intermediate ferromagnetic layer 108 are located at least in the surface of the functional areas 1063, and the top layer NbN layer 107 is located at the corresponding centre in the functional areas The surface of ferromagnetic layer 108.
Specifically, this example gives a kind of NbN layers of bottom of structure of Josephson junction, including two hearth electrodes are drawn End, wherein the intermediate ferromagnetic layer 108 is covered in the functional areas and the first hearth electrode exit and described the simultaneously The part that two hearth electrode exits are connected with the functional areas, as shown in fig. 6, it is, of course, also possible to being arranged according to actual demand The structures such as other hearth electrode exits, are not illustrated as limiting with this example.
Continue, shown in S3 as shown in figure 1 and Fig. 8~9, carries out step 3), the surface of the structure obtained by step 2) is formed One insulating layer 109, and the first opening 1091 is formed in the position that the insulating layer 109 corresponds to the Josephson junction, it is described First opening 1091 exposes the top layer NbN layer 107.
Specifically, the material of the insulating layer 109 includes but is not limited to silica, chemistry can be enhanced with using plasma The methods of vapour deposition process PECVD, chemical vapour deposition technique or thermal evaporation grow the insulating layer 109, the insulating layer Thickness is selected as 250nm between 200~300nm in this example.Furthermore it is possible to pass through the method for removing (lift-off) Remove the extra insulating layer, including form first opening 1091, it is, of course, also possible to such as be passed through using other modes Lithographic etch process forms first opening 1091 in the position that the insulating layer 109 corresponds to the Josephson junction;Tool Body, position and figure that photoetching process defines first opening are first passed through, is then etched by etching technics described exhausted Edge layer is to form first opening.
It further include in forming several the second openings 1092,1093 on the insulating layer 109 as an example, in step 3) The step of, wherein different second openings 1092,1093, which respectively corresponds, exposes the first hearth electrode exit 1061 And the second hearth electrode exit 1062.
Specifically, the insulating layer 109 is in addition to needing when being formed with hearth electrode exit on the bottom NbN layer 106 Appear other than described top layer NbN layers, also need to appear described bottom NbN layers of hearth electrode exit, such as the first hearth electrode exit 1061 and the second hearth electrode exit 1062, to be electrically connected.
Finally, carrying out step 4), the surface shape of the structure obtained by step 3) shown in S4 as shown in figure 1 and Figure 10~11 At a superconducting material 110, and the superconducting material 110 is etched to form wiring layer 111, and the wiring layer 111 is at least It is electrically connected with the top layer NbN layer 107.
Specifically, the step ultimately forms the wiring layer 111 of device architecture, it is preferable that utilize the technique shape of magnetron sputtering At the superconducting material 110, the material of the superconducting material includes but is not limited to NbN, and thickness is between 300~500nm Between, be selected as 400nm in this example, the formation process of the superconducting material 110 can with the bottom NbN material layer with And the preparation process of the top layer NbN material layer is same or similar, as the ratio of nitrogen and argon gas is 3:10 in mixed gas;It splashes Pressure of emanating is 5mTorr;Sputtering current is 1.2A;Target-substrate distance is 65mm, and (is led in sputtering process using the technique of temperature sputtering Enter cooling water).
It is specifically included in addition, etching the superconducting material 110 with the technique for forming the wiring layer 111, in superconduction material After bed of material surface passes through sol evenning machine gluing, third layer pattern is shifted using photoetching technique, and utilize reactive ion beam etching (RIBE) (RIE) The superconducting material is etched, to form the wiring layer 111.
As an example, the wiring layer 111 includes: several hearth electrode distribution areas 1111,1112 in step 4), respectively It is electrically connected on the first hearth electrode exit 1061 and the second hearth electrode exit 1062 appeared;Interface wiring Area 1113 is electrically connected on the top layer NbN layer 107 appeared;And several are electrically connected with the interface distribution area 1113 Top electrode distribution area 1114,1115.
Specifically, when being formed with hearth electrode exit on the bottom NbN layer 106, such as the first hearth electrode exit 1061 and the second hearth electrode exit 1062, the wiring layer 111 further include the hearth electrode distribution area drawn, together When, top electrode distribution area and interface distribution area are prepared, to complete the preparation of Josephson's junction structure, wherein Figure 12 is shown For the light microscope photo of the single SFS Josephson junction in an example.
In addition, further including the steps that the transport property of scribing test SFS Josephson junction.
It should be further noted that Josephson junction structure working principle of the invention is as follows: SFS Josephson junction exists In the case where additional parallel magnetic field, the critical current Ic of knot can periodically be inhibited, and be showed in Experiments of Optics Fraunhofer figure (fraunhofer figure), since F layers are magnetic material, after removing impressed field after saturated magnetization, knot faces Boundary's electric current still can be inhibited by remnant field, changed influence of the front and back to critical current using externally-applied magnetic field direction and realized height electricity The transformation of position carries out the storage of information.In addition, as shown in figure 13, being shown as the I-V curve of SFS Josephson junction of the invention Figure, it can be seen that there are a transformations on SFS Josephson junction I-V curve, when impressed current is less than its critical current Ic When (1.8mA), entire SFS knot is in superconducting state, and both ends do not have voltage difference, and when impressed current is more than 1.8mA, SFS is tied by surpassing It leads state and is changed into normal state, knot both ends can measure the voltage difference of microvolt magnitude.But merely by between normal state and superconducting state Transformation can not carry out non-volatile storage, superconducting state and normal state can not continue to after power-off.
If carrying out non-volatile memories, need to use the characteristic of ferromagnetic layer material (the intermediate ferromagnetic layer 108), i.e., Influence of the remanent magnetization of NiCu to SFS knot critical current is exactly utilized in remanent magnetization problem in magnetic history, the application Carry out information storage.As shown in figure 14, when adding the magnetic field for being parallel to knot surface outside, the critical current Ic of SFS Josephson junction It can be suppressed, as impressed field is gradually increased, Ic value gradually decreases to zero, and there are a cycle concussions.When ferromagnetic layer reaches After saturated magnetization, remove external magnetic field, at this point, the critical current of SFS knot is only 1mA or so, this is because surplus in NiCu material Residual magnetismization inhibition finishes critical current.
If tying the bias current for applying a 1.4mA to SFS, pass through SFS knot bottom (bottom NbN layer 106) and top layer The conducting wire of (bottom NbN layer 107), which applies byte write-in and position write current, makes its production by changing the size of the two electric currents Raw magnetic field can be equivalent to the ferromagnetic layer saturated magnetization in knot to initialize to SFS knot.After initialization, word is being not added In the case where section write-in and position write current, since NiCu has been saturated magnetization, remanent magnetization can inhibit to tie critical current, this When Ic value be 1mA, but since there are the bias currents of 1.4mA at both ends for knot, it is evident that 1.4mA is greater than 1mA, so when SFS knot at In normal state, a voltage can be exported.If the electric current of byte write-in and position write-in reversely applied, by adjusting two electric currents Size make its generate superposition magnetic field be about 50Oe, just eliminate NiCu material in remanent magnetization, due to external magnetic field offset Remanent magnetization, being equivalent to net magnetic field is zero, and the critical current of SFS knot is restored to maximum value 1.8mA at this time, and ties the inclined of both ends Pressure is 1.4mA, therefore SFS knot is in superconducting state, does not have voltage output.Since the generation and elimination of remanent magnetization do not need outside Power-up stream is maintained, so the electric current of byte write-in and position write-in will not influence the storage state of SFS knot after disconnecting, because This, it is this be stored as it is non-volatile.
In addition, as shown in figure 15, being shown as the storage unit height level switch timing diagram of SFS Josephson junction composition. After storage unit is by initial saturated magnetization, storage unit is in low-potential state at this time, represents " 0 ", passes through byte line and position Line generates the superimposed field of 50Oe come after eliminating remanent magnetization, storage unit be in high potential state, representative " 1 ".It is reversed again to apply Behind magnetic field, storage unit is again at low-potential state.And so on, to realize that the change of state carries out the storage of information. Byte write line and position write line, which continuously apply two pulses in the same direction, will not influence the state of storage unit.
As shown in Figures 10 and 11, referring to figs. 1 to 9, the present invention also provides a kind of Josephson's junction structures, wherein described Josephson's junction structure is preferably prepared using method of the invention, it is of course also possible to use other techniques, not as Limit, Josephson's junction structure include:
Semiconductor substrate 100;
Josephson junction, positioned at the surface of the semiconductor substrate 100, the Josephson junction includes the bottom being sequentially stacked Layer NbN layer 106, intermediate ferromagnetic layer 108 and top layer NbN layer 107, wherein the bottom NbN layer 106 is located at the semiconductor The surface of substrate 100;
Insulating layer 109 is continuously covered in the Josephson junction and the surrounding semiconductor substrate 100, and institute State the first opening 1091 that the exposure top layer NbN layer 107 is formed on insulating layer 109;And
Wiring layer 111 is formed on the insulating layer 109, and the wiring layer 111 is at least via first opening 1091 are electrically connected with the top layer NbN layer 107 of the Josephson junction.
As an example, the semiconductor substrate 100 includes the monocrystalline MgO substrate in (100) face;The bottom NbN layer 106 Material, the top layer NbN layer 107 material include monocrystalline NbN.
Specifically, providing semi-conductive substrate 100, Josephson is prepared on the semiconductor substrate for subsequent Knot, wherein the material of the semiconductor substrate can choose the material that the application function may be implemented being well known in the art.It is excellent Selection of land, in this example, the semiconductor substrate 100 selects the monocrystalline MgO of (100) crystal orientation, this is because, the lattice constant of MgO For 0.42nm, the lattice constant for being subsequently formed the NbN of Josephson junction needs is 0.44nm, and it is good to thereby may be ensured that the two has Good matching properties, so that the performance of the NbN of outer (100) orientation extended is improved on MgO.
It should be noted that creative in the application use material of the NbN as Josephson junction, especially monocrystalline The selection of NbN, namely cryogenic memory is creatively prepared using NbN superconducting thin film, greatly improve the performance of memory. The use of NbN material in the application, based on the reason of its high energy gap and lesser Josephson junction size, so that being based on it The response frequency of Josephson junction be greatly improved, the speed for also allowing for the memory based on the Josephson junction obtains To greatling improve, so that closer to the speed of SFQ digital circuit on the basis of technics comparing is simple.
As an example, the thickness of the bottom NbN layer 106 is between 100~300nm;The intermediate ferromagnetic layer 108 Thickness is between 2~10nm;The thickness of the top layer NbN layer 107 is between 100~300nm.Preferably, the bottom NbN layer 106 with a thickness of 200nm;The intermediate ferromagnetic layer 108 with a thickness of 5nm;The top layer NbN layer 107 with a thickness of 200nm。
The Josephson junction of narrow sense is exactly that one layer of insulator is pressed from both sides among two pieces of superconductors in fact, is imitated using quantum tunneling It answers, electric current can pass through intermediate barrier layer, and the thickness of barrier layer is theoretically no more than the coherence length of superconductor wherein, is making When standby Josephson junction, the coherence length of NbN is significantly less than Nb, in the scheme of the application, by taking NiCu as an example, and thickness control Within 10nm, under existing technology, plastics thickness control is still more difficult in several nanometer ranges, and in Nb technique The thickness of middle layer is substantially reduced up to tens nanometers, technology difficulty, the above-mentioned preparation method of the intermediate ferromagnetic layer of the application Solve the problems, such as thickness be difficult to control, on the other hand, select monocrystalline NbN the reason of also reside in, monocrystalline NbN superconduction coherence length Longer than polycrystalline NbN, monocrystalline is 7nm or so, and polycrystalline may only have 3nm or so, and the thickness of such middle layer NiCu can phase To good control, modification scope is also larger.
Preferably, the thickness of barrier layer (such as described intermediate ferromagnetic layer) be no more than superconductor (such as described top layer NbN layers with And described bottom NbN layers) coherence length, to further more effectively guarantee that super stream will not decay or be suppressed.
As an example, the bottom NbN layer 106 includes the first hearth electrode exit 1061 and the second hearth electrode being connected Exit 1062, and the function being connected with the first hearth electrode exit 1061 and the second hearth electrode exit 1062 Area 1063, wherein the intermediate ferromagnetic layer 108 is located at least in the functional areas surface, and the top layer NbN layer 107 is located at described Corresponding 108 surface of intermediate ferromagnetic layer in functional areas;Be also formed on the insulating layer 109 several second open 1092, 1093, different second openings 1092,1093 exposes the first hearth electrode exit and second bottom respectively Electrode leads to client;The wiring layer 111 includes: several hearth electrode distribution areas 1111,1112, is electrically connected in the institute appeared It states on the first hearth electrode exit and the second hearth electrode exit;Interface distribution area 1113 is electrically connected to the institute appeared It states on top layer NbN layer;And several top electrode distribution areas 1114,1115 for being electrically connected with the interface distribution area 1113.
Specifically, this example gives a kind of NbN layers of bottom of structure of Josephson junction, including two hearth electrodes are drawn End, wherein the intermediate ferromagnetic layer 108 is covered in the functional areas and the first hearth electrode exit and described the simultaneously The part that two hearth electrode exits are connected with the functional areas, it is shown in Figure 6, it is, of course, also possible to be set according to actual demand The structures such as other hearth electrode exits are set, are not illustrated as limiting with this example.Meanwhile it also forming and being tied with described bottom NbN layers The corresponding insulating layer of structure and wiring layer, to complete the preparation of Josephson's junction structure.
Embodiment two:
As shown in figure 16, the present invention also provides a kind of preparation methods of storage unit 200, comprising steps of using as implemented The preparation method of Josephson's junction structure described in any one of example one prepares Josephson's junction structure 201;Connect a byte Write line connects a write line to the top layer NbN layer 107 to the bottom NbN layer 106;Bias current line is connected to institute It states on bottom NbN layer 106 and the top layer NbN107, to provide bias current for the Josephson junction;Connect a voltage ratio It is exported compared on device 202 to the bottom NbN layer 106 and the top layer NbN layer 107, and by the signal of the voltage comparator 202 To position read line and word read line.
Specifically, as shown in figure 16, byte write line and knot hearth electrode (bottom NbN layer 106) share, position write line and knot Top electrode (the top layer NbN layer 107) shares, though therefore byte write line and position write line are cross shape, not In same plane, only when the two applies electric current simultaneously, it is (intermediate that the superposition magnetic field generated could change ferromagnetic material in knot Ferromagnetic layer 108) state, to choose the storage unit.Bias current line applies 1.4mA to knot both ends through intersection point 1,2 in figure Bias current.Since actual process is processed and is tested in environment, superconducting state and nisi zero-voltage state, so each There is Josephson's voltage comparator 202 around SFS knot, the voltage of knot both ends output passes to voltage ratio through intersection point 4,5 in figure Compared with device 202, by setting the reference voltage of a very little, to distinguish normal state and superconducting state, thus one response signal of output It is transferred to byte read line and position read line respectively through intersection point 6,7 in figure.
The present invention also provides a kind of storage units, wherein the storage unit preferably uses depositing for the offer of the present embodiment two The preparation method of storage unit is prepared, and but not limited to this, and the storage unit includes Josephson's junction structure, wherein one Byte write line is connected to NbN layers of bottom of Josephson's junction structure, and a write line is to connecting described top layer NbN layers; One bias current line is connected on described bottom NbN layers and the top layer NbN, to provide biased electrical for the Josephson junction Stream;One voltage comparator is connected on described bottom NbN layers and the top layer NbN, and the signal output of the voltage comparator To position read line and word read line.
In addition, as shown in figure 17, the present invention also provides a kind of preparation methods of memory cell array, including form multiple match The step of being set to the storage unit of cell row and cell columns, wherein the storage unit is used as described in the present embodiment two The preparation method of storage unit is prepared;And one addressing buffer of configuration, to carry out the storehouse write-in of information and read.
The present invention also provides a kind of memory cell arrays, wherein the memory cell array preferably uses the present embodiment two The preparation method of the memory cell array of offer is prepared, and but not limited to this, and the memory cell array has multiple match It is set to the storage unit of cell row and cell columns, wherein the storage unit includes the storage list as described in the present embodiment two Member, and the memory cell array is also configured with an addressing buffer, to carry out the storehouse write-in of information and read.
In conclusion the present invention provides a kind of Josephson's junction structure, storage unit, memory cell array and preparation side Method, the preparation of Josephson's junction structure include: offer semi-conductive substrate, and in sequentially forming bottom in the semiconductor substrate NbN material layer, intermediate ferromagnetic material layer and top layer NbN material layer;The etching removal part top layer NbN material layer, part The intermediate ferromagnetic material layer and part the bottom NbN material layer, to obtain by NbN layers of bottom, intermediate ferromagnetic layer and top The Josephson junction of NbN layers of composition of layer;The surface of the structure obtained by previous step forms an insulating layer, and in the insulating layer pair The position of Josephson junction described in Ying Yu forms the first opening, and first opening exposes described top layer NbN layers;And in upper The surface of structure obtained by one step forms a superconducting material, and etches the superconducting material to form wiring layer, and described Wiring layer is at least electrically connected with described top layer NbN layers.Through the above scheme, the present invention provides a kind of Josephson's junction structure, should Josephson junction is based on NbN material, the especially characteristics such as monocrystalline NbN material and its energy gap, so as to improve Josephson junction Response frequency, the speed of the memory based on the Josephson junction is improved, to ensure that matched SQF number electricity The speed advantage on road is played;The present invention is by being arranged suitable sputtering pressure, target-substrate distance, ratio of gas mixture, sputtering current Deng solving monocrystalline and be difficult to the technical issues of preparing, overcome technology prejudice;Meanwhile passing through the design of Josephson's junction structure And the optimization of intermediate ferromagnetic layer process, it solves the uncontrollable technical problem of film thickness, has obtained the pact of good quality Se Fusen junction structure.So the present invention effectively overcomes various shortcoming in the prior art and has high industrial utilization value.
The above-described embodiments merely illustrate the principles and effects of the present invention, and is not intended to limit the present invention.It is any ripe The personage for knowing this technology all without departing from the spirit and scope of the present invention, carries out modifications and changes to above-described embodiment.Cause This, institute is complete without departing from the spirit and technical ideas disclosed in the present invention by those of ordinary skill in the art such as At all equivalent modifications or change, should be covered by the claims of the present invention.

Claims (14)

1. a kind of preparation method of Josephson's junction structure, which comprises the steps of:
1) semi-conductive substrate is provided, and in sequentially forming bottom NbN material layer, intermediate ferromagnetic material in the semiconductor substrate Layer and top layer NbN material layer, wherein the material of the bottom NbN material layer, the top layer NbN material layer material wrap Monocrystalline NbN is included, the thickness of the intermediate ferromagnetic material layer is between 2~10nm, in which:
The monocrystalline NbN is all made of under the atmosphere of the mixed gas in nitrogen and argon gas composition, is sputtered using niobium target Technique is prepared, and the ratio of argon gas and nitrogen includes (9~11): (2~4) in the mixed gas;Sputtering pressure between 1~ Between 3mTorr;Sputtering current is between 1.0~1.4A;Target-substrate distance is between 60~70mm;
The material of the intermediate ferromagnetic material layer includes NiCu, forms the NiCu by sputtering technology, wherein the sputtering work In skill, target-substrate distance is between 8~12cm;Sputtering current is between 80~120mA;Sputtering pressure between 0.5~ Between 1.5mTorr;Argon flow is between 15~25sccm;
2) the etching removal part top layer NbN material layer, the part intermediate ferromagnetic material layer and the part bottom NbN Material layer, to obtain by NbN layers of NbN layers of bottom, intermediate ferromagnetic layer and top layer Josephson junction constituted;
3) surface of the structure obtained by step 2) forms an insulating layer, and corresponds to the Josephson junction in the insulating layer Position formed first opening, it is described first opening exposes described top layer NbN layers;And
4) surface of the structure obtained by step 3) forms a superconducting material, and etches the superconducting material to form wiring Layer, and the wiring layer is at least electrically connected with described top layer NbN layers.
2. the preparation method of Josephson's junction structure according to claim 1, which is characterized in that in step 1), described half Conductor substrate includes the monocrystalline MgO substrate in (100) face.
3. the preparation method of Josephson's junction structure according to claim 1, which is characterized in that in step 1), the bottom The thickness of layer NbN material layer is between 100~300nm;The thickness of the top layer NbN material layer between 100~300nm it Between.
4. the preparation method of Josephson's junction structure according to claim 1, which is characterized in that in step 1), using original Position sputtering technology forms the bottom NbN material layer, the intermediate ferromagnetic material layer and the top layer NbN material layer;Step 2) in, be based on the first photoetching offset plate figure layer, the top layer NbN material layer etched using reactive ion beam etching (RIBE) technique, using from Beamlet etching technics etches the intermediate ferromagnetic material layer;Based on the second photoetching offset plate figure layer, using reactive ion beam etching (RIBE) work Skill etches the bottom NbN material layer.
5. the preparation method of Josephson's junction structure described according to claim 1~any one of 4, which is characterized in that step It is rapid 2) in, described bottom NbN layers include: the first hearth electrode exit and the second hearth electrode exit being connected, and with institute State the functional areas that the first hearth electrode exit and the second hearth electrode exit are connected, wherein the intermediate ferromagnetic layer is at least Positioned at the surface of the functional areas, the described top layer NbN layers surface positioned at the corresponding intermediate ferromagnetic layer in the functional areas.
6. the preparation method of Josephson's junction structure according to claim 5, which is characterized in that in step 3), further include In the step of forming several second openings on the insulating layer, wherein different second openings exposes described respectively First hearth electrode exit and the second hearth electrode exit.
7. the preparation method of Josephson's junction structure according to claim 6, which is characterized in that described to match in step 4) Line layer includes: several hearth electrode distribution areas, is electrically connected in the first hearth electrode exit appeared and described On two hearth electrode exits;Interface distribution area is electrically connected on the top layer NbN layer appeared;And several and the knot The top electrode distribution area of area distribution area electrical connection.
8. a kind of preparation method of storage unit, which is characterized in that comprising steps of using such as any one of claim 1~7 The preparation method of Josephson's junction structure prepares Josephson's junction structure;A byte write line is connected to the bottom NbN layers, a write line is connected to described top layer NbN layers;Bias current line is connected to described bottom NbN layers and the top layer On NbN, to provide bias current for the Josephson junction;A voltage comparator is connected to described bottom NbN layers and the top On layer NbN, and the signal of the voltage comparator is exported to position read line and word read line.
9. a kind of preparation method of memory cell array, which is characterized in that multiple be configured to cell row and unit including being formed The step of storage unit of column, wherein the storage unit uses the preparation method system of storage unit as claimed in claim 8 It is standby to obtain;And one addressing buffer of configuration, to carry out the storehouse write-in of information and read.
10. a kind of Josephson's junction structure characterized by comprising
Semiconductor substrate;
Josephson junction, positioned at the surface of the semiconductor substrate, the Josephson junction includes the bottom NbN being sequentially stacked Layer, intermediate ferromagnetic layer and NbN layers of top layer, wherein the described bottom NbN layers surface positioned at the semiconductor substrate;
Insulating layer is continuously covered in the Josephson junction and the surrounding semiconductor substrate, and on the insulating layer It is formed with described top layer NbN layers of exposure of the first opening;And
Wiring layer is formed on the insulating layer, and the wiring layer is at least via first opening and the Josephson NbN layers of top layer of knot are electrically connected.
11. Josephson's junction structure according to claim 10, which is characterized in that the semiconductor substrate includes (100) The monocrystalline MgO substrate in face;Bottom NbN layers of the material, top layer NbN layers of the material include monocrystalline NbN.
12. Josephson's junction structure described in any one of 0 or 11 according to claim 1, which is characterized in that the bottom NbN layers include the first hearth electrode exit and the second hearth electrode exit being connected, and are drawn with first hearth electrode The functional areas being connected with the second hearth electrode exit are held, and the intermediate ferromagnetic layer is located at least in the functional areas surface, The described top layer NbN layers surface positioned at the corresponding intermediate ferromagnetic layer in the functional areas;If being also formed on the insulating layer Dry the second opening, different second openings expose the first hearth electrode exit and second bottom electricity respectively Pole exit;The wiring layer includes: several hearth electrode distribution areas, is electrically connected and draws in first hearth electrode appeared In outlet and the second hearth electrode exit;Interface distribution area is electrically connected on the top layer NbN layer appeared;And Several top electrode distribution areas being electrically connected with the interface distribution area.
13. a kind of storage unit, which is characterized in that including the Josephson junction as described in any one of claim 10~12 Structure, wherein a byte write line is connected to NbN layers of bottom of Josephson's junction structure, and a write line is to connecting State NbN layers of top layer;One bias current line is connected on described bottom NbN layers and the top layer NbN, for the Josephson junction Bias current is provided;One voltage comparator is connected on described bottom NbN layers and the top layer NbN, and the voltage comparator Signal export to position read line and word read line.
14. a kind of memory cell array, which is characterized in that the memory cell array is configured to cell row and list with multiple The storage unit of member column, wherein the storage unit includes storage unit as claimed in claim 13, and the storage unit Array is also configured with an addressing buffer, to carry out the storehouse write-in of information and read.
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