CN108319441A - Control method, device, system, processor and the storage medium that audio plays - Google Patents
Control method, device, system, processor and the storage medium that audio plays Download PDFInfo
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- CN108319441A CN108319441A CN201810010132.0A CN201810010132A CN108319441A CN 108319441 A CN108319441 A CN 108319441A CN 201810010132 A CN201810010132 A CN 201810010132A CN 108319441 A CN108319441 A CN 108319441A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/16—Sound input; Sound output
- G06F3/162—Interface to dedicated audio devices, e.g. audio drivers, interface to CODECs
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
- H04R3/00—Circuits for transducers, loudspeakers or microphones
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Abstract
The invention discloses the control methods that a kind of audio plays, and are applied to Zigbee microprocessors, Zigbee microprocessors are based on preset SPI interface and connect Flash chip, and simulate I based on SPI interface2S interfaces connect audio DAC chip, including：Zigbee microprocessors read the audio data stored in Flash chip based on SPI interface and it are based on I2S interfaces are exported to audio DAC chip, audio data is converted into corresponding analog audio signal by audio DAC chip, analog audio signal drive the speaker after power amplifier is handled plays corresponding audio, namely realizes that Flash chip and audio DAC chip are multiplexed SPI interface, completes audio and plays.The invention also discloses control device, system, processor and storage mediums that a kind of audio plays.The present invention has achieved the effect that take into account cost and quality when realizing that audio plays based on Zigbee microprocessors.
Description
Technical field
The present invention relates to Zigbee (ZigBee protocol) technical fields more particularly to a kind of control method of audio broadcasting, dresses
It sets, system, processor and storage medium.
Background technology
ZigBee technology is a kind of bidirectional wireless communication technology of short distance, with low complex degree, low-power consumption, low cost
Advantage, be gradually widely used in intelligent appliance networking communication in.Since the starting positioning of ZigBee technology is to be applied to
The transmission of data monitoring and simple data, without considering the advanced media application such as audio, ZigBee microprocessors are generally all
It is not provided with the I for audio transmission2S (Inter-IC Sound, integrated circuit built-in audio bus) interface.Therefore, base
Realize that audio plays in ZigBee microprocessors, or by extending additional voice playing module, using speech play mould
Block is acted on behalf of puts logical process outside all voices；It is pre- inside mask speech chip either by external mask speech chip
Corresponding audio to be played is set, preset audio is played back by triggering mask speech chip.
However, since voice playing module is typically a complete embedded system, at least need include microprocessor,
It for the Flash flash chips of audio storage and audio frequency power amplifier etc., and needs to develop a set of independent software module again, open
It is higher to send out cost.And audio preset inside mask speech chip cannot update, and the code check that audio plays is relatively low and fixed,
Cause the audio scalability exported by mask speech chip and audio quality all poor.Therefore, micro- currently based on ZigBee
Processor is realized in the mode that audio plays, and cost and quality problems can not be taken into account.
Invention content
It is a primary object of the present invention to propose a kind of control method, device, system, processor and storage that audio plays
Medium, it is intended to solve to realize that audio broadcasting can not take into account the technology of cost and quality based on ZigBee microprocessors in the prior art
Problem.
To achieve the above object, the present invention provides a kind of control method that audio plays, and is applied to Zigbee microprocessors,
The Zigbee microprocessors are based on preset SPI Serial Peripheral Interface (SPI)s and connect Flash flash chips, and are connect based on the SPI
Mouth mold intends I2S integrated circuit built-in audio bus interface connects audio DAC analog-digital chips, the controlling party that the audio plays
Method includes the following steps：
Zigbee microprocessors read the audio data stored in the Flash chip based on the SPI interface；
The audio data is based on the I2S interfaces are exported to the audio DAC chip, for the audio DAC cores
The audio data is converted into corresponding analog audio signal by piece, and the analog audio signal drives after power amplifier is handled and raises one's voice
Device plays corresponding audio.
Preferably, the Zigbee microprocessors further include the first IO input/output interfaces, are based on first I/O interface
The CS chip selection signal pins of the Flash chip are connected, the Zigbee microprocessors are based on the SPI interface and read Flash
The step of audio data stored in chip includes：
The Zigbee microprocessors enable the CS signal pins of the Flash chip based on first I/O interface, hair
Send reading order to the Flash chip, so that the Flash chip is when receiving the reading order, feedback is corresponding
Audio data；
MISO input data lines based on the SPI interface receive the audio data of the Flash chip feedback.
Preferably, the Zigbee microprocessors further include second IO interface, described in second IO interface connection
The WS word selection signal pins of audio DAC chip, it is described that the audio data is based on the I2S interfaces are exported to the audio
Before the step of DAC chip, further include：
The Zigbee microprocessors overturn the I/O signal of the second IO interface using timer, generate PWM
Pulse width modulating signal, to simulate ws signal according to the pwm signal；
Based on preset PWM simultaneously matchs value, Phase synchronization is carried out to the ws signal of simulation.
Preferably, described that the audio data is based on the I2S interfaces export to the step of the audio DAC chip it
Before, further include：
Obtain the audio-frequency information for including in the frame head of the audio data；
According to the audio-frequency information, the working frequency of the Zigbee microprocessors is configured.
Preferably, the Zigbee microprocessors further include first buffering area and second buffering area, the micro- places Zigbee
After the step of reason device reads the audio data stored in Flash chip based on the SPI interface, further include：
The audio data is cached in the first buffering area and the second buffering area；
It is described that the audio data is based on the I2S interfaces were exported to the step of audio DAC chip：
The audio data cached in the first buffering area and the second buffering area is based on the I successively2S connects
Mouth is exported to the audio DAC chip.
Preferably, the spatial cache of the first buffering area and the second buffering area is set as 4KB.
Preferably, the control method of the audio broadcasting includes：
Twi-read order is continuously transmitted to the Flash chip, so that the Flash chip feeds back the audio data
It is first two section audio data section；
The first two sections audio data section is cached in the first buffering area and the second buffering area respectively；
The audio data section of current cache in the first buffering area is exported to the audio DAC chip；
When the audio data section output of current cache finishes in the first buffering area, whether the audio data is judged
Reading finishes；
If it is not, the Flash chip is then sent the read command to, so that the Flash chip feeds back the audio data
Next section audio data section；
The audio data section of current cache in the second buffering area is exported to the audio DAC chip；And by institute
The audio data section for stating Flash chip feedback is cached in the first buffering area；
When the audio data section output of current cache finishes in the second buffering area, whether the audio data is judged
Reading finishes；
If it is not, the Flash chip is then sent the read command to, so that the Flash chip feeds back the audio data
Next section audio data section；And it is defeated to continue the return execution audio data section by current cache in the first buffering area
The step of going out to the audio DAC chip, until audio data reading finishes, the first buffering area and described second is delayed
The audio data section output cached in area is rushed to complete.
Preferably, the Zigbee microprocessors read the audio data stored in Flash chip based on the SPI interface
The step of before, further include：
When receiving audio play instruction, suspend Zigbee protocol stack data processing；
It is described that the audio data is based on the I2S interfaces are exported to the audio DAC chip, for the audio
The audio data is converted into corresponding analog audio signal by DAC chip, and the analog audio signal handles rear-guard through power amplifier
After the step of dynamic loud speaker plays corresponding audio, further include：
At the end of the audio plays, restore the Zigbee protocol stack data processing.
In addition, to achieve the above object, the present invention also proposes a kind of control device that audio plays, what the audio played
Control device includes：It memory, processor and is stored in the audio that can be run on the memory and on the processor and broadcasts
Control program is put, the audio plays the control for realizing that audio as described above plays when control program is executed by the processor
The step of method processed.
In addition, to achieve the above object, the present invention also proposes a kind of Zigbee microprocessors, the Zigbee microprocessors
The control device played including audio as described above.
In addition, to achieve the above object, the present invention also proposes a kind of control system that audio plays, what the audio played
Control system includes Zigbee microprocessors, Flash chip and audio DAC chip, and the Zigbee microprocessors are based on preset
SPI interface connects the Flash chip, and based on the I of SPI interface simulation2S interfaces connect the audio DAC chip,
In：
The Flash chip, for when receiving the reading order that the Zigbee microprocessors are sent, feedback to be corresponding
Audio data to the Zigbee microprocessors；
The Zigbee microprocessors, for sending the read command to the Flash chip；And it is described receiving
When the audio data of Flash chip feedback, the audio data is exported to the audio DAC chip；
The audio DAC chip, for when receiving the audio data, the audio data being converted into corresponding
Analog audio signal, analog audio signal drive the speaker after power amplifier is handled play corresponding audio.
In addition, to achieve the above object, the present invention also proposes a kind of computer readable storage medium, described computer-readable
It is stored with audio on storage medium and plays control program, the audio is played when control program is executed by processor and realized as above
The step of control method that the audio plays.
Scheme proposed by the present invention, Zigbee microprocessors are based on preset SPI interface and connect Flash chip, and are based on
SPI interface simulates I2S interfaces connect audio DAC chip, and Zigbee microprocessors are based on the SPI interface and read in Flash chip
The audio data of storage, and by audio data I based on simulation2S interfaces are exported to audio DAC chip, and audio DAC chip will
The audio data received is converted into corresponding analog audio signal, which drives after power amplifier is handled and raise one's voice
Device plays corresponding audio.Since the hardware resource and processing capacity of Zigbee microprocessors is utilized, it is not necessary to additional extension again
One complete embedded system (voice playing module) and a set of independent software module is developed again, therefore reduce into
This；And due to being to realize the update and extension of audio data using Flash chip storage audio data, and pass through audio
The quality that DAC chip exports audio is high, namely has achieved the effect that take into account cost and quality.
Description of the drawings
Fig. 1 is the structural schematic diagram of the hardware running environment for the Zigbee microprocessors that the embodiment of the present invention is related to；
Fig. 2 is the flow diagram for the control method first embodiment that audio of the present invention plays；
Fig. 3 is the time diagram of SPI；
Fig. 4 is I2The time diagram of S；
Fig. 5 is the hardware connection framework signal for the optional audio frequency broadcast system that the embodiment of the present invention is related to
Figure；
Fig. 6 is the flow diagram for the control method second embodiment that audio of the present invention plays；
Fig. 7 is the flow diagram that the optional audio that the embodiment of the present invention is related to plays.
The embodiments will be further described with reference to the accompanying drawings for the realization, the function and the advantages of the object of the present invention.
Specific implementation mode
It should be appreciated that the specific embodiments described herein are merely illustrative of the present invention, it is not intended to limit the present invention.
The solution of the embodiment of the present invention is mainly：Zigbee microprocessors are based on preset SPI interface and connect Flash cores
Piece, and I is simulated based on SPI interface2S interfaces connect audio DAC chip, and Zigbee microprocessors are read based on the SPI interface
The audio data stored in Flash chip, and by audio data I based on simulation2S interfaces are exported to audio DAC chip, sound
The audio data received is converted into corresponding analog audio signal by frequency DAC chip, the analog audio signal through power amplifier at
Drive the speaker plays corresponding audio after reason.Technical solution through the embodiment of the present invention is solved based on the micro- places ZigBee
Reason device realizes the problem of audio broadcasting can not take into account cost and quality.
The embodiment of the present invention proposes a kind of Zigbee microprocessors.
Referring to Fig.1, Fig. 1 is the structure of the hardware running environment for the Zigbee microprocessors that the embodiment of the present invention is related to
Schematic diagram.
In subsequent description, using for indicating that the suffix of such as " module ", " component " or " unit " of element is only
The explanation for being conducive to the present invention, itself does not have a specific meaning.Therefore, " module ", " component " or " unit " can mix
Ground uses.
As shown in Figure 1, the Zigbee microprocessors may include：Processor 1001, communication bus 1002, user interface
1003, network interface 1004, memory 1005.Wherein, communication bus 1002 is for realizing the connection communication between these components.
User interface 1003 may include display screen (Display), input unit such as keyboard (Keyboard), optional user interface
1003 can also include standard wireline interface and wireless interface.Network interface 1004 may include optionally that the wired of standard connects
Mouth, wireless interface (such as WI-FI interfaces).Memory 1005 can be high-speed RAM memory, can also be stable memory
(non-volatile memory), such as magnetic disk storage.Memory 1005 optionally can also be independently of aforementioned processor
1001 storage device.
It will be understood by those skilled in the art that Zigbee microprocessor architectures shown in Fig. 1 are not constituted to Zigbee
The restriction of microprocessor may include either combining certain components or different components than illustrating more or fewer components
Arrangement.
As shown in Figure 1, as may include that operating system, network are logical in a kind of memory 1005 of computer storage media
Believe that module, Subscriber Interface Module SIM and audio play control program.
The control played in audio can be arranged in processor 1001, memory 1005 in Zigbee microprocessors of the present invention
In device, the control device that the audio plays calls the audio stored in memory 1005 to play control by processor 1001
Program, and execute following operation：
Zigbee microprocessors read the audio data stored in Flash chip based on SPI interface；
The audio data is based on I2S interfaces are exported to audio DAC chip, so that the audio DAC chip will be described
Audio data is converted into corresponding analog audio signal, and analog audio signal drive the speaker after power amplifier is handled plays phase
The audio answered.
Further, processor 1001 can call the audio stored in memory 1005 to play control program, also execute
It operates below：
The Zigbee microprocessors enable the CS signal pins of the Flash chip based on the first I/O interface, send and read
Order is taken to feed back corresponding audio to the Flash chip so that the Flash chip is when receiving the reading order
Data；
MISO input data lines based on the SPI interface receive the audio data of the Flash chip feedback.
Further, processor 1001 can call the audio stored in memory 1005 to play control program, also execute
It operates below：
The Zigbee microprocessors overturn the I/O signal of second IO interface using timer, generate pwm pulse
Bandwidth modulation signals, to simulate ws signal according to the pwm signal；
Based on preset PWM simultaneously matchs value, Phase synchronization is carried out to the ws signal of simulation.
Further, processor 1001 can call the audio stored in memory 1005 to play control program, also execute
It operates below：
Obtain the audio-frequency information for including in the frame head of the audio data；
According to the audio-frequency information, the working frequency of the Zigbee microprocessors is configured.
Further, processor 1001 can call the audio stored in memory 1005 to play control program, also execute
It operates below：
The audio data is cached in first buffering area and second buffering area；
The audio data cached in the first buffering area and the second buffering area is based on the I successively2S connects
Mouth is exported to the audio DAC chip.
Further, processor 1001 can call the audio stored in memory 1005 to play control program, also execute
It operates below：
Twi-read order is continuously transmitted to the Flash chip, so that the Flash chip feeds back the audio data
It is first two section audio data section；
The first two sections audio data section is cached in the first buffering area and the second buffering area respectively；
The audio data section of current cache in the first buffering area is exported to the audio DAC chip；
When the audio data section output of current cache finishes in the first buffering area, whether the audio data is judged
Reading finishes；
If it is not, the Flash chip is then sent the read command to, so that the Flash chip feeds back the audio data
Next section audio data section；
The audio data section of current cache in the second buffering area is exported to the audio DAC chip；And by institute
The audio data section for stating Flash chip feedback is cached in the first buffering area；
When the audio data section output of current cache finishes in the second buffering area, whether the audio data is judged
Reading finishes；
If it is not, the Flash chip is then sent the read command to, so that the Flash chip feeds back the audio data
Next section audio data section；And it is defeated to continue the return execution audio data section by current cache in the first buffering area
The step of going out to the audio DAC chip, until audio data reading finishes, the first buffering area and described second is delayed
The audio data section output cached in area is rushed to complete.
Further, processor 1001 can call the audio stored in memory 1005 to play control program, also execute
It operates below：
When receiving audio play instruction, suspend Zigbee protocol stack data processing；
At the end of audio plays, restore the Zigbee protocol stack data processing.
Through the above scheme, Zigbee microprocessors are based on preset SPI interface and connect Flash chip the present embodiment, and
I is simulated based on SPI interface2S interfaces connect audio DAC chip, and Zigbee microprocessors are based on the SPI interface and read Flash cores
The audio data stored in piece, and by audio data I based on simulation2S interfaces are exported to audio DAC chip, audio DAC cores
The audio data received is converted into corresponding analog audio signal by piece, which drives after power amplifier is handled
Loud speaker plays corresponding audio.Since the hardware resource and processing capacity of Zigbee microprocessors is utilized, it is not necessary to additional again
It extends a complete embedded system (voice playing module) and develops a set of independent software module again, therefore reduce
Cost；And due to being to realize the update and extension of audio data using Flash chip storage audio data, and pass through
The quality that audio DAC chip exports audio is high, namely has achieved the effect that take into account cost and quality.
Based on above-mentioned hardware configuration, the control method embodiment that audio of the present invention plays is proposed.
It is the flow diagram for the control method first embodiment that audio of the present invention plays with reference to Fig. 2, Fig. 2.
In the first embodiment, the control method that the audio plays includes the following steps：
The audio data stored in step S10, Zigbee microcomputer reads Flash chip；
Step S20 exports the audio data to audio DAC chip, so that the audio DAC chip is by the audio
At corresponding analog audio signal, analog audio signal drive the speaker after power amplifier is handled plays corresponding data conversion
Audio.
In the present invention, the control method that audio plays is preferably applied to Zigbee microprocessors.Zigbee microprocessors are pre-
It is equipped with SPI (Serial Peripheral Interface, Serial Peripheral Interface (SPI)), SPI is a kind of high speed, and full duplex is synchronous
Communication bus, generally have four lines, be CS (piece choosing) line, CLK (clock) line, MISO (input data) lines and MOSI respectively
(output data) line.SPI interface is usually used in external Flash (flash memory) chip.In the present embodiment, Zigbee microprocessors are based on it
Preset SPI interface connects corresponding Flash chip, and corresponding audio data is stored in the Flash chip.
I2S (Inter-IC Sound, integrated circuit built-in audio bus) interface is commonly used in high quality multimedia audio
The access of DAC (Digital to analog converte, digital-to-analogue conversion) chip, I2S also includes generally four lines, is respectively
BCLK (bit clock) line, MCLK (master clock) line, WS (word selection signal) lines and SDATA (data) line.
As shown in Figure 3 and Figure 4, SPI and I2The clock of S and data line logic are almost the same, the I of outbound course2S ratios SPI is more
One WS word selection signal and a MCLK master clock signal.Wherein, for MCLK master clock signals, some audio DAC chips
It can be by internal PLL (phaselocked loop is usually used in the process of frequency multiplication of clock signal), automatically from the generation of BCLK bit clock signals
The MCLK master clock signals matched, therefore the MCLK master clock signals can not be provided.And for WS word selection signals, it acts as areas
The left and right acoustic channels of multi-voice frequency data can simulate ws signal by certain software synchronization means using common I/O port.Therefore,
In the present embodiment, I is simulated using the preset SPI interface of Zigbee microprocessors2S interfaces connect corresponding audio DAC chip,
The I that Zigbee microprocessors are simulated by SPI interface2S interfaces export audio data to audio DAC chip.Namely the present embodiment
In, it is multiplexed by SPI interface, while accessing Flash chip and audio DAC chip.Specifically, the CLK and MOSI of SPI interface draw
Foot is connected to Flash chip and audio DAC chip simultaneously.In addition, the MISO pins of SPI interface are connected individually to Flash chip,
Reading for the audio data stored in Flash chip.
Since the CLK clocks of SPI interface keep working condition, the CS pieces of SPI interface cannot be used to select, therefore, this implementation
In example, Zigbee microprocessors are additionally provided with corresponding common IO (input and output) interface, for ease of description, hereafter by the IO
Interface is known as the first I/O interface, and the enabled CS pieces that Flash chip is simulated using first I/O interface are selected.Specifically, Zigbee is micro-
Processor connects the CS chip selection signal pins of Flash chip based on first I/O interface, simulates the CS pieces choosing letter of Flash chip
Number.Also, Zigbee microprocessors are additionally provided with another common I/O interface, for ease of description, hereafter by this other one
A I/O interface is known as second IO interface, and the WS word selection signal pins of audio DAC chip are connected using the second IO interface, simulates WS
Word selection signal.
As shown in figure 5, for an optional audio frequency broadcast system hardware connection structure block schematic illustration of the present embodiment.
Zigbee microprocessors connect Flash chip and audio DAC chip simultaneously, while audio DAC chip is connected through corresponding power amplifier
Loud speaker.
When needing to play audio, Zigbee microprocessors read the phase stored in Flash chip connected to it first
The audio data answered, optionally, the step S10 includes：
Step a, the CS signals that the Zigbee microprocessors enable the Flash chip based on first I/O interface draw
Foot sends the read command to the Flash chip, so that the Flash chip is when receiving the reading order, feeds back phase
The audio data answered；
Step b, the MISO input data lines based on the SPI interface receive the audio of the Flash chip feedback
Data.
Optionally, when needing to play audio, Zigbee microprocessors enable the CS of Flash chip based on the first I/O interface
Signal pins send the read command to Flash chip.When Flash chip receives the reading order, corresponding audio is fed back
Data are to Zigbee microprocessors.MISO data line of the Zigbee microprocessors based on SPI interface receives Flash chip feedback
The audio data.
Later, Zigbee microprocessors export the audio data of reading to audio DAC chip connected to it.It is optional
Ground before the step S20, further includes：
Step c obtains the audio-frequency information for including in the frame head of the audio data；
Step d configures the working frequency of the Zigbee microprocessors according to the audio-frequency information.
Optionally, since the audio-frequency informations such as different audio datas its corresponding code check, size of data will be different,
Before carrying out audio broadcasting, first the working frequency of Zigbee microprocessors is configured.Specifically, in the frame head of audio data
Include the audio-frequency informations such as the audio code rate, channel information, size of data of audio data.When Zigbee microcomputer reads to sound
Frequency obtains the audio-frequency information for including in the frame head of the audio data after, later, according to the audio-frequency information, configuration
The working frequency of Zigbee microprocessors, with the switching of the broadcasting code check and left and right acoustic channels of audio data.
Optionally, before the step S20, further include：
Step e, Zigbee microprocessor overturns the I/O signal of the second IO interface using timer, generates
Pwm pulse bandwidth modulation signals, to simulate ws signal according to the pwm signal；
Step f is based on preset PWM simultaneously matchs value, and Phase synchronization is carried out to the ws signal of simulation.
Optionally, before carrying out audio broadcasting, Zigbee microprocessors are to simulating I2It is same that the ws signal of S carries out phase
Step.Specifically, since ws signal waveform is very simple, when left and right acoustic channels digit is identical, high level and low level time phase
Together, so ws signal waveform may be considered the PWM of a 50-50 duty ratio, (Pulse Width Modulation, pulse are wide
Degree modulation) signal waveform.Therefore, in the present embodiment, the I/O signal of second IO interface is overturn using timer, is generated
Pwm signal, to simulate ws signal according to the pwm signal.And be based on preset PWM simultaneously matchs value, to the ws signal of simulation into
Row Phase synchronization.
As shown in the sequential of SPI in Fig. 3, when SCK be in rising edge and send LSB (Least Significant Bit,
Least significant bit) when, just past 16 SCK clock cycle, at the same time, pwm signal then needs that matching overturning occurs.
The ws signal simulated is overturn when sending the rising edge of LSB bit.But I2The ws signal that S is required needs half of SCK in advance
Period overturns, i.e., is overturn in the failing edge of SCK.Therefore, a PWM simultaneously match value is set so that PWM is same with SPI
Step, namely realize the Phase synchronization of the ws signal of simulation.
Optionally, which is set according to following preset formula：
- half SCK clocks number of the PWM simultaneously matchs value=timer matching value+asynchronous starting time difference；
Wherein, timer matching value needs the code check according to output audio to calculate acquisition, and the asynchronous starting time difference refers to reality
It in the relative time delay that border PWM starts and SPI starts, needs to be formulated according to specific program translation and compiling environment, and is ensureing hardware loop
Under the unanimous circumstances of border, it can achieve the purpose that general.
Configured in the working frequency to Zigbee microprocessors, and complete simulation ws signal Phase synchronization it
Afterwards, Zigbee microprocessors export the audio data of reading to audio DAC chip.
When audio DAC chip receives the audio data of Zigbee microprocessors output, to the audio data into line number
Type matrix intends signal conversion processes, which is converted into corresponding analog audio signal, later by the analogue audio frequency of generation
Signal transmission is to power amplifier, and drive the speaker plays corresponding audio after power amplifier carries out signal enhanced processing.
The present embodiment utilizes the hardware resource and processing capacity of Zigbee microprocessors, it is not necessary to which additional extension one is complete again
Embedded system (voice playing module) and a set of independent software module is developed again therefore reduce cost.Also,
Due to being to store audio data using Flash chip, audio data can be updated and extend, and pass through audio DAC
The quality that chip exports audio is high, to substantially increase user experience.
Scheme provided in this embodiment, Zigbee microprocessors are based on preset SPI interface and connect Flash chip, Yi Jiji
I is simulated in SPI interface2S interfaces connect audio DAC chip, and Zigbee microprocessors are based on the SPI interface and read Flash chip
The audio data of middle storage, and by audio data I based on simulation2S interfaces are exported to audio DAC chip, audio DAC chip
The audio data received is converted into corresponding analog audio signal, which drives after power amplifier is handled and raise
Sound device plays corresponding audio.Since the hardware resource and processing capacity of Zigbee microprocessors is utilized, it is not necessary to additional again to expand
It opens up a complete embedded system (voice playing module) and develops a set of independent software module again, therefore reduce
Cost；And due to being to realize the update and extension of audio data using Flash chip storage audio data, and pass through sound
The quality that frequency DAC chip exports audio is high, namely has achieved the effect that take into account cost and quality.
Further, the control method second embodiment that audio broadcasting of the present invention is proposed based on first embodiment, in this reality
It applies in example, Zigbee microprocessors further include first buffering area and second buffering area, as shown in fig. 6, after the step S10,
Further include：
The audio data is cached in the first buffering area and the second buffering area by step S30；
The step S20 includes：
The audio data cached in the first buffering area and the second buffering area is based on by step S21 successively
The I2S interfaces are exported to the audio DAC chip.
In the present embodiment, Zigbee microprocessors are configured with corresponding two buffering areas, for ease of description, hereafter by this
Two buffering areas are known as first buffering area and second buffering area.Optionally, the spatial cache of first buffering area and second buffering area
It is set as 4KB.It will be appreciated by persons skilled in the art that the spatial cache of first buffering area and second buffering area can also root
Other values are set as according to practical application scene, are not limited in the present embodiment.When Zigbee microprocessors are from Flash chip
After reading audio data, audio data is cached in first buffering area and second buffering area.It later, successively will be by first
The audio data cached in buffering area and second buffering area is based on I2S interfaces are exported to audio DAC chip, pass through audio DAC cores
Piece converts thereof into analog audio signal, and drive the speaker plays corresponding audio after power amplifier amplifies.
Optionally, before the step S10, further include：
When receiving audio play instruction, suspend Zigbee protocol stack data processing；
After the step S20, further include：
At the end of the audio plays, restore the Zigbee protocol stack data processing.
When user triggers audio playing condition, such as clicks preset audio play control, corresponding audio is triggered
Play instruction.When Zigbee microprocessors receive the audio play instruction, suspend Zigbee protocol stack data processing, executes
Above-mentioned audio data is read to be operated with output, realizes that audio plays.Later, at the end of audio plays, restore reduction
Zigbee protocol stack data processing.
Optionally, in order to which the reading and output that ensure audio data do not stop, using first buffering area and second buffering area
The audio data for carrying out " ping pong scheme " is read and output.Specifically, the control method of the audio broadcasting includes：
Step g continuously transmits twi-read order to the Flash chip, so that the Flash chip feeds back the sound
The first two sections audio data section of frequency evidence；
The first two sections audio data section is cached in the first buffering area and the second buffering area by step h respectively
In；
Step i exports the audio data section of current cache in the first buffering area to the audio DAC chip；
Step j judges the audio number when audio data section output of current cache finishes in the first buffering area
According to whether reading and finish；
Step k, if it is not, the Flash chip is then sent the read command to, so that the Flash chip feeds back the sound
Next section audio data section of frequency evidence；
Step l exports the audio data section of current cache in the second buffering area to the audio DAC chip；With
And the audio data section that the Flash chip is fed back is cached in the first buffering area；
Step m judges the audio number when audio data section output of current cache finishes in the second buffering area
According to whether reading and finish；
Step n, if it is not, the Flash chip is then sent the read command to, so that the Flash chip feeds back the sound
Next section audio data section of frequency evidence；And continues to return and execute the audio number by current cache in the first buffering area
The step of exporting to the audio DAC chip according to section, until audio data reading finishes, the first buffering area and described
The audio data section output cached in second buffering area is completed.
Specifically, in the present embodiment, as shown in fig. 7, when Zigbee microprocessors receive audio play instruction, pause
Zigbee protocol stack data processing continuously transmits twi-read order after Zigbee microprocessors enable Flash chip CS pieces choosing
To Flash chip.When Flash chip receives the reading order, the corresponding first two sections audio data section of feedback audio data.
Optionally, in the case where the spatial cache size of first buffering area and second buffering area is 4KB, which is corresponding
4KB sector read commands, Zigbee microprocessors continuously transmit twice 4KB sector read commands to Flash chip.Work as Flash
When chip receives the 4KB sector read commands, the sector audio data section of corresponding 4KB is fed back to Zigbee microprocessors.
When Zigbee microprocessors receive the first two sections audio data section of Flash chip feedback, by the first two sections sound
Frequency data segment is cached in first buffering area and second buffering area respectively.
Later, the frame head of the audio data included in audio data section of the Zigbee microprocessors from caching obtains
The audio-frequency information for including in the frame head configures the working frequency of Zigbee microprocessors according to the audio-frequency information, with an audio number
According to broadcasting code check and left and right acoustic channels switching.And the Phase synchronization of simulation ws signal is completed using timer, concrete operations are such as
Described in first embodiment, details are not described herein.
Later, Zigbee microprocessors export the audio data section of current cache in first buffering area to audio DAC cores
Piece exports corresponding audio for audio DAC chip.When the audio data section output of current cache finishes in first buffering area,
Whether audio data, which reads, finishes.For example, obtaining the size of the audio data in the audio-frequency information that frame head includes, and work as
The summation size of the preceding audio data section exported, between the size of comparing audio data and the summation size of audio data section
Difference whether be less than buffering area spatial cache size.For example, if the spatial cache of first buffering area and second buffering area is big
Small is 4KB, then whether the difference between the size of audio data and the summation size of audio data section is less than 4KB.If so,
Then audio data reading finishes；If conversely, the difference between the size of audio data and the summation size of audio data section
More than the spatial cache size of buffering area, then audio data does not read also and finishes.It will be appreciated by those skilled in the art that
It is that can also carry out audio data by other means and whether read to finish, is not limited solely to a kind of above-mentioned judgement enumerated
Mode.
When the reading of Zigbee microprocessor audio datas finishes, by the audio number of current cache in second buffering area
It is exported to audio DAC chip according to section, corresponding audio is exported for audio DAC chip, so far audio data output finishes.Conversely,
When audio data, which is not read also, to be finished, Zigbee microprocessors suspend audio output, send reading again based on SPI interface
Take order to Flash chip, when Flash chip receives reading order again, Flash chip feeds back the next of audio data
Audio data section is saved to Zigbee microprocessors.
Zigbee microprocessors are sent the read command to after Flash chip again, restart audio output, by the second buffering
The audio data section of current cache is exported to audio DAC chip in area.And in the next section audio for receiving Flash chip feedback
When data segment, which is cached in first buffering area.The audio data section of current cache in second buffering area
Output is when finishing, and whether audio data reads and finish Zigbee microprocessors again.
When the reading of Zigbee microprocessor audio datas finishes, by the audio number of current cache in first buffering area
It is exported to audio DAC chip according to section, corresponding audio is exported for audio DAC chip, so far audio data output finishes.Conversely,
When audio data, which is not read also, to be finished, Zigbee microprocessors suspend audio output, send reading again based on SPI interface
Take order to Flash chip, when Flash chip receives reading order again, Flash chip feeds back the next of audio data
Audio data section is saved to Zigbee microprocessors.
Zigbee microprocessors are sent the read command to after Flash chip again, restart audio output, by the first buffering
The audio data section of current cache is exported to audio DAC chip in area.And in the next section audio for receiving Flash chip feedback
When data segment, which is cached in second buffering area.The audio data section of current cache in first buffering area
Output is when finishing, and whether audio data reads and finish Zigbee microprocessors again.Zigbee micro processor loops execute
Aforesaid operations, until audio data reading finishes, the audio data section cached in first buffering area and second buffering area has exported
At.Later, Zigbee microprocessor recoveries restore Zigbee protocol stack data processing.
Therefore, in the audio output mode, when the audio data of one of buffering area exhausts, Zigbee microprocessors
Device, which is sent, reads instruction to Flash chip, then restores audio output, exports the audio number cached in another buffering area
According to the process time is extremely short, it is ensured that completed within ms grades of times, user will not be allowed to generate difference acoustically substantially.
The audio data section read from Flash chip is buffered in the buffering area that current audio data exhausts by Zigbee microprocessors
In.It is exhausted when the audio data cached in the buffering area exported exports again, then executes the reading behaviour of audio data again
Make, the above process, guarantee audio data section export cycle without interrupting the flow in cycles.
Scheme provided in this embodiment, Zigbee microprocessors include first buffering area and second buffering area, when first slow
Buffering area one of is rushed in area and second buffering area currently when carrying out audio output, another buffer cache from
The audio data section next to be exported read in Flash chip, two buffering area cycles execute the above process until audio
Data output is completed.Audio data is exported by this " ping pong scheme ", to ensure that audio data output does not stop, significantly
Improve user experience.
In addition, the embodiment of the present invention also proposes a kind of control system that audio plays.
In the present embodiment, the control system that audio plays includes Zigbee microprocessors, Flash chip and audio DAC cores
Piece, the Zigbee microprocessors are based on preset SPI interface and connect the Flash chip, and based on SPI interface simulation
I2S interfaces connect the audio DAC chip, wherein：
The Flash chip, for when receiving the reading order that the Zigbee microprocessors are sent, feedback to be corresponding
Audio data to the Zigbee microprocessors；
The Zigbee microprocessors, for sending the read command to the Flash chip；And it is described receiving
When the audio data of Flash chip feedback, the audio data is exported to the audio DAC chip；
The audio DAC chip, for when receiving the audio data, the audio data being converted into corresponding
Analog audio signal, analog audio signal drive the speaker after power amplifier is handled play corresponding audio.
In the present embodiment, Zigbee microprocessors preset SPI (Serial Peripheral Interface, it is serial outer
If interface), SPI is a kind of high speed, full duplex, and synchronous communication bus generally has four lines, be respectively CS (piece choosing) line,
CLK (clock) line, MISO (input data) lines and MOSI (output data) line.SPI interface is usually used in external Flash (flash memory) core
Piece.In the present embodiment, Zigbee microprocessors connect corresponding Flash chip, the Flash cores based on its preset SPI interface
Corresponding audio data is stored in piece.
I2S (Inter-IC Sound, integrated circuit built-in audio bus) interface is commonly used in high quality multimedia audio
The access of DAC (Digital to analog converte, digital-to-analogue conversion) chip, I2S also includes generally four lines, is respectively
BCLK (bit clock) line, MCLK (master clock) line, WS (word selection signal) lines and SDATA (data) line.
As shown in Figure 3 and Figure 4, SPI and I2The clock of S and data line logic are almost the same, the I of outbound course2S ratios SPI is more
One WS word selection signal and a MCLK master clock signal.Wherein, for MCLK master clock signals, some audio DAC chips
It can be by internal PLL (phaselocked loop is usually used in the process of frequency multiplication of clock signal), automatically from the generation of BCLK bit clock signals
The MCLK master clock signals matched, therefore the MCLK master clock signals can not be provided.And for WS word selection signals, it acts as areas
The left and right acoustic channels of multi-voice frequency data can simulate ws signal by certain software synchronization means using common I/O port.Therefore,
In the present embodiment, I is simulated using the preset SPI interface of Zigbee microprocessors2S interfaces connect corresponding audio DAC chip,
The I that Zigbee microprocessors are simulated by SPI interface2S interfaces export audio data to audio DAC chip.Namely the present embodiment
In, it is multiplexed by SPI interface, while accessing Flash chip and audio DAC chip.Specifically, the CLK and MOSI of SPI interface draw
Foot is connected to Flash chip and audio DAC chip simultaneously.In addition, the MISO pins of SPI interface are connected individually to Flash chip,
Reading for the audio data stored in Flash chip.
Since the CLK clocks of SPI interface keep working condition, the CS pieces of SPI interface cannot be used to select, therefore, this implementation
In example, Zigbee microprocessors are additionally provided with corresponding common IO (input and output) interface, for ease of description, hereafter by the IO
Interface is known as the first I/O interface, and the enabled CS pieces that Flash chip is simulated using first I/O interface are selected.Specifically, Zigbee is micro-
Processor connects the CS chip selection signal pins of Flash chip based on first I/O interface, simulates the CS pieces choosing letter of Flash chip
Number.Also, Zigbee microprocessors are additionally provided with another common I/O interface, for ease of description, hereafter by this other one
A I/O interface is known as second IO interface, and the WS word selection signal pins of audio DAC chip are connected using the second IO interface, simulates WS
Word selection signal.
As shown in figure 5, for an optional audio frequency broadcast system hardware connection structure block schematic illustration of the present embodiment.
Zigbee microprocessors connect Flash chip and audio DAC chip simultaneously, while audio DAC chip is connected through corresponding power amplifier
Loud speaker.
When needing to play audio, Zigbee microprocessors read the phase stored in Flash chip connected to it first
The audio data answered.Optionally, Zigbee microprocessors enable the CS signal pins of Flash chip, hair based on the first I/O interface
Send reading order to Flash chip.When Flash chip receives the reading order, corresponding audio data is fed back extremely
Zigbee microprocessors.MISO data line of the Zigbee microprocessors based on SPI interface receives the audio of Flash chip feedback
Data.
Later, Zigbee microprocessors export the audio data of reading to audio DAC chip connected to it.It is optional
Ground is carrying out audio broadcasting since the audio-frequency informations such as different audio datas its corresponding code check, size of data will be different
Before, first the working frequency of Zigbee microprocessors is configured.Specifically, in the frame head of audio data include audio number
According to the audio-frequency informations such as audio code rate, channel information, size of data.After Zigbee microcomputer reads are to audio data,
The audio-frequency information for including in the frame head of the audio data is obtained, later, according to the audio-frequency information, configures Zigbee microprocessors
Working frequency, with the switching of the broadcasting code check and left and right acoustic channels of audio data.
Optionally, before carrying out audio broadcasting, Zigbee microprocessors are to simulating I2It is same that the ws signal of S carries out phase
Step.Specifically, since ws signal waveform is very simple, when left and right acoustic channels digit is identical, high level and low level time phase
Together, so ws signal waveform may be considered the PWM of a 50-50 duty ratio, (Pulse Width Modulation, pulse are wide
Degree modulation) signal waveform.Therefore, in the present embodiment, the I/O signal of second IO interface is overturn using timer, is generated
Pwm signal, to simulate ws signal according to the pwm signal.And be based on preset PWM simultaneously matchs value, to the ws signal of simulation into
Row Phase synchronization.
As shown in the sequential of SPI in Fig. 3, when SCK be in rising edge and send LSB (Least Significant Bit,
Least significant bit) when, just past 16 SCK clock cycle, at the same time, pwm signal then needs that matching overturning occurs.
The ws signal simulated is overturn when sending the rising edge of LSB bit.But I2The ws signal that S is required needs half of SCK in advance
Period overturns, i.e., is overturn in the failing edge of SCK.Therefore, a PWM simultaneously match value is set so that PWM is same with SPI
Step, namely realize the Phase synchronization of the ws signal of simulation.
Optionally, which is set according to following preset formula：
- half SCK clocks number of the PWM simultaneously matchs value=timer matching value+asynchronous starting time difference；
Wherein, timer matching value needs the code check according to output audio to calculate acquisition, and the asynchronous starting time difference refers to reality
It in the relative time delay that border PWM starts and SPI starts, needs to be formulated according to specific program translation and compiling environment, and is ensureing hardware loop
Under the unanimous circumstances of border, it can achieve the purpose that general.
Configured in the working frequency to Zigbee microprocessors, and complete simulation ws signal Phase synchronization it
Afterwards, Zigbee microprocessors export the audio data of reading to audio DAC chip.
When audio DAC chip receives the audio data of Zigbee microprocessors output, to the audio data into line number
Type matrix intends signal conversion processes, which is converted into corresponding analog audio signal, later by the analogue audio frequency of generation
Signal transmission is to power amplifier, and drive the speaker plays corresponding audio after power amplifier carries out signal enhanced processing.
The present embodiment utilizes the hardware resource and processing capacity of Zigbee microprocessors, it is not necessary to which additional extension one is complete again
Embedded system (voice playing module) and a set of independent software module is developed again therefore reduce cost.Also,
Due to being to store audio data using Flash chip, audio data can be updated and extend, and pass through audio DAC
The quality that chip exports audio is high, to substantially increase user experience.
Scheme provided in this embodiment, Zigbee microprocessors are based on preset SPI interface and connect Flash chip, Yi Jiji
I is simulated in SPI interface2S interfaces connect audio DAC chip, and Zigbee microprocessors are based on the SPI interface and read Flash chip
The audio data of middle storage, and by audio data I based on simulation2S interfaces are exported to audio DAC chip, audio DAC chip
The audio data received is converted into corresponding analog audio signal, which drives after power amplifier is handled and raise
Sound device plays corresponding audio.Since the hardware resource and processing capacity of Zigbee microprocessors is utilized, it is not necessary to additional again to expand
It opens up a complete embedded system (voice playing module) and develops a set of independent software module again, therefore reduce
Cost；And due to being to realize the update and extension of audio data using Flash chip storage audio data, and pass through sound
The quality that frequency DAC chip exports audio is high, namely has achieved the effect that take into account cost and quality.
In addition, the embodiment of the present invention also proposes a kind of computer readable storage medium, the computer readable storage medium
On be stored with audio and play control program, the audio plays when control program is executed by processor and realizes following operation：
Zigbee microprocessors read the audio data stored in Flash chip based on SPI interface；
The audio data is based on I2S interfaces are exported to audio DAC chip, so that the audio DAC chip will be described
Audio data is converted into corresponding analog audio signal, and analog audio signal drive the speaker after power amplifier is handled plays phase
The audio answered.
Further, the audio plays when control program is executed by processor and also realizes following operation：
The Zigbee microprocessors enable the CS signal pins of the Flash chip based on the first I/O interface, send and read
Order is taken to feed back corresponding audio to the Flash chip so that the Flash chip is when receiving the reading order
Data；
MISO input data lines based on the SPI interface receive the audio data of the Flash chip feedback.
Further, the audio plays when control program is executed by processor and also realizes following operation：
The Zigbee microprocessors overturn the I/O signal of second IO interface using timer, generate pwm pulse
Bandwidth modulation signals, to simulate ws signal according to the pwm signal；
Based on preset PWM simultaneously matchs value, Phase synchronization is carried out to the ws signal of simulation.
Further, the audio plays when control program is executed by processor and also realizes following operation：
Obtain the audio-frequency information for including in the frame head of the audio data；
According to the audio-frequency information, the working frequency of the Zigbee microprocessors is configured.
Further, the audio plays when control program is executed by processor and also realizes following operation：
The audio data is cached in first buffering area and second buffering area；
The audio data cached in the first buffering area and the second buffering area is based on the I successively2S connects
Mouth is exported to the audio DAC chip.
Further, the audio plays when control program is executed by processor and also realizes following operation：
Twi-read order is continuously transmitted to the Flash chip, so that the Flash chip feeds back the audio data
It is first two section audio data section；
The first two sections audio data section is cached in the first buffering area and the second buffering area respectively；
The audio data section of current cache in the first buffering area is exported to the audio DAC chip；
When the audio data section output of current cache finishes in the first buffering area, whether the audio data is judged
Reading finishes；
If it is not, the Flash chip is then sent the read command to, so that the Flash chip feeds back the audio data
Next section audio data section；
The audio data section of current cache in the second buffering area is exported to the audio DAC chip；And by institute
The audio data section for stating Flash chip feedback is cached in the first buffering area；
When the audio data section output of current cache finishes in the second buffering area, whether the audio data is judged
Reading finishes；
If it is not, the Flash chip is then sent the read command to, so that the Flash chip feeds back the audio data
Next section audio data section；And it is defeated to continue the return execution audio data section by current cache in the first buffering area
The step of going out to the audio DAC chip, until audio data reading finishes, the first buffering area and described second is delayed
The audio data section output cached in area is rushed to complete.
Further, the audio plays when control program is executed by processor and also realizes following operation：
When receiving audio play instruction, suspend Zigbee protocol stack data processing；
At the end of audio plays, restore the Zigbee protocol stack data processing.
Scheme provided in this embodiment, Zigbee microprocessors are based on preset SPI interface and connect Flash chip, Yi Jiji
I is simulated in SPI interface2S interfaces connect audio DAC chip, and Zigbee microprocessors are based on the SPI interface and read Flash chip
The audio data of middle storage, and by audio data I based on simulation2S interfaces are exported to audio DAC chip, audio DAC chip
The audio data received is converted into corresponding analog audio signal, which drives after power amplifier is handled and raise
Sound device plays corresponding audio.Since the hardware resource and processing capacity of Zigbee microprocessors is utilized, it is not necessary to additional again to expand
It opens up a complete embedded system (voice playing module) and develops a set of independent software module again, therefore reduce
Cost；And due to being to realize the update and extension of audio data using Flash chip storage audio data, and pass through sound
The quality that frequency DAC chip exports audio is high, namely has achieved the effect that take into account cost and quality.
It should be noted that herein, the terms "include", "comprise" or its any other variant are intended to non-row
His property includes, so that process, method, article or system including a series of elements include not only those elements, and
And further include other elements that are not explicitly listed, or further include for this process, method, article or system institute it is intrinsic
Element.In the absence of more restrictions, the element limited by sentence "including a ...", it is not excluded that including this
There is also other identical elements in the process of element, method, article or system.
The embodiments of the present invention are for illustration only, can not represent the quality of embodiment.
Through the above description of the embodiments, those skilled in the art can be understood that above-described embodiment side
Method can add the mode of required general hardware platform to realize by software, naturally it is also possible to by hardware, but in many cases
The former is more preferably embodiment.Based on this understanding, technical scheme of the present invention substantially in other words does the prior art
Going out the part of contribution can be expressed in the form of software products, which is stored in one as described above
In storage medium (such as ROM/RAM, magnetic disc, CD), including some instructions use so that a station terminal equipment (can be mobile phone,
Computer, server or network equipment etc.) execute method described in each embodiment of the present invention.
It these are only the preferred embodiment of the present invention, be not intended to limit the scope of the invention, it is every to utilize this hair
Equivalent structure or equivalent flow shift made by bright specification and accompanying drawing content is applied directly or indirectly in other relevant skills
Art field, is included within the scope of the present invention.
Claims (12)
1. the control method that a kind of audio plays is applied to Zigbee ZigBee protocol microprocessors, which is characterized in that described
Zigbee microprocessors are based on preset SPI Serial Peripheral Interface (SPI)s and connect Flash flash chips, and are based on the SPI interface mould
Quasi- I2S integrated circuit built-in audio bus interface connects audio DAC analog-digital chips, the control method packet that the audio plays
Include following steps：
Zigbee microprocessors read the audio data stored in the Flash chip based on the SPI interface；
The audio data is based on the I2S interfaces are exported to the audio DAC chip, so that the audio DAC chip is by institute
It states audio data and is converted into corresponding analog audio signal, analog audio signal drive the speaker after power amplifier is handled plays
Corresponding audio.
2. the control method that audio as described in claim 1 plays, which is characterized in that the Zigbee microprocessors further include
First IO input/output interfaces connect the CS chip selection signal pins of the Flash chip based on first I/O interface, described
Zigbee microprocessors based on the SPI interface read Flash chip in store audio data the step of include：
The Zigbee microprocessors enable the CS signal pins of the Flash chip based on first I/O interface, send and read
Order is taken to feed back corresponding audio to the Flash chip so that the Flash chip is when receiving the reading order
Data；
MISO input data lines based on the SPI interface receive the audio data of the Flash chip feedback.
3. the control method that audio as described in claim 1 plays, which is characterized in that the Zigbee microprocessors further include
Second IO interface connects the WS word selection signal pins of the audio DAC chip based on the second IO interface, described by the sound
Frequency is according to based on the I2S interfaces are exported to before the step of the audio DAC chip, further include：
The Zigbee microprocessors overturn the I/O signal of the second IO interface using timer, generate pwm pulse
Bandwidth modulation signals, to simulate ws signal according to the pwm signal；
Based on preset PWM simultaneously matchs value, Phase synchronization is carried out to the ws signal of simulation.
4. the control method that audio as described in claim 1 plays, which is characterized in that described that the audio data is based on institute
State I2S interfaces are exported to before the step of the audio DAC chip, further include：
Obtain the audio-frequency information for including in the frame head of the audio data；
According to the audio-frequency information, the working frequency of the Zigbee microprocessors is configured.
5. the control method that audio as described in claim 1 plays, which is characterized in that the Zigbee microprocessors further include
First buffering area and second buffering area, the Zigbee microprocessors are read in Flash chip based on the SPI interface and are stored
After the step of audio data, further include：
The audio data is cached in the first buffering area and the second buffering area；
It is described that the audio data is based on the I2S interfaces were exported to the step of audio DAC chip：
The audio data cached in the first buffering area and the second buffering area is based on the I successively2S interfaces are defeated
Go out to the audio DAC chip.
6. the control method that audio as claimed in claim 5 plays, which is characterized in that the first buffering area and described second
The spatial cache of buffering area is set as 4KB.
7. the control method that audio as claimed in claim 5 plays, which is characterized in that the control method packet that the audio plays
It includes：
Twi-read order is continuously transmitted to the Flash chip, so that the Flash chip feeds back the head of the audio data
Two section audio data sections；
The first two sections audio data section is cached in the first buffering area and the second buffering area respectively；
The audio data section of current cache in the first buffering area is exported to the audio DAC chip；
When the audio data section output of current cache finishes in the first buffering area, judge whether the audio data reads
It finishes；
If it is not, the Flash chip is then sent the read command to, so that the Flash chip is fed back under the audio data
One section audio data section；
The audio data section of current cache in the second buffering area is exported to the audio DAC chip；And it will be described
The audio data section of Flash chip feedback is cached in the first buffering area；
When the audio data section output of current cache finishes in the second buffering area, judge whether the audio data reads
It finishes；
If it is not, the Flash chip is then sent the read command to, so that the Flash chip is fed back under the audio data
One section audio data section；And continue return execute the audio data section by current cache in the first buffering area export to
The step of audio DAC chip, until audio data reading finishes, the first buffering area and the second buffering area
The audio data section output of middle caching is completed.
8. the control method played such as claim 1-7 any one of them audios, which is characterized in that the Zigbee microprocessors
Before the step of device reads the audio data stored in Flash chip based on the SPI interface, further include：
When receiving audio play instruction, suspend Zigbee protocol stack data processing；
It is described that the audio data is based on the I2S interfaces are exported to the audio DAC chip, for the audio DAC chip
The audio data is converted into corresponding analog audio signal, analog audio signal drive the speaker after power amplifier is handled
After the step of playing corresponding audio, further include：
At the end of the audio plays, restore the Zigbee protocol stack data processing.
9. the control device that a kind of audio plays, which is characterized in that the control device that the audio plays includes：Memory, place
It manages device and is stored in the audio that can be run on the memory and on the processor and play control program, the audio plays
Control program realizes the control method that the audio as described in any one of claim 1-8 plays when being executed by the processor
Step.
10. a kind of Zigbee microprocessors, which is characterized in that the Zigbee microprocessors include as claimed in claim 9
The control device that audio plays.
11. the control system that a kind of audio plays, which is characterized in that the control system that the audio plays includes the micro- places Zigbee
Device, Flash chip and audio DAC chip are managed, the Zigbee microprocessors are based on preset SPI interface and connect the Flash cores
Piece, and based on the I of SPI interface simulation2S interfaces connect the audio DAC chip, wherein：
The Flash chip, for when receiving the reading order that the Zigbee microprocessors are sent, feeding back corresponding sound
Frequency is according to the Zigbee microprocessors；
The Zigbee microprocessors, for sending the read command to the Flash chip；And receiving the Flash
When the audio data of chip feedback, the audio data is exported to the audio DAC chip；
The audio DAC chip, for when receiving the audio data, the audio data to be converted into corresponding simulation
Audio signal, analog audio signal drive the speaker after power amplifier is handled play corresponding audio.
12. a kind of computer readable storage medium, which is characterized in that be stored with audio on the computer readable storage medium and broadcast
Control program is put, the audio is played when control program is executed by processor and realized as described in any one of claim 1-8
The step of control method that audio plays.
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| CN112689223A (en) * | 2021-01-04 | 2021-04-20 | 重庆矢崎仪表有限公司 | Voice playing system and method for automobile combination instrument |
| CN112799993A (en) * | 2019-10-28 | 2021-05-14 | 成都鼎桥通信技术有限公司 | Method and device for realizing I2S communication |
| WO2023103749A1 (en) * | 2021-12-07 | 2023-06-15 | 苏州上声电子股份有限公司 | Clock generation method for i2s audio bus, system, and dac circuit |
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