CN108303604B - Phase sequence detection device and phase sequence detection method - Google Patents

Phase sequence detection device and phase sequence detection method Download PDF

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CN108303604B
CN108303604B CN201711466908.1A CN201711466908A CN108303604B CN 108303604 B CN108303604 B CN 108303604B CN 201711466908 A CN201711466908 A CN 201711466908A CN 108303604 B CN108303604 B CN 108303604B
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phase
pulse
waveform
line voltage
phase sequence
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CN108303604A (en
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陈惠军
谭瑞民
袁涛
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Zhejiang Holip Electronic Technology Co Ltd
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Zhejiang Holip Electronic Technology Co Ltd
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    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R29/00—Arrangements for measuring or indicating electric quantities not covered by groups G01R19/00 - G01R27/00
    • G01R29/18—Indicating phase sequence; Indicating synchronism
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R29/00—Arrangements for measuring or indicating electric quantities not covered by groups G01R19/00 - G01R27/00
    • G01R29/16—Measuring asymmetry of polyphase networks

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Abstract

Provided are a phase sequence detection device and a phase sequence detection method. According to an embodiment of the present disclosure, the phase sequence detecting apparatus may include: a waveform detection circuit for detecting respective waveforms of a line voltage of a first phase with respect to a second phase and a line voltage of the second phase with respect to a third phase of the three-phase alternating-current power; and a signal processor for determining a phase sequence of the alternating-current power or whether a phase-loss fault occurs, based on an interval in time between the waveforms detected by the waveform detection circuit. According to the embodiment of the disclosure, the phase sequence detection can be conveniently, effectively and reliably realized in a mode of combining software and hardware.

Description

Phase sequence detection device and phase sequence detection method
Technical Field
The present disclosure relates generally to power electronics, and more particularly, to a phase sequence detection apparatus and a phase sequence detection method.
Background
Many electrical devices such as frequency converters need to perform phase detection during use to prevent phase loss and determine phase sequence. Currently, hardware circuits are commonly used for phase detection. However, such a circuit is generally complex, has a narrow application voltage range, is poor in grid adaptability (for example, the circuit can only be used under 50 Hz), uses a large number of components, and has low reliability.
Disclosure of Invention
In view of the above, it is an object of the present disclosure to provide a phase sequence detection apparatus and a phase sequence detection method to at least partially suppress or solve the above problems.
According to an aspect of the present disclosure, there is provided a phase sequence detection apparatus including: a waveform detection circuit for detecting respective waveforms of a line voltage of a first phase with respect to a second phase and a line voltage of the second phase with respect to a third phase of the three-phase alternating-current power; and a signal processor for determining a phase sequence of the alternating-current power or whether a phase-loss fault occurs, based on an interval in time between the waveforms detected by the waveform detection circuit.
Here, a hardware circuit, a waveform detection circuit, is used to sample line voltages, obtain their waveforms, and determine a phase sequence or a phase loss based on the obtained waveforms using an algorithm or software by a signal processor. The basic principle of the judgment is that the phase difference between the three phases of the three-phase alternating-current power is generally fixed under normal conditions. Since the judgment is realized by software, the complexity of a hardware circuit can be reduced, the number of used components is reduced, and the reliability can be improved. In addition, since the determination is implemented by software, different grids (e.g., 50Hz or 60Hz) can be accommodated by adjusting parameters in the algorithm. Moreover, the determination is made based on the phase difference (embodied as the interval between waveforms in time) regardless of the specific amplitude of the waveform. Therefore, the range of the use voltage is wide.
According to an embodiment of the present disclosure, the waveform detection circuit may include: a waveform conversion circuit configured to convert a waveform of a line voltage into a pulse waveform having the same period and phase as the waveform of the line voltage. The signal processor may be configured to make the determination based on the pulse waveform. For example, the waveform conversion circuit may be configured to convert a portion of the line voltage having an amplitude that exceeds a predetermined threshold into a pulse. The pulse shape facilitates the detection of the temporal position.
According to an embodiment of the disclosure, the signal processor may be configured to identify adjacent first and second pulses in a pulse waveform corresponding to the line voltage of the first phase relative to the second phase, and to identify a third pulse in the pulse waveform corresponding to the line voltage of the second phase relative to the third phase that is between the first and second pulses in time. The signal processor may be configured to make said determination in dependence on the intervals in time between said first and second pulses and said third pulse, respectively. Advantageously, the signal processor may be configured to begin identifying the third pulse after identifying the first pulse. The judgment is carried out based on the adjacent pulses in time, which is beneficial to the simplification of the algorithm.
In this case, the signal processing may be configured to determine the temporal separation between the two pulses from an intermediate instant of their respective durations. For example, the signal processor is configured to determine an intermediate instant of the duration of a pulse from the rising and falling edges of the pulse. This approach helps to improve the accuracy of determining the time position.
According to an embodiment of the present disclosure, the signal processor may be configured to: in the case that the third pulse is close to the first pulse, if the interval between the third pulse and the first pulse deviates from the time interval corresponding to the phase angle of 120 ° beyond a predetermined threshold, determining that a phase-missing fault occurs, otherwise determining that the phase sequence is correct; and determining that a phase-loss fault occurs if the interval between the third pulse and the second pulse deviates from a time interval corresponding to a phase angle of 120 ° by more than a predetermined threshold in case the third pulse is close to the second pulse, and otherwise determining that a phase sequence error occurs. For example, the predetermined threshold may be 25% of the time interval corresponding to a phase angle of 120 °.
According to an embodiment of the present disclosure, a waveform conversion circuit may include: an optical coupler whose input side photodiode receives a line voltage to be detected or a voltage proportional to the line voltage to be detected, whose output side transistor is connected to output a low level at an output node when the input side photodiode is on and a high level when the input side photodiode is off; and the logic conversion circuit receives the output at the output node of the optical coupler, converts the high level output into low level and converts the low level output into high level. And the isolation of high and low pressure can be realized through the optical coupler.
According to another aspect of the present disclosure, there is provided a phase sequence detection method, including: detecting respective waveforms of a line voltage of a first phase relative to a second phase and a line voltage of the second phase relative to a third phase of the three-phase alternating current power; and determining a phase sequence of the alternating-current power or whether a phase-loss fault occurs, based on an interval in time between waveforms detected by the waveform detection circuit. As described above, this determination may be implemented based on software or an algorithm.
According to an embodiment of the present disclosure, detecting the waveform may include converting the waveform of the line voltage into a pulse waveform having the same period and phase as the waveform of the line voltage. In this case, the determination is made based on the pulse waveform.
According to an embodiment of the present disclosure, making the determination may include: the method comprises identifying first and second adjacent pulses in a pulse waveform corresponding to the line voltage of the first phase relative to the second phase, and identifying a third pulse in the pulse waveform corresponding to the line voltage of the second phase relative to the third phase, temporally between the first and second pulses, and making the determination based on the temporal spacing between the first and second pulses and the third pulse, respectively.
According to embodiments of the present disclosure, the time interval between two pulses may be determined according to the intermediate time of their respective durations.
According to an embodiment of the present disclosure, in a case where the third pulse is close to the first pulse, if the interval between the third pulse and the first pulse deviates from the time interval corresponding to the phase angle of 120 ° by more than a predetermined threshold, it may be determined that the phase-loss fault occurs, otherwise it is determined that the phase sequence is correct. In addition, in the case where the third pulse is close to the second pulse, if the interval between the third pulse and the second pulse deviates from the time interval corresponding to the phase angle of 120 ° beyond a predetermined threshold, it may be determined that a phase-missing fault has occurred, and otherwise it is determined that a phase-sequence error has occurred.
As mentioned above, the solution proposed by the present disclosure is convenient, effective and reliable.
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The above and other objects, features and advantages of the present disclosure will become more apparent from the following description of embodiments of the present disclosure with reference to the accompanying drawings, in which:
FIG. 1 is a schematic diagram illustrating the detection principle according to an embodiment of the present disclosure;
FIG. 2 is a schematic block diagram illustrating a phase sequence detection apparatus according to an embodiment of the present disclosure;
FIG. 3 is a schematic diagram illustrating an example of waveform conversion according to an embodiment of the present disclosure;
fig. 4 is a circuit diagram illustrating an example of a waveform conversion circuit according to an embodiment of the present disclosure;
FIG. 5 is a schematic diagram illustrating the principle of a detection algorithm according to an embodiment of the present disclosure;
fig. 6 is a flow chart illustrating a phase sequence detection method according to an embodiment of the present disclosure.
Throughout the drawings, the same or similar reference numerals denote the same or similar components.
Detailed Description
Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. It should be understood that the description is illustrative only and is not intended to limit the scope of the present disclosure. Moreover, in the following description, descriptions of well-known structures and techniques are omitted so as to not unnecessarily obscure the concepts of the present disclosure.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. The words "a", "an" and "the" and the like as used herein are also intended to include the meanings of "a plurality" and "the" unless the context clearly dictates otherwise. Furthermore, the terms "comprises," "comprising," and the like, as used herein, specify the presence of stated features, steps, operations, and/or components, but do not preclude the presence or addition of one or more other features, steps, operations, or components.
All terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art unless otherwise defined. It is noted that the terms used herein should be interpreted as having a meaning that is consistent with the context of this specification and should not be interpreted in an idealized or overly formal sense.
Fig. 1 is a schematic diagram illustrating the detection principle according to an embodiment of the present disclosure.
For three-phase Alternating Current (AC) power, such as AC power from a power grid, the phase difference between the three phases is normally substantially constant (120 °). Thus, the phase difference of the line voltages between the adjacent two phases is also substantially constant. Fig. 1 schematically shows waveforms of a line voltage 1-2 of a first phase relative to a second phase and a line voltage 2-3 of the second phase relative to a third phase. The phase difference between these two line voltages is 120. More specifically, in time, the interval between the waveforms of the two line voltages is the time corresponding to the phase difference of 120 °, i.e. 1/3 of the period, 20ms/3 ≈ 6.7ms in the case of a 50Hz grid, 16.67ms/3 ≈ 5.6ms in the case of a 60Hz grid.
Here, the interval between two waveforms may refer to an interval between corresponding points of the two waveforms. By "respective points" it may be meant that they are at the same position in one cycle of the respective waveform, for example at the start position, 1/4 position, 1/2 position, 3/4 position, end position, etc. of the cycle. This is consistent with the definition in the art referring to waveform spacing. In the example of fig. 1, an interval between the intermediate timings Pa1 and Pb1 of the respective previous half cycles of the two waveforms is shown as an interval between the two waveforms. Ideally, the intermediate times Pa1 and Pb1 may correspond to peak points. Of course, the waveform interval may also be embodied as an interval between intermediate times (ideally, corresponding to valley points) of the latter half cycle, an interval between zero-crossing points, or the like.
Thus, the phase sequence detection may be performed based on the interval between the waveforms of the line voltages.
For example, under normal conditions, the interval between the waveform of line voltage 1-2 and the waveform of line voltage 2-3 should be around 1/3 cycles. A certain threshold value, for example, 25% of the 1/3 cycle, may be set in consideration of the influence of various noise and detection accuracy, etc. The interval deviation 1/3 periods should not normally exceed this threshold.
In the case of phase reversal, the interval between the waveform of line voltage 1-2 and the waveform of line voltage 2-3 should be around 2/3 cycles. At this point, the middle time Pb1 of the first half-cycle of the line voltage 2-3 is closer to the middle time Pa2 of the first half-cycle in the next cycle of the line voltage 1-2 than to the time Pa 1. In this case, the interval between the timing Pb1 and the timing Pa2 is similar to the interval between the timing Pb1 and the timing Pal in the above normal case, that is, around 1/3 cycles.
A phase-loss fault may be considered to have occurred if the interval between time Pb1 and time Pa1 (the forward case) or the interval between time Pb1 and time Pa2 (the reverse case) deviates from (e.g., is higher or lower than) 1/3 cycles beyond a threshold.
The detection algorithm can be designed according to the above principles. The algorithm need only be input with data (e.g., waveform samples) representative of the waveform, and in particular its temporal location. Thus, the design of the hardware part can be greatly simplified.
Fig. 2 is a schematic block diagram illustrating a phase sequence detection apparatus according to an embodiment of the present disclosure.
As shown in fig. 2, the phase sequence detecting apparatus 200 according to this embodiment may include a waveform detecting circuit 201 and a signal processor 203.
The waveform detection circuit 201 may be used to detect respective waveforms of a line voltage of a first phase relative to a second phase and a line voltage of the second phase relative to a third phase of a three-phase alternating current power (shown as AC in fig. 2). The waveform detection circuit 201 may be implemented in a variety of ways. For example, the waveform detection circuit 201 may simply sample a line voltage and send the sampled signal to the signal processor 203, and the signal processor 203 processes the sampled signal and calculates the interval between waveforms. Alternatively, the waveform detection circuit 201 may detect certain specific points (e.g., peak points, valley points, zero-crossing points, etc.) in the waveform of the line voltage, and calculate the intervals between the waveforms from the positions of these specific points by the signal processor 203.
According to an embodiment of the present disclosure, the waveform detecting circuit 201 may include a waveform converting circuit for converting a waveform of the line voltage into a pulse waveform having the same period and phase as the waveform of the line voltage. The pulse shape is advantageous for detection, particularly time position detection, because it has a discontinuity. The converted pulse waveform may be substantially aligned in time, i.e. in phase, with the pre-conversion waveform, so that the converted pulse waveform may represent the position in time of the pre-conversion waveform and may therefore be used for detection.
Fig. 3 is a schematic diagram illustrating an example of waveform conversion according to an embodiment of the present disclosure.
As shown in fig. 3, in this example, the waveform of the line voltage is converted into a sequence of square wave pulses. In particular, the portion of the line voltage whose amplitude V exceeds a predetermined threshold REF may be converted into a pulse. Thus, each pulse in the pulse train substantially coincides in time with a peak portion of the line voltage waveform. Of course, the rising and falling edges of the square waveform may have some slope due to possible delays in the circuit components. The threshold REF is adjustable.
Of course, the waveform conversion circuit may also be designed differently. For example, the waveform conversion circuit may generate a pulse train corresponding in time to a valley portion of the line voltage waveform (e.g., by converting portions of the line voltage having an amplitude V below a negative predetermined threshold into pulses).
Due to the similarity between the line voltages 1-2 and 2-3 (which should in principle have the same waveform regardless of noise and phase differences), the relative positional relationship in time of the converted pulse waveform and the relative positional relationship in time of the waveforms of the line voltages 1-2 and 2-3 can be kept the same regardless of the design of the waveform converting circuit by applying the same waveform converting circuit to the line voltages 1-2 and 2-3.
Fig. 4 is a circuit diagram illustrating an example of a waveform conversion circuit according to an embodiment of the present disclosure.
As shown in fig. 4, the waveform conversion circuit 400 according to this embodiment may include a comparison device 401 to compare a line voltage (e.g., a line voltage of the first phase AC1 relative to the second phase AC 2) to a threshold voltage REF. The comparison device 401 may have different outputs depending on the magnitude relationship between the line voltage and the threshold voltage REF. In this example, an opto-coupler capable of serving as an isolation function is used as the comparison means 401, taking into account the high voltage possible for the AC power (for example, 220V or 380V, etc., in the case of a power grid). The opto-coupler includes an input side photodiode PD and an output side transistor PT. When the line voltage is greater than the threshold voltage REF, a voltage across the input side photodiode PD of the optocoupler 401 may cause the photodiode PD to conduct and thus the output side transistor PT to conduct. On the other hand, when the line voltage is less than the threshold voltage REF, the voltage applied across the input side photodiode PD of the optocoupler 401 is insufficient to turn on the photodiode PD and thus turn off the output side transistor PT.
Here, the input side photodiode PD may receive a line voltage through the voltage dividing circuit 403. The voltage dividing circuit 403 includes voltage dividing resistors R1 and R2. The threshold voltage REF can be adjusted by adjusting the resistance values of the voltage dividing resistors R1 and R2 to adjust the voltage dividing ratio of the voltage dividing circuit 403.
Further, a diode D1 is connected in series on the input side to prevent a reverse current from flowing through the photodiode PD.
On the output side of the optical coupler 401, different signals, such as high and low level signals, may be output according to the on or off state of the output side transistor PT. There are numerous circuit designs in the art that can achieve this goal. In one example, one end of the output side transistor PT is connected to a power supply voltage VSS1 through a pull-up resistor R3, and the other end is connected to a reference voltage, e.g., a ground voltage GND. Thus, at the output node N1 of the transistor PT, when the transistor PT is turned on (i.e., when the line voltage is higher than the threshold voltage REF), a low level (approximately the ground voltage GND) is output, and when the transistor PT is turned off (i.e., when the line voltage is lower than the threshold voltage REF), a high level (approximately the power supply voltage VSS1) is output.
This output logic is opposite to the desired output logic (it is desired to output a pulse of high level when the line voltage is higher than the threshold voltage REF as described above), and therefore the logic conversion circuit 405 is connected after the output node N1 in this example. In an example, the logic conversion circuit 405 may implement an inversion function. The logic switching circuit 405 may include a transistor T1 connected similar to the transistor PT. Specifically, one end of the transistor T1 is connected to the supply voltage VSS2 through the pull-up resistor R4, and the other end is connected to the ground voltage GND. Thus, when the level at the node N1 is low, the transistor T1 is turned off, and the output node N2 of the transistor T1 outputs a high level (approximately the power supply voltage VSS2), whereas when the level at the node N1 is high, the transistor T1 is turned on, and the level at the node N2 outputs a low level (approximately the ground voltage GND).
In addition, between the node N1 and the logic conversion circuit 405, a filter circuit 407 may be provided. For example, the filter circuit 407 may include a resistor R5, a capacitor C1, and a diode D2. The filter circuit 407 may filter out switching components caused by the switching of the optocoupler 401. Further, after the node N2, the filter circuit 409 may be connected to stabilize the output. For example, the filtering circuit 409 may include a resistor R6 and a capacitor C2.
Returning to fig. 2, the signal processor 203 may determine the phase sequence of the alternating-current power or whether a phase-loss fault occurs based on the interval in time between the waveforms detected by the waveform detection circuit 201. For example, the signal processor 203 may calculate the interval in time between the waveforms of the respective line voltages 1-2 and 2-3 from the waveform detected by the waveform detection circuit 201, for example, the pulse waveform converted by the waveform conversion circuit, and based on the interval, determine whether the phase sequence is positive or negative or whether a phase-loss fault occurs with reference to the principle described above in conjunction with fig. 1. Such calculations and determinations may be performed, for example, by the signal processor 203 running a related program or executing a related algorithm.
Referring again to fig. 3, in one example, the middle time TC of the duration of a pulse may be used as a marker point for the temporal position of the pulse. In an ideal case, this intermediate time TC may correspond to the peak point of the line voltage waveform. The intermediate time TC of a pulse may be calculated from the time T1 at which the rising edge of the pulse occurs and the time T2 at which the falling edge occurs, for example, TC ═ (T1+ T2)/2. Due to the abrupt nature of the rising and falling edges of the pulses, their respective instants of time are relatively easy to detect with high accuracy.
Fig. 5 is a schematic diagram illustrating the principle of a detection algorithm according to an embodiment of the present disclosure.
As shown in fig. 5, in the case of three-phase AC power, there are two line voltages 1-2 and 2-3. The waveforms of these two line voltages are shown in fig. 5 as deviating from the normal interval (120 deg. as described above). The waveforms of the line voltages 1-2 and 2-3 are converted into pulse waveforms by, for example, the above-described waveform conversion circuit. Phase sequence detection may then be performed based on the spacing of the waveforms in time.
Due to the periodic repeatability, detection can be achieved by several pulses that are adjacent in time. In the example of FIG. 5, two adjacent PULSEs PULSE1 and PULSE2 in the PULSE waveform corresponding to line voltage 1-2 and one adjacent PULSE3 in the PULSE waveform corresponding to line voltage 2-3 between the two PULSEs PULSE1 and PULSE2 are selected. In practice, PULSE3 may not be identified until PULSE1 is identified. In the event that the PULSE1 is not recognized, sensing may not begin because there is a problem with at least the line voltage 1-2. And an error may be reported if the state of PULSE1 is not recognized to last longer than a certain time (e.g., the duration of one cycle).
In the case where these three PULSEs PULSE1, PULSE2, and PULSE3 are detected, their positions in time may be calculated, for example, based on their respective intermediate times. In this example, all times are at time T of the rising edge of PULSE1a0For reference. In this case, this may be done, for example, by starting from Ta0A timer is started to determine other times. Thus, the rising and falling edge times of PULSE1 are (T)a0-Ta0) And (T)a1-Ta0) The rising and falling edge times of PULSE2 are (T)a2-Ta0) And (T)a3-Ta0) The rising and falling edge times of PULSE3 are (T)b0-Ta0) And (T)b1-Ta0). Thus, intermediate time T of PULSE1ac0＝[(Ta0-Ta0)+(Ta1-Ta0)]/2＝(Ta1-Ta0) /2, intermediate time T of PULSE2ac1＝[(Ta2-Ta0)+(Ta3-Ta0)]/2＝(Ta2+Ta3)/2-Ta0Intermediate time T of PULSE3bc0＝[(Tb0-Ta0)+(Tb1-Ta0)]/2＝(Tb0+Tb1)/2-Ta0. The interval between the waveforms can be calculated by the interval between these intermediate time instants.
As described above, in detecting the phase sequence based on the waveform interval, there is a reference value, i.e., a time corresponding to the phase of 120 °. When the frequency of the AC power is different, the reference value is also different. For example, 20ms/3 in the case of 50Hz, and 16.67ms/3 in the case of 60 Hz. In addition, as described above, a certain margin such as ± 25% may also be considered. Then, in the case of 50Hz, it can be determined that Limit Low is 5ms, and Limit High is 8.33 ms; in the case of 60Hz, the Limit Low is 4, 17ms, and the Limit High is 6.94 ms. Here, Limit Low represents a lower Limit of the reference value, and Limit High represents an upper Limit of the reference value.
As described above, when PULSE3 is closer to PULSE1 and the interval between them is equal to or close to the reference value (between Limit low and Limit High), the phase sequence is considered correct; when PULSE3 is closer to PULSE2 and the interval between them is equal to or close to the reference value (between Limit Low and Limit High), the phase sequence is considered to be reversed, i.e., an error occurs. In addition, if the interval between PULSE3 and PULSE1 or the interval between PULSE3 and PULSE2 deviates from the reference value by more than a predetermined threshold value (outside the range between Limit Low and Limit High), it can be determined that the phase failure has occurred.
In the detection process, it is necessary to determine the Limit Low and Limit High used according to the frequency of the AC power. Therefore, the frequency of the AC power can be determined in advance. This can be judged based on the period of the same line voltage. For example, the period T ═ Tac1-Tac0L. In the case of both 50Hz and 60Hz, the frequency judgment can be simplified. For example, the period of 50Hz AC power is 20ms, and the period of 60Hz AC power is 16.67 ms. The mean of the two can be calculated: (20+16.67)/2 ═ 18.33 ms. When the period T < 18.33ms, an AC power of 60Hz can be determined, and therefore a Limit Low of 4.17ms and a Limit High of 6.94ms are used; and when the period T > 18.33ms, it can be determined as 50Hz AC power, and thus 5ms Limit Low and 8.33ms Limit High are used.
The following are examples of pseudo code for phase sequence detection algorithms that may be employed.
Figure BDA0001530974780000101
The signal processor 203 may be various devices or devices capable of executing executable code, for example, programmable devices such as Field Programmable Gate Arrays (FPGAs), microprocessors (μ ps), or Micro Control Units (MCUs), etc. The executable code may be solidified into the signal processor 203 or may be loaded into the signal processor 203 from the outside.
In addition, the phase sequence detection apparatus 200 may further include an analog-to-digital (a/D) converter 205 for converting an analog output of the waveform detection circuit 201 into a digital form for processing by the signal processor 203. Of course, the waveform detection circuit 201 itself may also be designed to be digital, or the a/D converter 205 may be included in the signal processor 203.
In addition, the phase sequence detecting device 200 may further include a display device, such as a liquid crystal display panel, for displaying the detection result.
Fig. 6 is a flow chart illustrating a phase sequence detection method according to an embodiment of the present disclosure.
As shown in fig. 6, a method 600 according to this embodiment may include, at 601, sensing respective waveforms of a line voltage of a first phase relative to a second phase and a line voltage of the second phase relative to a third phase of a three-phase AC power. Waveform detection may be implemented by hardware circuitry, such as the waveform detection circuitry described above. For example, the waveform of the line voltage may be converted into a pulse waveform having the same period, and the phase sequence detection may be performed based on the pulse waveform.
Next, at 602, a phase sequence of the ac power or whether a phase loss fault has occurred may be determined based on the intervals in time between the detected waveforms. Such determination may be made by software or an algorithm as described above.
According to an embodiment of the present disclosure, a hardware circuit is used to sample line voltages, obtain their waveforms, and an algorithm or software is used to determine the phase sequence or phase loss based on the obtained waveforms. The basic principle of the judgment is that the phase difference between the three phases of the three-phase alternating-current power is generally fixed under normal conditions. Since the judgment is realized by software, the complexity of a hardware circuit can be reduced, the number of used components is reduced, and the reliability can be improved. In addition, since the determination is implemented by software, different grids (e.g., 50Hz or 60Hz) can be accommodated by adjusting parameters in the algorithm. Moreover, the determination is made based on the phase difference (embodied as the interval between waveforms in time) regardless of the specific amplitude of the waveform. Therefore, the range of the use voltage is wide.
The embodiments of the present disclosure have been described above. However, these examples are for illustrative purposes only and are not intended to limit the scope of the present disclosure. Although the embodiments are described separately above, this does not mean that the measures in the embodiments cannot be used in advantageous combination. The scope of the disclosure is defined by the appended claims and equivalents thereof. Various alternatives and modifications can be devised by those skilled in the art without departing from the scope of the present disclosure, and such alternatives and modifications are intended to be within the scope of the present disclosure.

Claims (9)

1. A phase sequence detection apparatus comprising:
a waveform detection circuit for detecting respective waveforms of a line voltage of a first phase with respect to a second phase and a line voltage of the second phase with respect to a third phase of the three-phase alternating-current power; and
a signal processor for determining a phase sequence of the alternating-current power or whether a phase-loss fault occurs based on an interval in time between the waveforms detected by the waveform detection circuit,
wherein the content of the first and second substances,
the signal processor is configured to identify first and second adjacent pulses in a pulse waveform corresponding to the line voltage of the first phase relative to the second phase, and to identify a third pulse in the pulse waveform corresponding to the line voltage of the second phase relative to the third phase, temporally between the first and second pulses,
and the signal processor is configured to determine that a phase-loss fault has occurred if an interval between a middle instant of the third pulse duration and a middle instant of the first pulse duration deviates from a time interval corresponding to a phase angle of 120 ° by more than a predetermined threshold if the third pulse is close to the first pulse, otherwise determine that the phase sequence is correct; and
in the case where the third pulse is close to the second pulse, it is determined that a phase-loss fault occurs if an interval between a middle timing of the third pulse duration and a middle timing of the second pulse duration deviates from a time interval corresponding to a phase angle of 120 ° by more than a predetermined threshold, and otherwise it is determined that a phase-sequence error occurs.
2. The phase sequence detection apparatus according to claim 1, wherein the waveform detection circuit comprises:
a waveform converting circuit configured to convert a waveform of a line voltage into a pulse waveform having the same period and phase as the waveform of the line voltage,
wherein the signal processor is configured to make the determination based on the pulse waveform.
3. The phase sequence detection apparatus of claim 2, wherein the waveform conversion circuit is configured to convert a portion of the line voltage having an amplitude exceeding a predetermined threshold into a pulse.
4. The phase sequence detection apparatus of claim 1, wherein the signal processor is configured to begin identifying the third pulse after identifying the first pulse.
5. The phase sequence detection apparatus of claim 1, wherein the signal processor is configured to determine an intermediate time of the duration of a pulse from rising and falling edges of the pulse.
6. The phase sequence detection apparatus according to claim 1, wherein the predetermined threshold is 25% of a time interval corresponding to a phase angle of 120 °.
7. The phase sequence detection apparatus according to claim 2, wherein the waveform conversion circuit comprises:
an optical coupler whose input side photodiode receives a line voltage to be detected or a voltage proportional to the line voltage to be detected, whose output side transistor is connected to output a low level at an output node when the input side photodiode is on and a high level when the input side photodiode is off; and
and the logic conversion circuit receives the output at the output node of the optocoupler, converts the high level output into low level and converts the low level output into high level.
8. A method of phase sequence detection, comprising:
detecting respective waveforms of a line voltage of a first phase relative to a second phase and a line voltage of the second phase relative to a third phase of the three-phase alternating current power; and
determining a phase sequence of the alternating current power or whether a phase loss fault occurs based on an interval in time between the detected waveforms,
wherein the content of the first and second substances,
identifying first and second pulses adjacent in a pulse waveform corresponding to the line voltage of the first phase relative to the second phase, and identifying a third pulse in the pulse waveform corresponding to the line voltage of the second phase relative to the third phase, temporally between the first and second pulses,
in the case that the third pulse is close to the first pulse, if an interval between a middle timing of the third pulse duration and a middle timing of the first pulse duration deviates from a time interval corresponding to a phase angle of 120 ° beyond a predetermined threshold, determining that a phase-missing fault occurs, otherwise determining that the phase sequence is correct; and
in the case where the third pulse is close to the second pulse, it is determined that a phase-loss fault occurs if an interval between a middle timing of the third pulse duration and a middle timing of the second pulse duration deviates from a time interval corresponding to a phase angle of 120 ° by more than a predetermined threshold, and otherwise it is determined that a phase-sequence error occurs.
9. The method of claim 8, wherein detecting a waveform comprises:
the waveform of the line voltage is converted into a pulse waveform having the same period and phase as the waveform of the line voltage,
wherein the determination is made based on the pulse waveform.
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CN111664554B (en) * 2020-04-27 2022-04-12 广东开利暖通空调股份有限公司 Phase-loss detection method and device, storage medium and air conditioner
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