CN108183877B - Multi-tone frequency modulation signal demodulation method based on FPGA - Google Patents

Multi-tone frequency modulation signal demodulation method based on FPGA Download PDF

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CN108183877B
CN108183877B CN201810025789.4A CN201810025789A CN108183877B CN 108183877 B CN108183877 B CN 108183877B CN 201810025789 A CN201810025789 A CN 201810025789A CN 108183877 B CN108183877 B CN 108183877B
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tone
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CN108183877A (en
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周敬权
谭杰
苟嘉炜
郝筱鲲
王鹏
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Chengdu Yeruan Technology Co ltd
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/10—Frequency-modulated carrier systems, i.e. using frequency-shift keying
    • H04L27/14—Demodulator circuits; Receiver circuits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/10—Frequency-modulated carrier systems, i.e. using frequency-shift keying
    • H04L27/16—Frequency regulation arrangements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H04L27/2601—Multicarrier modulation systems
    • H04L27/2647—Arrangements specific to the receiver only
    • H04L27/2649—Demodulators
    • H04L27/265—Fourier transform demodulators, e.g. fast Fourier transform [FFT] or discrete Fourier transform [DFT] demodulators
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H04L27/2601—Multicarrier modulation systems
    • H04L27/2647—Arrangements specific to the receiver only
    • H04L27/2655—Synchronisation arrangements
    • H04L27/2657—Carrier synchronisation
    • H04L27/2659—Coarse or integer frequency offset determination and synchronisation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H04L27/2601—Multicarrier modulation systems
    • H04L27/2647—Arrangements specific to the receiver only
    • H04L27/2655—Synchronisation arrangements
    • H04L27/2657—Carrier synchronisation
    • H04L27/266—Fine or fractional frequency offset determination and synchronisation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H04L27/2601—Multicarrier modulation systems
    • H04L27/2647—Arrangements specific to the receiver only
    • H04L27/2655—Synchronisation arrangements
    • H04L27/2662—Symbol synchronisation
    • H04L27/2663—Coarse synchronisation, e.g. by correlation

Abstract

The invention discloses a multi-tone frequency modulation signal demodulation method based on an FPGA (field programmable gate array), which comprises the following steps of: converting the multi-tone frequency modulation analog signal into a digital signal; realizing multi-tone frequency modulation digital intermediate frequency signal down-conversion in an FPGA; sampling in the FPGA to reduce the signal data rate; realizing Doppler frequency offset correction in the FPGA; the synchronization of code element symbols is realized in the FPGA; the detection of pilot frequency and single tone is completed in FPGA through spectrum analysis, effective signals are extracted, and then the demodulation of multi-tone frequency modulation signals is realized. The demodulation method adopts frequency spectrum analysis to directly obtain the frequency offset, skips the iterative structure of the conventional phase-locked loop, and directly locks and corrects the frequency offset; according to the particularity of information carried by the multi-tone modulation frequency modulation signal, the modulation signal can be extracted by directly carrying out fast Fourier transform on the obtained equivalent baseband signal in the FPGA, phase extraction is not needed, the demodulation structure is simplified, and the demodulation difficulty is reduced.

Description

Multi-tone frequency modulation signal demodulation method based on FPGA
Technical Field
The invention belongs to the technical field of safety measurement and control technology, and particularly relates to a multi-tone frequency modulation signal demodulation method based on an FPGA (field programmable gate array).
Background
The most core idea of multi-tone frequency modulation is multi-tone code frequency modulation, and NASA proposes to select 7 sinusoidal carriers, and output the sum signal of 2 paths of carriers, so the input can be binary data. Because the amplitude of the sum signal changes along with time and the instantaneous power is not fixed, the NASA adopts secondary modulation, and the sum signal modulates the frequency of the radio frequency carrier. The multi-tone FM coding logic unit codes the instruction code into multi-tone FM of one frame and one frame, the length of each frame is 11 letters, wherein 9 letters are address words, and the other 2 letters are instruction words. To facilitate letter synchronization, it is specified to insert a gap between letters. The conventional demodulation method is divided into: non-coherent demodulation and coherent demodulation.
The flow of the non-coherent demodulation is as follows: firstly, derivation is carried out on the frequency modulation wave with the same amplitude, so that the obtained signal becomes amplitude modulation frequency modulation wave, namely AM-FM wave, the process is called frequency discrimination, and the frequency discrimination enables the change rule of the modulation signal to be reflected on an envelope. And then, square root raised cosine low-pass filtering is carried out on the AM-FM to obtain a low-frequency envelope signal m (t), and the process is envelope detection.
The modulated signal and the direct current component are extracted from the wave envelope. And filtering out direct current components in the signal by using a low-pass filter to finally obtain the baseband signal before FM modulation.
The coherent demodulation process includes that FM modulation signals firstly pass through a band-pass filter to filter out redundant frequency components, then a multiplier is used for inputting a reference signal which is coherent with carrier frequency, the reference signal is multiplied by the modulation signals which pass through the band-pass filter, and finally a low-pass filter is used for filtering out high-frequency components to obtain original signals.
The key to realize coherent demodulation is that the receiving end needs to recover a coherent carrier strictly synchronous with the modulated carrier, otherwise, the demodulated signal is distorted. In an actual safety control system, because a carrier of a transmitting end of a received signal is unstable or a local oscillation signal of a receiving end of the received signal is unstable, carrier frequency offset occurs to the carrier due to a Doppler effect generated by high-speed flight of an aircraft. The receiver cannot determine the carrier frequency of the received modulation signal, cannot generate local carrier waves with the same frequency and phase, and cannot correctly receive the instruction due to decoding error when the frequency offset is serious.
Disclosure of Invention
Aiming at the defects in the prior art, the invention provides the multi-tone frequency modulation signal demodulation method based on the FPGA, which is simpler and improves the system integration level and reliability.
In order to achieve the above purpose, the solution adopted by the invention is as follows: a multi-tone frequency modulation signal demodulation method based on FPGA comprises the following steps:
s1, converting the multi-tone frequency modulation analog signal into a digital signal;
s2, carrying out multi-tone frequency modulation digital intermediate frequency signal down-conversion in the FPGA;
s3, sampling in the FPGA to reduce the signal data rate;
s4, performing Doppler frequency offset correction in the FPGA;
s5, filtering out irrelevant components in the FPGA through a low-pass filter;
and S6, detecting the pilot frequency and the single tone in the FPGA through spectrum analysis, and extracting effective signals, thereby realizing the demodulation of the multi-tone frequency modulation signals.
Further, in step S1, the a/D conversion chip AD9626 performs sampling, converts the modulated signal of the analog intermediate frequency multi-tone modulation with the carrier frequency of 70MHz into a 12bits multi-tone modulation digital signal, and inputs the signal into the ALTERRA chip for subsequent digital processing.
Further, in step S2, a mixing signal cos (2 pi ft) with a frequency of 70MHz is generated by the local oscillator, where f is 70 MHz; the intermediate frequency signal with the carrier frequency of 70MHz and the signal generated by the local oscillator are mixed to realize down conversion.
Further, in step S3, an integer multiple of the least common multiple of all the tone periods is taken as the length of one symbol and as the period of the group of multi-tone combined signals.
Further, in step S4, a frequency offset position is obtained through fast fourier transform, and then doppler frequency offset correction is completed through a frequency mixing manner.
Further, the coarse synchronization of the carrier in step S2 achieves the signal shift from the higher frequency to the lower frequency in a large step by the combination of the coarse synchronization of the carrier in step S2 and the fine synchronization of the carrier in step S4 to complete the carrier synchronization.
Further, in step S5, synchronization of symbol symbols is achieved in the FPGA by using a lead-lag manner.
The invention has the beneficial effects that aiming at the characteristic of multi-tone frequency modulation, the invention provides a brand-new digital multi-tone frequency modulation signal demodulation method based on the field programmable gate array, namely, the characteristic of processing digital signals by utilizing the FPGA is utilized to process multi-tone frequency modulation digital intermediate frequency signals, demodulate digital baseband signals and replace the demodulation process of each module of an analog circuit, thereby improving the integration level and reliability of a system, reducing the external interference and effectively reducing the development cost of equipment.
Drawings
Fig. 1 is a block diagram of a conventional multi-tone fm noncoherent demodulation process.
Fig. 2 is a block diagram of a conventional multi-tone coherent demodulation process.
Fig. 3 shows a multi-tone fm demodulation transmitting end.
Fig. 4 shows a receiver for multi-tone fm demodulation.
Fig. 5 is a schematic block diagram of digital multi-tone fm demodulation based on FPGA.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the technical solutions of the present invention are described clearly and completely below, and it is obvious that the described embodiments are some, not all embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The invention is further described below with reference to the accompanying drawings:
referring to fig. 1 to 5, the present invention provides a multi-tone fm signal demodulation method based on FPGA, including the following steps:
s1, converting the multi-tone frequency modulation analog signal into a digital signal; sampling is carried out through an A/D conversion chip AD9626, the modulated signal of the analog intermediate frequency multi-tone frequency modulation with the carrier frequency of 70MHz is converted into a 12-bit multi-tone frequency modulation digital signal, and then the signal is input into an ALERRA chip for subsequent digital processing.
S2, carrying out multi-tone frequency modulation digital intermediate frequency signal down-conversion in the FPGA; generating a mixing signal cos (2 pi ft) with the frequency of 70MHz through a local oscillator, wherein f is 70 MHz; the intermediate frequency signal with the carrier frequency of 70MHz and the signal generated by the local oscillator are mixed to realize down conversion.
S3, sampling in the FPGA to reduce the signal data rate; an integer multiple of the least common multiple of all the tone periods is taken as the length of one symbol and as the period of the set of multi-tone combined signals. The sampling frequency and the number of points of the fast fourier transform jointly determine the spectrum resolution, namely the sampling period is determined, and the spectrum leakage degree of the fast fourier transform during signal demodulation is influenced. In order to suppress the frequency spectrum leakage, under the condition that the period of a group of single-tone signals is fixed, the selection of the sampling frequency and the number of points of fast Fourier transform needs to satisfy a certain relation, and meanwhile, the resolution ratio of the frequency spectrum is directly determined by the sampling frequency and the number of points of fast Fourier transform, and the size of the resolution ratio is usually considered in practical engineering. From the above description, it can be known that sampling the intermediate digital signal not only considers the performance limitation of the processing hardware in practical engineering, but also more accurately obtains the information carried in the modulated signal.
S4, performing Doppler frequency offset correction in the FPGA; due to the influence of physical devices and frequency shift in the transmission process, the center frequency of the signal subjected to down-conversion is not shifted to zero frequency, and in order to avoid demodulation interference caused by Doppler effect, Doppler frequency shift correction is selected after sampling is completed. The accuracy of the doppler correction is limited by the FFT spectral resolution. Firstly, frequency offset positions are obtained through fast Fourier transform, and then Doppler frequency offset correction is completed through a frequency mixing mode.
S5, filtering out irrelevant components in the FPGA through a low-pass filter; according to the single-tone frequency range selected by the multi-tone frequency modulation signal, the cut-off bandwidth of the low-pass filter is set in a reasonable range, so that high-frequency and image components are filtered as far as possible while effective information is kept.
S6, detecting pilot frequency and single tone in FPGA through spectrum analysis, extracting effective signal, and realizing demodulation of multi-tone frequency modulation signal; the equivalent baseband signal after doppler frequency offset correction can be detected by pilot frequency and single tone after passing through a low pass filter, and since the frequency of the pilot frequency is fixed and the frequency of the single tone is also in a known range, the number of points of the fast fourier transform result corresponding to the pilot frequency can be obtained by calculation, and the number of points of the fast fourier transform result corresponding to all the single tones can be obtained by the same method. The frequency points contained in the signal can be obtained by comparing the amplitude values corresponding to the points of the fast Fourier transform result in a certain range, and a data source is provided for subsequent comparison and judgment.
In this embodiment, the carrier coarse synchronization of step 2 and the carrier fine synchronization of step 4 are combined to complete carrier synchronization, which is simpler to implement and more accurate in result compared with the conventional carrier synchronization method. The coarse synchronization in step 2 realizes the signal shift from higher frequency to lower frequency in a large step mode, the higher frequency is near 70MHz, and the lower frequency is near zero frequency. After the extraction and filtering, the data sampling rate is reduced, a relatively small number of FFT points is set to obtain a high resolution, and the high resolution ensures the Doppler frequency spectrum correction effect. The calculation steps are as follows:
(1) if the input signal S is an intermediate frequency input signal, i.e.
S＝A cos(2π(fc+Δf)t+β1sin(2πf1t)+β2sin(2πf2t)...+βn-1sin(2πfn-1t)+βnsin(2πfnt))
Where | Δ f | < fd，fdIs the maximum value of the Doppler frequency offset;
the down-converted mixing signal is:
Sh＝cos(2πfct)
down-converted low frequency components:
Sl＝cos(2πΔft+β1sin(2πf1t)+β2sin(2πf2t)...+βn-1sin(2πfn-1t)+βnsin(2πfnt))
low-frequency components after doppler frequency offset correction:
Sf_cos＝cos(β1sin(2πf1t)+β2sin(2πf2t)...+βn-1sin(2πfn-1t)+βnsin(2πfnt))
Sf_sin＝sin(β1sin(2πf1t)+β2sin(2πf2t)...+βn-1sin(2πfn-1t)+βnsin(2πfnt))
thus, the carrier synchronization is completed, and the equivalent baseband signal is obtained.
In this embodiment, in step S5, synchronization of symbol symbols is realized by using a lead-lag method in the FPGA. According to the modulation principle of multi-tone frequency modulation signals and a mode of carrying information, accurate synchronization is not needed when symbol synchronization is carried out, but errors are required to be controlled within a reasonable range, and the maximum allowable error is 1/4 symbol symbols through analysis and simulation, so that the symbol synchronization is carried out by adopting a lead-lag mode, and the accuracy of single tone detection is ensured.
In this embodiment, in step S1, in the digital communication system, the sampling frequency is generally greater than 2 times the signal bandwidth according to the nyquist (nyquist) criterion. The sampling frequency of the A/D is set to fs, and the following conditions are met:
Figure BDA0001544898800000061
wherein, M is 1,2,. …, fs is more than or equal to 2B;
sampling is carried out through an A/D conversion chip AD9626, an analog intermediate frequency multi-tone frequency modulation signal with the carrier frequency of 70MHz is converted into a 12bits multi-tone frequency modulation digital signal, and then the signal is input into an ALERRA chip for subsequent digital processing.
In this embodiment, in step S2, the specific steps are as follows:
the input signal S being an intermediate frequency signal, i.e.
S＝A cos(2π(fc+Δf)t+β1sin(2πf1t)+β2sin(2πf2t)...+βn-1sin(2πfn-1t)+βnsin(2πfnt))
Wherein, | Δ f | < fd，fdIs the maximum value of the Doppler frequency offset;
the down-converted mixing signal is:
Sm＝cos(2πfct)
using multipliers to sum S and SmAnd multiplying to realize down conversion.
The low-frequency components after down-conversion are:
Sl＝cos(2πΔft+β1sin(2πf1t)+β2sin(2πf2t)...+βn-1sin(2πfn-1t)+βnsin(2πfnt))
the down-converted signal has a doppler spectrum, and it is necessary to perform down-conversion processing in order to obtain a frequency offset with high accuracy.
In this embodiment, in step S3, the post-decimation sampling rate is equal to the pre-decimation sampling rate/decimation multiple.
The types of the decimation filter mainly comprise an integral comb filter and a half-band filter, and can be used in a combined manner according to requirements, and if 25-time decimation is required, two CIC cascades with 5-time decimation can be used for realizing; if 32 times of extraction is needed, two CIC cascades with 5 times of extraction can be used for realizing five HBF cascades; if a 40-fold decimation is required, then a 5-fold decimation CIC and three HBF cascades can be used.
In this embodiment, in step S4, specifically:
Sl＝cos(2πΔft+β1sin(2πf1t)+β2sin(2πf2t)...+βn-1sin(2πfn-1t)+βnsin(2πfnt))
Δ f in the above equation represents the doppler frequency offset, and the offset can be obtained by FFT.
The Doppler frequency offset is corrected by adopting a frequency mixing mode:
SQ＝cos(2πΔft)
SQ＝sin(2πΔft)
SIR＝Sl·SI
SQI＝Sl·SQ
will SIR，SQIAnd respectively sending the signals into a low-pass filter to filter out-of-band noise and high-frequency image components.
The cut-off frequency of the low frequency filter should be greater than the maximum sidetone frequency while ensuring maximum filtering of extraneous and image components.
The digital low-pass filter has two implementation forms, namely a Finite Impulse Response (FIR) digital filter and an Infinite Impulse Response (IIR) digital filter, and compared with the IIR digital filter, the FIR digital filter has many advantages, such as linear phase, stability and the like, and the design is relatively mature, so that the FIR digital filter is adopted to implement the low-pass filtering.
The signal which completes the Doppler frequency offset correction and passes through the digital low-pass filter is as follows:
Sf_cos＝cos(β1sin(2πf1t)+β2sin(2πf2t)...+βn-1sin(2πfn-1t)+βnsin(2πfnt))
Sf_sin＝sin(β1sin(2πf1t)+β2sin(2πf2t)...+βn-1sin(2πfn-1t)+βnsin(2πfnt))
are respectively paired with Sf_cosAnd Sf_sinAnd performing lead-lag synchronization, and setting the number of stages for synchronization and the number of lead-lag points according to the precision requirement.
Will Sf_cosAnd Sf_sinSpectral analysis is performed to perform tone detection.
The result obtained by FFT detection is the FFT frequency point corresponding to the tone, and the corresponding tone frequency can be obtained by converting the result, wherein the conversion formula is as follows:
single-tone frequency is FFT bin/total number of FFT points sampling rate.
For example, if the FFT obtained by the detection is 38, the total number of FFT points is 16384, and the sampling rate is 1.6384MHz, the corresponding tone frequency is 38/16384 × 1638400 — 3800 Hz.
In the demodulation process, the local oscillator, the multiplier, the low-pass filter, the data delay buffer and the FFT are all realized by the generation of an IP core in the FPGA.
Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.

Claims (4)

1. A multi-tone frequency modulation signal demodulation method based on FPGA is characterized by comprising the following steps:
s1, converting the multi-tone frequency modulation analog signal into a digital signal;
s2, carrying out multi-tone frequency modulation digital intermediate frequency signal down-conversion in the FPGA;
s3, sampling in the FPGA to reduce the signal data rate; taking the integral multiple of the least common multiple of all single tone periods as the length of one code element symbol and as the period of the multi-tone combined signal;
s4, performing Doppler frequency offset correction in the FPGA; firstly, obtaining a frequency offset position through fast Fourier transform, and then completing Doppler frequency offset correction in a frequency mixing mode;
s5, filtering out irrelevant components in the FPGA through a low-pass filter;
the synchronization of the symbol symbols is realized in the FPGA by using a lead-lag mode;
the signal which completes the Doppler frequency offset correction and passes through the digital low-pass filter is as follows:
Sf_cos＝cos(β1sin(2πf1t)+β2sin(2πf2t)...+βn-1sin(2πfn-1t)+βnsin(2πfnt))
Sf_sin＝sin(β1sin(2πf1t)+β2sin(2πf2t)...+βn-1sin(2πfn-1t)+βnsin(2πfnt))
are respectively paired with Sf_cosAnd Sf_sinPerforming lead-lag synchronization, wherein the number of stages for synchronization and the number of lead-lag points are set according to the precision requirement;
will Sf_cosAnd Sf_sinPerforming spectral analysis to perform monophonic detection;
the result obtained by FFT detection is the FFT frequency point corresponding to the tone, and the corresponding tone frequency can be obtained by converting the result, wherein the conversion formula is as follows:
single tone frequency is FFT frequency point/total number of FFT points sampling rate;
and S6, detecting the pilot frequency and the single tone in the FPGA through spectrum analysis, and extracting effective signals, thereby realizing the demodulation of the multi-tone frequency modulation signals.
2. The method according to claim 1, wherein in step S1, the a/D conversion chip AD9626 is used to sample and convert the modulated signal of the analog intermediate frequency multi-tone modulation with the carrier frequency of 70MHz into a 12bits multi-tone modulation digital signal, and then the signal is input to the ALTERRA chip for subsequent digital processing.
3. The FPGA-based multi-tone fm signal demodulation method of claim 2, wherein in step S2, a mixing signal cos (2 pi ft) with a frequency of 70MHz is generated by a local oscillator, wherein f is 70 MHz; the intermediate frequency signal with the carrier frequency of 70MHz and the signal generated by the local oscillator are mixed to realize down conversion.
4. The method according to claim 1, wherein the carrier synchronization is performed by the combination of the coarse carrier synchronization of step S2 and the fine carrier synchronization of step S4, and the coarse carrier synchronization of step S2 is implemented in a large step to shift the signal from higher frequency to lower frequency.
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