CN108063948B - Image processing device and image processing method matched with multiple processors - Google Patents
Image processing device and image processing method matched with multiple processors Download PDFInfo
- Publication number
- CN108063948B CN108063948B CN201610978541.0A CN201610978541A CN108063948B CN 108063948 B CN108063948 B CN 108063948B CN 201610978541 A CN201610978541 A CN 201610978541A CN 108063948 B CN108063948 B CN 108063948B
- Authority
- CN
- China
- Prior art keywords
- processor
- image
- entropy decoding
- bit
- bit string
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/90—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using coding techniques not provided for in groups H04N19/10-H04N19/85, e.g. fractals
- H04N19/91—Entropy coding, e.g. variable length coding [VLC] or arithmetic coding
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/42—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Compression Or Coding Systems Of Tv Signals (AREA)
Abstract
The invention provides an image processing device and an image processing method matched with a multiprocessor, which are used for reconstructing a picture frame comprising a plurality of image sections. The plurality of video segments are entropy encoded into a bitstream. The image processing device comprises a common storage area, a first processor and a second processor. The first processor performs an entropy decoding process on the bit string to decode a set of first symbols. The first processor reconstructs a first image section according to the group of first symbols and stores the reconstructed first image section in the common storage area. The second processor also performs an entropy decoding process on the bit string to solve a set of second symbols. The second processor obtains a portion of the reconstructed first image segment associated with a second image segment from the common storage area, and reconstructs the second image segment according to the set of second symbols and the obtained portion of the first image segment.
Description
Technical Field
The present invention relates to image processing systems, and more particularly to image decoding techniques that employ multiple processors in parallel.
Background
In recent years, with the rapid development of various electronic related technologies, multimedia systems such as home theaters have become popular. In most multimedia systems, the most important hardware devices belong to the image display equipment. In order to meet the demands of viewers for realistic images, one of the current trends of image display devices is to continuously increase the size and resolution of image frames (image frames).
In either dynamic or static image processing, each frame is usually divided into a plurality of image blocks as the basic unit for image encoding/decoding. At the encoding end of many motion picture processing systems, each image block is sequentially processed by the following procedures: (1) intra-prediction (intra-prediction) or motion compensation (motion compensation), (2) Discrete Cosine Transform (DCT), (3) quantization (quantization), and (4) entropy encoding (entropy encoding). The encoding side processes (1) to (3) can be collectively referred to as a pixel deconstruction process, and the output is a sequence of symbols (symbol), which are then converted into a bit stream by entropy encoding.
As known to those skilled in the art, the decoding end must perform an image processing procedure opposite to the encoding end to correctly reconstruct each image block in a frame. In many motion picture processing systems, the decoder responsible for reconstructing the frame is designed to perform the following procedures in sequence for the received bit stream: (1) entropy decoding (entropy decoding), (2) inverse quantization (inverse quantization), (3) inverse transformation (inverse transform), (4) intra pixel reconstruction (intra pixel reconstruction) or motion compensation, and (5) deblocking filter (deblocking filter). Corresponding to the transmitter, the entropy decoding procedure at the receiver is responsible for converting a continuous bit string into a plurality of symbols. Then, the image processing procedures (2) - (5), which are collectively referred to as pixel reconstruction procedures, continue to reconstruct each pixel in each image block from the symbols.
Coding/decoding dependencies are often designed to exist between different image blocks of the same frame. More specifically, to reconstruct the image block (x, y) in FIG. 1 by the pixel reconstruction process, it may be necessary to wait until the image data of all four image blocks (x-1, y-1), (x +1, y-1), (x-1, y) are ready. For example, when performing the inverse quantization procedure on the image block (x, y), the decoding end may need to first find the quantization parameters of the image blocks (x, y-1) and (x-1, y) to find the quantization parameters of the image block (x, y).
In the bit string generated by entropy coding, the dependency between the previous data and the next data is more close. More specifically, the entropy encoder refers to the content of a previous symbol when encoding a certain symbol. Therefore, the entropy decoder must decode each symbol from the string of bits one by one in order. More specifically, the entropy decoder must use the currently decoded symbol as a parameter to solve the next symbol. In many motion picture processing systems, the entropy encoder encodes the image data of an entire frame into a continuous string of bits. Since the bitstream is a variable length code (variable length code), the entropy decoder does not know in advance at which position in the bitstream the data of each video block starts and ends. Taking fig. 1 as an example, all the symbols of the image block (x-1, y-1) must be decoded first, and the entropy decoder can find the starting bit of the image block (x, y-1) in the bit string and start decoding the symbols of the image block (x, y-1). By analogy, all the symbols of the image block (x, y-1) must be decoded first, and the entropy decoder can find the starting bit of the image block (x +1, y-1) in the bit string and start decoding the symbols of the image block (x +1, y-1).
Based on the above characteristics of entropy coding, a typical method is to give the entropy decoding program full responsibility to a single processor; the pixel reconstruction process by one or more processors for the symbols of the entire frame is not started until the processor has solved the symbols. Fig. 2 shows an example of a timing diagram for implementing the above-described approach with two processors. For simplicity, it is assumed that a frame only includes the image block (x-1, y) and the image block (x, y) in fig. 1, and the first processor of the two processors is fully responsible for performing the entropy decoding procedure. As shown in fig. 1, the first processor completes the entropy decoding process of the video block (x-1, y) between time points t 1-t 2, and then performs the entropy decoding process of the video block (x, y) between time points t 2-t 3. After the entropy decoding process of all the image blocks is completed, the first processor starts a pixel reconstruction process for the image block (x-1, y). As mentioned above, the pixel reconstruction process for the image block (x, y) may need to refer to the pixel data of some image blocks (x-1, y). Therefore, the second processor does not start the pixel reconstruction process for the image block (x, y) until the first processor generates the reference data at time t 4.
In image processing systems where the frame size is large and real-time rendering of the frame is required, the decoding time that can be allocated to each frame is quite limited. How to shorten the decoding time to increase the overall data throughput is certainly a considerable issue.
Disclosure of Invention
The invention provides a novel image processing device and an image processing method. By properly scheduling the processors to start parallel operations in the entropy decoding stage, the image processing apparatus and the image processing method according to the present invention can increase the speed of reconstructing the whole frame. In practical applications, the image processing apparatus and the image processing method according to the present invention can be implemented in various image decoding systems that require the reconstruction of frames by an entropy decoding process and a pixel reconstruction process.
According to an embodiment of the present invention, an image processing apparatus is provided for reconstructing a frame including a first image section and a second image section. The first video segment and the second video segment are converted into a continuous bit stream through a pixel deconstruction process and an entropy encoding process. In the bit string, a plurality of bits associated with the second image segment follow a plurality of bits associated with the first image segment. The image processing device comprises a common storage area, a first processor and a second processor. The first processor is used for performing an entropy decoding process on the bit string to obtain a set of first symbols. Then, the first processor performs a pixel reconstruction process according to the set of first symbols to reconstruct the first image segment, and stores the reconstructed first image segment in the common storage area. The second processor also performs an entropy decoding process on the bit string to decode a set of second symbols. Then, the second processor obtains a portion of the reconstructed first image segment associated with the second image segment from the common storage area, and performs a pixel reconstruction process according to the set of second symbols and the obtained portion of the first image segment to reconstruct the second image segment.
According to another embodiment of the present invention, an image processing method for reconstructing a frame including a first image section and a second image section using a first processor, a second processor and a common storage area is provided. The first video segment and the second video segment are converted into a continuous bit stream through a pixel deconstruction process and an entropy encoding process. In the bit string, a plurality of bits associated with the second image segment follow a plurality of bits associated with the first image segment. According to the image processing method, the first processor is utilized for performing an entropy decoding process on the bit string to obtain a first symbol. The first processor is then utilized to perform a pixel reconstruction process according to the set of first symbols to reconstruct the first image segment and store the reconstructed first image segment in the common storage area. The second processor is also used for performing an entropy decoding process on the bit string to obtain a second symbol. Then, the second processor is used for obtaining the portion of the first image section after reconstruction, which is related to the second image section, from the common storage area, and performing a pixel reconstruction process according to the set of second symbols and the obtained portion of the first image section to reconstruct the second image section.
The advantages and spirit of the present invention can be further understood by the following detailed description and accompanying drawings.
Drawings
FIG. 1 is a diagram illustrating an example of coding/decoding dependencies among a plurality of video blocks.
FIG. 2 shows an example of a prior art timing diagram for entropy decoding and pixel reconstruction using two processors.
FIG. 3 is a block diagram of an image processing apparatus according to an embodiment of the present invention.
FIG. 4 is a diagram of a frame including a plurality of image blocks.
Fig. 5(a) -5 (C) are timing diagrams illustrating exemplary scheduling schemes that can be employed by the image processing apparatus according to the present invention.
FIG. 6 is a flowchart illustrating an image processing method according to an embodiment of the invention.
Description of the symbols
200: the image processing device 22: first processor
24: the second processor 28: shared storage area
S61-S66: procedure step
It is noted that the drawings include functional block diagrams that represent various functional blocks that can be associated with one another. These drawings are not detailed circuit diagrams, and the connecting lines are only used to indicate signal flows. The various interactions between functional elements and/or processes need not be achieved through direct electrical connections. In addition, the functions of the individual elements do not have to be distributed as shown in the drawings, and the distributed blocks do not have to be implemented by distributed electronic elements.
Detailed Description
An embodiment of an image processing apparatus according to the present invention is illustrated in a functional block diagram of fig. 3. It should be noted that the term "invention" as used herein refers to the inventive concept as it is presented in these embodiments, and its scope is not limited by these embodiments per se. In practical applications, the image processing apparatus 200 can be integrated into various image decoding systems that require the reconstruction of frames by entropy decoding processes and pixel reconstruction processes (such as, but not limited to, inverse quantization, inverse transformation, motion compensation, deblocking filtering), and is not limited to still images or moving images.
As shown in FIG. 3, the image processing apparatus 200 includes a first processor 22, a second processor 24 and a common storage area 28. In practice, the first processor 22 and the second processor 24 can be two sets of image processing circuits or processors capable of performing related functions (described in detail later), and can operate independently. It should be noted that the hardware circuits of the first processor 22 and the second processor 24 are not necessarily the same. In addition, in practice, the first processor 22 and the second processor 24 may be designed to operate according to a specific schedule predetermined by a circuit designer; alternatively, the image processing apparatus 200 may include a controller (not shown) for distributing tasks and controlling the first processor 22 and the second processor 24 to execute accordingly. It should be noted that the controller functions may be implemented by the first processor 22 or the second processor 24 (for example, by executing corresponding program codes), that is, not necessarily implemented by hardware independent from the first processor 22 and the second processor 24. In the case where no independent controller is provided, a communication mechanism (e.g., sending an interrupt request) for exchanging information between the first processor 22 and the second processor 24 may be provided to inform the other processor of the operating status.
The input signal to the image processing apparatus 200 is a continuous bit string. The bit string is formed by converting a plurality of pixels in a frame through a pixel deconstruction process and an entropy coding process. The following example assumes that the image processing apparatus 200 is used to reconstruct a frame divided into a plurality of image blocks as shown in fig. 4, and that the image blocks located in the horizontal odd-numbered rows (the first row, the third row, and the fifth row …) of the image blocks are mainly reconstructed by the first processor 22, and the image blocks located in the horizontal even-numbered rows (the second row, the fourth row, and the sixth row …) are mainly reconstructed by the second processor 24. It will be understood by those skilled in the art that the scope of the present invention is not limited by the following description.
For convenience of description, the image blocks in the first row in the horizontal direction are collectively referred to as a first image segment, the horizontal image blocks in the second row below the first row are collectively referred to as a second image segment, the horizontal image blocks in the third row below the second row are collectively referred to as a third image segment, and so on. After the pixel deconstruction process and the entropy encoding process, the image segments are converted into a continuous bit stream, which is input to the first processor 22 and the second processor 24, respectively. In the bit string, the bits associated with the second image segment follow the bits associated with the first image segment, the bits associated with the third image segment follow the bits associated with the second image segment, and so on.
Fig. 5(a) -5 (C) are timing diagrams illustrating some scheduling examples that may be employed by the image processing apparatus 200, which are described below.
In the example of fig. 5(a), the first processor 22 and the second processor 24 perform entropy decoding on the bitstream independently from each other at a time point t1 starting from the forefront of the bitstream (i.e., corresponding to the start bit of the first image segment). As shown in fig. 5(a), the first processor 22 and the second processor 24 operate in parallel. In this case, the first processor 22 and the second processor 24 respectively sequentially decode a plurality of symbols associated with the pixels included in the first image segment. After the entropy decoding process performed by the first processor 22 has decoded all the symbols associated with the pixels included in the first image segment (time t2), the first processor 22 suspends the entropy decoding process, starts a pixel reconstruction process according to the sequence of symbols to reconstruct the first image segment, and stores the reconstructed first image segment in the common storage area 28. The pixel reconstruction process referred to herein may include one or more of inverse quantization, inverse transformation, intra pixel reconstruction/motion compensation, deblocking filtering, etc., but is not limited thereto. It should be noted that the implementation details of the entropy decoding procedure and the pixel reconstruction procedure are known to those skilled in the art, and are not described herein.
If the first processor 22 and the second processor 24 operate at the same speed, the second processor 24 also resolves all the signs associated with the pixels included in the first image segment at the time point t2, but the second processor 24 may not use the signs associated with the pixels included in the first image segment. According to the entropy coding property, after decoding all the symbols associated with the pixels included in the first video segment, the second processor 24 can obtain the start bit of the bit string belonging to the second video segment, so as to start the entropy decoding process for the second video segment. Therefore, the second processor 24 may continue the entropy decoding process on the bitstream immediately after the time point t2, i.e., start to decode the symbols associated with the pixels included in the second image segment.
Until all the symbols associated with the pixels included in the second image segment are resolved (time t3), the second processor 24 suspends the entropy decoding process. If the image block in the second image segment is dependent on the image block in the first image segment, the second processor 24 can obtain the portion of the first image segment associated with the second image segment after reconstruction from the common storage area 28. The second processor 24 then proceeds to perform a pixel reconstruction process based on the decoded string of symbols and the obtained portion of the first image segment to reconstruct the second image segment. Similarly, the second processor 24 may store the reconstructed second image segment in the common storage 28 for subsequent reference by the first processor 22 in reconstructing a third image segment.
As shown in FIG. 5(A), the time t3 when the second processor 24 completes the entropy decoding process for the second video segment is later than the time t2 when the first processor 22 starts reconstructing the first video segment. If the timing arrangement is practical, the first processor 22 completes the reconstruction of the reference data and stores the reference data in the common storage area 28 before the second processor 24 requests the reference data to be fetched from the common storage area 28, and the second processor 24 starts the reconstruction of the second image segment directly after the completion of the entropy decoding process of the second image segment. Alternatively, the second processor 24 may pause slightly after the time point t3, and start reconstructing the second image segment after the first processor 22 has prepared the reference data in the common storage area 28.
Please refer to fig. 5 (B). Following the example of fig. 5(a), the first processor 22 may continue the entropy decoding process on the bitstream after completing the pixel reconstruction process for the first image segment (time t4), starting from the end bit corresponding to the first image segment (i.e., where the entropy decoding process was previously suspended by the first processor 22). In this case, the first processor 22 sequentially decodes the symbols associated with the pixels included in the second image segment and the third image segment. The first processor 22 may not use the symbols associated with the pixels comprised in the second image section. Until all the symbols associated with the pixels included in the third image segment are decoded (time t6), the first processor 22 suspends the entropy decoding process and starts reconstructing the third image segment according to the decoded symbols.
Similarly, the second processor 24 may continue the entropy decoding process for the bitstream after completing the pixel reconstruction process for the second image segment (time t5), starting from the end bit corresponding to the second image segment (i.e., where the entropy decoding process was previously suspended by the second processor 24). Until all the symbols associated with the pixels included in the fourth image segment are decoded (time t7), the second processor 24 suspends the entropy decoding process and starts reconstructing the fourth image segment according to the decoded symbols.
In the example shown in fig. 5(a) and 5(B), the first processor 22 and the second processor 24 may not exchange information related to the entropy decoding process, but may perform the entropy decoding process on the bitstream independently.
It should be noted that the scope of the present invention is not limited to the first processor 22 waiting until the entropy decoding process of the first image partition is completely completed before the pixel reconstruction process of the first image partition is started. In other words, if the entropy decoding process performed by the first processor 22 already decodes a portion of the symbols associated with the pixels included in the first image segment, and the portion of the symbols is sufficient for the first processor 22 to start a portion of the pixel reconstruction process (e.g., sufficient for starting the pixel reconstruction process for a certain image block), the first processor 22 can start the pixel reconstruction process and then continue to execute the entropy decoding process from the place where the entropy decoding process was previously suspended. In this way, the first processor 22 and the second processor 24 can perform the entropy decoding process and the pixel reconstruction process for each row of image blocks in the whole frame one by one according to the above schedule.
As can be seen from the above description, unlike the prior art that needs to wait for the entropy decoding process of the entire frame to complete before starting the pixel reconstruction process, in the image processing apparatus 200 according to the present invention, the first processor 22 and the second processor 24 start to operate in parallel in the entropy decoding stage. By fully utilizing the computing resources of the second processor 24, the image processing apparatus 200 can increase the speed of reconstructing the whole frame.
Fig. 5(C) is a timing diagram illustrating another example of a schedule that may be used by the image processing apparatus 200. In this example, the first processor 22 starts the entropy decoding process for the bitstream of the input video processing apparatus 200 earlier than the second processor 24. More specifically, the first processor 22 performs the entropy decoding process from the head of the bit string at time t 1. The first processor 22 suspends the entropy decoding process after obtaining a first specific bit in the bit string, and provides a first entropy decoding status and the position information of the first specific bit in the bit string to the second processor 24. In the example shown in fig. 5(C), the first specific bit corresponds to the start bit of the second image segment. Based on the entropy decoding status and position information provided by the first processor 22, the second processor 24 can perform an entropy decoding process on the bit string starting from the first specific bit. In practice, the first processor 22 can store the entropy decoding status and the position information in the common storage area 28 for the second processor 24 to use. That is, the second processor 24 does not need to perform the entropy decoding procedure from the beginning of the entire bit string to obtain the information related to the start bit of the second image segment.
As shown in fig. 5(C), the second processor 24 performs an entropy decoding procedure from time t2 to decode the symbols associated with the pixels included in the second image segment. Similarly, the second processor 24 can suspend the entropy decoding process after obtaining a second specific bit in the bit string, and provide a second entropy decoding status and position information of the second specific bit in the bit string to the first processor 22. In the example shown in fig. 5(C), the second specific bit corresponds to the start bit of the third image segment. That is, the second processor 24 suspends the entropy decoding process (time t3) and starts reconstructing the second image segment after solving all the symbols associated with the pixels included in the second image segment.
After the first processor 22 completes the pixel reconstruction process for the first video segment at time t4, the entropy decoding process is performed on the bitstream starting from the start bit of the third video segment according to the latest entropy decoding status and position information provided earlier by the second processor 24 (time t 4). Similarly, the second processor 24 may then perform the entropy decoding process on the bitstream starting from the start bit of the fourth image segment according to the latest entropy decoding status and position information provided earlier by the first processor 22 (time t 5).
As can be seen from comparing FIG. 5(C) and FIG. 5(B), by sharing the operation result of the first processor 22, the second processor 24 does not need to perform the entropy decoding process from the start bit of the first image segment. Similarly, by sharing the operation result of the second processor 24, the first processor 22 does not need to start the entropy decoding process from the start bit of the second video segment, thereby reducing the operation time and advancing the time point of starting the entropy decoding process for the third video segment.
It should be noted that each image segment does not necessarily have to be divided into a row of image blocks as illustrated in the above description. In practice, the circuit designer can properly arrange and predetermine the boundary points of each image partition according to the operation speed of the first processor 22 and the second processor 24, the dependency between the image partitions, and the time spent by the entropy decoding process and the pixel reconstruction process, so that the first processor 22 and the second processor 24 need not suspend the operation as much as possible due to waiting for the other to provide data, thereby improving the overall performance of the image processing apparatus 200.
Those skilled in the art will appreciate that the concepts of the present invention may be applied to a processor having more than two processors. For example, if three processors are available, the first, fourth, and seventh rows … of horizontal image blocks may be sent to the first processor for reconstruction, the second, fifth, and eighth rows … of horizontal image blocks may be sent to the second processor for reconstruction, the third, sixth, and ninth rows … of horizontal image blocks may be sent to the second processor for reconstruction, and so on.
According to another embodiment of the present invention, an image processing method for reconstructing a frame including a first image section and a second image section using a first processor, a second processor and a common storage area is provided. The flowchart of the image processing method is shown in fig. 6. The first video segment and the second video segment are converted into a continuous bit stream through a pixel deconstruction process and an entropy encoding process. In the bit string, a plurality of bits associated with the second image segment follow a plurality of bits associated with the first image segment.
First, in step S61, the first processor performs an entropy decoding process on the bitstream to obtain a set of first symbols. In the following step S62, the first processor performs a pixel reconstruction process according to the set of first symbols to reconstruct the first image segment. Next, in step S63, the first processor stores the reconstructed first image segment into the common storage area.
In step S64, the second processor performs an entropy decoding process on the bit string to obtain a set of second symbols. The execution time for starting step S64 may be the same as that for step S61, or may be later than that for step S61. In addition, step S64 can be performed by the second processor starting from the beginning of the entire bitstream or starting from the middle of the bitstream according to the latest entropy decoding status and position information provided by the first processor.
Next, in step S65, the second processor obtains the portion of the first image segment associated with the second image segment after reconstruction from the common storage area. Since the partial data of the first video partition may be required for reconstructing the second video partition, the starting time of step S65 may be determined by the completion time of step S63. Then, in step S66, the second processor performs a pixel reconstruction process according to the set of second symbols and the obtained portion of the first image segment to reconstruct the second image segment.
It can be understood by those skilled in the art that various operation changes (for example, how to allocate the reconstruction work of the subsequent other image sections) described in the foregoing description of the image processing apparatus 200 can also be applied to the image processing method in fig. 6, and the details thereof are not repeated.
According to another embodiment of the present invention, a non-transitory computer readable storage medium for controlling a first processor and a second processor to reconstruct a frame comprising a first image segment and a second image segment is provided. The first video segment and the second video segment are converted into a continuous bit stream through a pixel deconstruction process and an entropy encoding process. In the bit string, a plurality of bits associated with the second image segment follow a plurality of bits associated with the first image segment. The non-transitory computer readable storage medium stores program codes that can be read and executed by a processor. A first program code is used for controlling the first processor to perform an entropy decoding process on the bit string to decode a set of first symbols. A second program code for controlling the first processor to perform a pixel reconstruction process according to the set of first symbols to reconstruct the first image segment and store the reconstructed first image segment in the common storage area. A third code for controlling the second processor to perform entropy decoding on the bit string to decode a second symbol. A fourth program code for controlling the second processor to obtain a portion of the reconstructed first image segment associated with the second image segment from the common storage area, and perform a pixel reconstruction procedure according to the set of second symbols and the obtained portion of the first image segment to reconstruct the second image segment.
In practice, the computer readable medium may be any non-transitory medium that stores instructions that can be read, decoded and executed by a processor. Non-transitory media include electronic, magnetic, and optical storage devices. Non-transitory computer readable media include, but are not limited to: read-only memory (ROM), random-access memory (RAM) and other electronic storage devices, CD-ROM, DVD and other optical storage devices, magnetic tape, floppy disk, hard disk and other magnetic storage devices. These processor instructions may implement the present invention using a variety of programming languages. On the other hand, the various operational changes described in the introduction of the image processing apparatus 200 can also be applied to the computer readable medium, and the details thereof are not repeated.
The foregoing detailed description of the preferred embodiments is intended to more clearly illustrate the features and spirit of the present invention, and not to limit the scope of the invention by the preferred embodiments disclosed above. On the contrary, it is intended to cover various modifications and equivalent arrangements included within the scope of the claims.
Claims (10)
1. An image processing apparatus for reconstructing a frame comprising a first image section and a second image section, the first image section and the second image section being converted into a continuous bit string by a pixel deconstruction process and an entropy encoding process; in the bit string, a plurality of bits associated with the second image segment follow a plurality of bits associated with the first image segment; the image processing system comprises:
a common storage area;
a first processor for performing an entropy decoding process on the bit string to obtain a set of first symbols, performing a pixel reconstruction process according to the set of first symbols to reconstruct the first image segment, and storing the reconstructed first image segment in the common storage area; and
a second processor for performing an entropy decoding process on the bit stream to obtain a second symbol, and obtaining a portion of the reconstructed first image segment associated with the second image segment from the common storage area; then the second processor performs a pixel reconstruction process according to the set of second symbols and the obtained portion of the first image section to reconstruct the second image section;
the first processor and the second processor perform entropy decoding on the bit string independently from an initial bit corresponding to the first image segment in the bit string.
2. The image processing device as claimed in claim 1, wherein the first processor:
after obtaining an end bit of the bit string corresponding to the first image section, pausing an entropy decoding process, and starting a pixel reconstruction process to reconstruct the first image section; and
after the pixel reconstruction process is completed for the first image segment, the entropy decoding process is continued for the bit string starting from the end bit corresponding to the first image segment.
3. An image processing apparatus for reconstructing a frame comprising a first image section and a second image section, the first image section and the second image section being converted into a continuous bit string by a pixel deconstruction process and an entropy encoding process; in the bit string, a plurality of bits associated with the second image segment follow a plurality of bits associated with the first image segment; the image processing apparatus includes:
a common storage area;
a first processor for performing an entropy decoding process on the bit string to obtain a set of first symbols, performing a pixel reconstruction process according to the set of first symbols to reconstruct the first image segment, and storing the reconstructed first image segment in the common storage area; and
a second processor for performing an entropy decoding process on the bit stream to obtain a second symbol, and obtaining a portion of the reconstructed first image segment associated with the second image segment from the common storage area; then the second processor performs a pixel reconstruction process according to the set of second symbols and the obtained portion of the first image section to reconstruct the second image section;
wherein the first processor starts an entropy decoding process for the bitstream before the second processor; the first processor suspends the entropy decoding process after obtaining a first specific bit in the bit string and provides a first entropy decoding state and the position information of the first specific bit in the bit string to the second processor; based on the first entropy decoding status and the position information of the first specific bit, the second processor performs an entropy decoding process on the bit string starting from the first specific bit.
4. The image processing device as claimed in claim 3, wherein the first specific bit is a start bit of the bit string corresponding to the second image segment.
5. The image processing apparatus as claimed in claim 3, wherein the second processor suspends entropy decoding after obtaining a second specific bit in the bit string, and provides a second entropy decoding status and location information of the second specific bit in the bit string to the first processor; based on the second entropy decoding status and the position information of the second specific bit, the first processor performs an entropy decoding process on the bit string starting from the second specific bit.
6. An image processing method, utilize a first processor, a second processor and a common storage area to rebuild a frame, a first image section and a second image section in the frame are converted into a continuous bit string through pixel deconstruction procedure and entropy coding procedure; in the bit string, a plurality of bits associated with the second image segment follow a plurality of bits associated with the first image segment; the image processing method comprises the following steps:
(a) performing an entropy decoding process on the bit string by using the first processor to obtain a set of first symbols;
(b) utilizing the first processor to perform a pixel reconstruction procedure according to the set of first symbols to reconstruct the first image segment, and storing the reconstructed first image segment in the common storage area;
(c) performing an entropy decoding process on the bit string by using the second processor to obtain a set of second symbols; and
(d) obtaining a portion of the reconstructed first image segment associated with the second image segment from the common storage area by using the second processor, and performing a pixel reconstruction process according to the set of second symbols and the obtained portion of the first image segment to reconstruct the second image segment;
in step (a) and step (c), the first processor and the second processor independently perform entropy decoding on the bit string starting from a start bit of the bit string corresponding to the first image segment.
7. The image processing method of claim 6, further comprising:
suspending an entropy decoding process and starting a pixel reconstruction process to reconstruct the first image segment after obtaining an end bit corresponding to the first image segment in the bit string by using the first processor; and
after completing the pixel reconstruction process for the first image segment, the first processor continues the entropy decoding process for the bit stream starting from the end bit corresponding to the first image segment.
8. An image processing method, utilize a first processor, a second processor and a common storage area to rebuild a frame, a first image section and a second image section in the frame are converted into a continuous bit string through pixel deconstruction procedure and entropy coding procedure; in the bit string, a plurality of bits associated with the second image segment follow a plurality of bits associated with the first image segment; the image processing method comprises the following steps:
(a) performing an entropy decoding process on the bit string by using the first processor to obtain a set of first symbols;
(b) utilizing the first processor to perform a pixel reconstruction procedure according to the set of first symbols to reconstruct the first image segment, and storing the reconstructed first image segment in the common storage area;
(c) performing an entropy decoding process on the bit string by using the second processor to obtain a set of second symbols; and
(d) obtaining a portion of the reconstructed first image segment associated with the second image segment from the common storage area by using the second processor, and performing a pixel reconstruction process according to the set of second symbols and the obtained portion of the first image segment to reconstruct the second image segment;
wherein the execution time of step (a) is earlier than that of step (c); the image processing method further comprises the following steps:
after the step (a) is executed and before the step (c) is executed, the first processor suspends the entropy decoding process after acquiring a first specific bit in the bit string, and provides a first entropy decoding state and the position information of the first specific bit in the bit string to the second processor;
wherein step (c) comprises performing an entropy decoding process on the bitstream starting from the first specific bit by using the second processor according to the first entropy decoding status and the position information of the first specific bit.
9. The image processing method as claimed in claim 8, wherein the first specific bit is a start bit of the bit string corresponding to the second image segment.
10. The image processing method of claim 8, further comprising:
suspending the entropy decoding process after obtaining a second specific bit in the bit string by using the second processor, and providing a second entropy decoding state and position information of the second specific bit in the bit string to the first processor; and
performing an entropy decoding process on the bit string starting from the second specific bit according to the second entropy decoding status and the position information of the second specific bit by using the first processor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610978541.0A CN108063948B (en) | 2016-11-08 | 2016-11-08 | Image processing device and image processing method matched with multiple processors |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610978541.0A CN108063948B (en) | 2016-11-08 | 2016-11-08 | Image processing device and image processing method matched with multiple processors |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN108063948A CN108063948A (en) | 2018-05-22 |
| CN108063948B true CN108063948B (en) | 2020-08-04 |
Family
ID=62136853
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610978541.0A Active CN108063948B (en) | 2016-11-08 | 2016-11-08 | Image processing device and image processing method matched with multiple processors |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN108063948B (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2011004577A1 (en) * | 2009-07-06 | 2011-01-13 | パナソニック株式会社 | Image decoding device, image encoding device, image decoding method, image encoding method, program, and integrated circuit |
| CN104754407A (en) * | 2013-12-26 | 2015-07-01 | 联发科技股份有限公司 | Method for compression and decompression of image frames in image or video systems |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7554468B2 (en) * | 2006-08-25 | 2009-06-30 | Sony Computer Entertainment Inc, | Entropy decoding methods and apparatus using most probable and least probable signal cases |
| US8311111B2 (en) * | 2008-09-11 | 2012-11-13 | Google Inc. | System and method for decoding using parallel processing |
| US9467699B2 (en) * | 2008-12-03 | 2016-10-11 | Hfi Innovation Inc. | Method for performing parallel coding with ordered entropy slices, and associated apparatus |
| CN102123280B (en) * | 2010-01-11 | 2016-03-02 | 联发科技股份有限公司 | Coding/decoding method and decoding device |
| KR102417101B1 (en) * | 2011-12-29 | 2022-07-05 | 엘지전자 주식회사 | Video encoding and decoding method and apparatus using same |
| KR102160372B1 (en) * | 2012-09-26 | 2020-09-28 | 벨로스 미디어 인터내셔널 리미티드 | Image decoding method, image encoding method, image decoding device, image encoding device, and image encoding/decoding device |
| CN104539972A (en) * | 2014-12-08 | 2015-04-22 | 中安消技术有限公司 | Method and device for controlling video parallel decoding in multi-core processor |
-
2016
- 2016-11-08 CN CN201610978541.0A patent/CN108063948B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2011004577A1 (en) * | 2009-07-06 | 2011-01-13 | パナソニック株式会社 | Image decoding device, image encoding device, image decoding method, image encoding method, program, and integrated circuit |
| CN104754407A (en) * | 2013-12-26 | 2015-07-01 | 联发科技股份有限公司 | Method for compression and decompression of image frames in image or video systems |
Also Published As
| Publication number | Publication date |
|---|---|
| CN108063948A (en) | 2018-05-22 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US8218641B2 (en) | Picture encoding using same-picture reference for pixel reconstruction | |
| CN110945871B (en) | Efficient intra-coding for screen data | |
| JP2006094544A5 (en) | ||
| CN103339959A (en) | Dynamic video switching | |
| CN109862357A (en) | Cloud game image encoding method, device, equipment and the storage medium of low latency | |
| US20190246117A1 (en) | Encoding data arrays | |
| JP2014096755A (en) | Image coding apparatus, image coding method, and program, and image decoding apparatus, image decoding method, and program | |
| US20190279330A1 (en) | Watermark embedding method and apparatus | |
| JP2015012410A (en) | Image decoder | |
| CN105163126A (en) | Hardware decoding method and device based on HEVC protocol | |
| US7848610B2 (en) | Data processing system, reproduction apparatus, computer, reproduction method, program, and storage medium | |
| CN108156460B (en) | Video decoding system, video decoding method, and computer storage medium therefor | |
| JP2015508620A (en) | Multi-thread texture decoding | |
| CN108063948B (en) | Image processing device and image processing method matched with multiple processors | |
| US8280220B2 (en) | Reproduction apparatus, data processing system, reproduction method, program, and storage medium | |
| JP6912158B2 (en) | Video data processing system | |
| JP6187826B2 (en) | Moving picture coding apparatus and moving picture coding method | |
| TWI605416B (en) | Image processing apparatus, method and non-transient computer-reading storage medium | |
| JP2010278597A (en) | Apparatus and method for processing information | |
| US7729591B2 (en) | Data processing apparatus, reproduction apparatus, data processing system, reproduction method, program, and storage medium | |
| CN112511838A (en) | Method, device, equipment and readable medium for reducing video transcoding delay | |
| JP2019528621A (en) | Image coding / decoding method, apparatus and image processing apparatus | |
| JP5100561B2 (en) | Image processing apparatus and image processing method | |
| JP4850806B2 (en) | Entropy encoding apparatus, entropy encoding method, and computer program | |
| KR20160109048A (en) | Method for image encoding and image decoding, and apparatus for image encoding and image decoding |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| TA01 | Transfer of patent application right | ||
| TA01 | Transfer of patent application right |
Effective date of registration: 20200414 Address after: No.1, Duhang 1st Road, Hsinchu City, Hsinchu Science Park, Taiwan, China Applicant after: MEDIATEK Inc. Address before: 1/2, 4th floor, 26 Taiyuan Street, Zhubei City, Hsinchu County, Taiwan, China Applicant before: MStar Semiconductor, Inc. |
|
| GR01 | Patent grant | ||
| GR01 | Patent grant |