CN107911241A - A kind of signal simulation analysis system and method based on Gigabit Media stand-alone interface - Google Patents
A kind of signal simulation analysis system and method based on Gigabit Media stand-alone interface Download PDFInfo
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- CN107911241A CN107911241A CN201711130290.1A CN201711130290A CN107911241A CN 107911241 A CN107911241 A CN 107911241A CN 201711130290 A CN201711130290 A CN 201711130290A CN 107911241 A CN107911241 A CN 107911241A
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- clock driver
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L41/00—Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
- H04L41/14—Network analysis or design
- H04L41/145—Network analysis or design involving simulating, designing, planning or modelling of a network
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Abstract
The present invention provides a kind of signal simulation analysis system and method based on Gigabit Media stand-alone interface, and in circuit board of server system, the signal integrity performance of mainboard allows for ensureing.When certain block board signal integrity is undesirable, since server is a whole system, other subcards are able to ensure that signal integrity, and then ensure that the safety of whole server operation.Greatly enhance the signal integrity and reliability of RACK whole machine cabinet servers.PHY sides signal and MAC sides signal under different frequency are analyzed by signal simulation analysis system and method based on Gigabit Media stand-alone interface, obtain different simulation waveforms, and then can obtain specifically to the damaed cordition of signal.
Description
Technical field
The present invention relates to server field, more particularly to a kind of signal simulation analysis based on Gigabit Media stand-alone interface
System and method.
Background technology
RGMII (Reduced Gigabit Media Independent Interface) is Reduced GMII (lucky ratios
Special medium independent interface).RGMII uses 4 bit data interfaces, work clock 125MHz, and same in rising edge and trailing edge
When transmit data, therefore transmission rate is up to 1000Mbps.
At present in circuit board of server system, the MAC sides and PHY sides of RGMII can not also be to lacking to PHY and MAC
Signal carry out simulation analysis.
The content of the invention
In order to overcome above-mentioned deficiency of the prior art, the present invention provides a kind of letter based on Gigabit Media stand-alone interface
Number simulation analysis system, including：PHY modules, clock driver and MAC module；
PHY modules are communicated by clock driver and MAC module；
Clock driver produces simulation analysis system clock, is used for PHY modules and MAC module simulation analysis.
Preferably, PHY sides Tx signal wires and PHY sides Rx signal wires are equipped between PHY modules and clock driver；
PHY modules are connected by PHY sides Tx signal wires with clock driver, Propagation Simulation analysis Tx signals；
PHY modules are connected by PHY sides Rx signal wires with clock driver, Propagation Simulation analysis Rx signals.
Preferably, MAC sides Tx signal wires and MAC sides Rx signal wires are equipped between MAC module and clock driver；
MAC module is connected by MAC sides Tx signal wires with clock driver, Propagation Simulation analysis Tx signals；
MAC module is connected by MAC sides Rx signal wires with clock driver, Propagation Simulation analysis Rx signals.
A kind of signal simulation analysis method based on Gigabit Media stand-alone interface, method include：
Step 1, PHY modules, clock driver and MAC module are built for RGMII signals；
Step 2, the link for being RGMII carry out topological setting, wherein PHY modules by clock driver and MAC module into
Row information communicates；
Step 3, by default simulation parameter, sets parameters；
Step 4, is the waveform for adding the PHY obtained after a Rise and MAC at Driver ends, is verified by waveform different
Influence of the frequency to the signal transmission of PHY modules and MAC module.
Preferably, step 1 further includes：Clock driver produces simulation analysis system clock, for PHY modules and MAC module
Simulation analysis use.
Preferably, step 2 further includes：Using SigXplorer softwares to PHY modules, clock driver and MAC module
Signal transmission is extracted.
Preferably, step 3 further includes：In SigXplorer softwares, by default simulation parameter, every ginseng is set
Number, setting parameters include：Give tacit consent to cutoff frequency setting, measurement period setting.
As can be seen from the above technical solutions, the present invention has the following advantages：
In circuit board of server system, the signal integrity performance of mainboard allows for ensureing.It is complete in certain block board signal
When whole property is undesirable, since server is a whole system, other subcards are able to ensure that signal integrity, and then ensure that whole
The safety of server operation.Greatly enhance the signal integrity and reliability of RACK whole machine cabinet servers.By based on gigabit
PHY sides signal and MAC sides signal under signal simulation analysis system and method the analysis different frequency of medium independent interface, obtain not
Same simulation waveform, and then can obtain specifically to the damaed cordition of signal.
Brief description of the drawings
In order to illustrate more clearly of technical scheme, attached drawing needed in description will be made below simple
Ground introduction, it should be apparent that, drawings in the following description are only some embodiments of the present invention, for ordinary skill
For personnel, without creative efforts, other attached drawings can also be obtained according to these attached drawings.
Fig. 1 is the signal simulation analysis system schematic diagram based on Gigabit Media stand-alone interface；
Fig. 2 is the signal simulation analysis method flow chart based on Gigabit Media stand-alone interface；
Fig. 3 is PHY ends simulation waveform；
Fig. 4 is MAC ends simulation waveform.
Embodiment
Goal of the invention, feature, advantage to enable the present invention is more obvious and understandable, will use below specific
Embodiment and attached drawing, the technical solution protected to the present invention are clearly and completely described, it is clear that implementation disclosed below
Example is only part of the embodiment of the present invention, and not all embodiment.Based on the embodiment in this patent, the common skill in this area
All other embodiment that art personnel are obtained without making creative work, belongs to the model of this patent protection
Enclose.
The present embodiment provides a kind of signal simulation analysis system based on Gigabit Media stand-alone interface, as shown in Figure 1, bag
Include：PHY modules 1, clock driver 2 and MAC module 3；
PHY modules 1 are communicated by clock driver 2 and MAC module 3；Clock driver 2 produces simulation analysis
System clock, uses for PHY modules 1 and 2 simulation analysis of MAC module.PHY sides are equipped between PHY modules 1 and clock driver 2
Tx signal wires 11 and PHY sides Rx signal wires 12；PHY modules 1 are connected by PHY sides Tx signal wires 11 with clock driver 2, transmission
Simulation analysis Tx signals；PHY modules 1 are connected by PHY sides Rx signal wires 12 with clock driver 2, Propagation Simulation analysis Rx letters
Number.MAC sides Tx signal wires 13 and MAC sides Rx signal wires 14 are equipped between MAC module 3 and clock driver 2；MAC module 3 passes through
MAC sides Tx signal wires 13 are connected with clock driver 2, Propagation Simulation analysis Tx signals；MAC module 3 passes through MAC sides Rx signal wires
14 are connected with clock driver 2, Propagation Simulation analysis Rx signals.
The present invention also provides a kind of signal simulation analysis method based on Gigabit Media stand-alone interface, such as Fig. 2, Fig. 3, figure
Shown in 4, method includes：
S1, PHY modules, clock driver and MAC module are built for RGMII signals；
Clock driver produces simulation analysis system clock, is used for PHY modules and MAC module simulation analysis.
S2, the link for being RGMII carry out topological setting, and wherein PHY modules carry out letter by clock driver and MAC module
Message communication；
Using SigXplorer softwares to PHY modules, the signal transmission of clock driver and MAC module is extracted.
S3, by default simulation parameter, sets parameters；
In SigXplorer softwares, by default simulation parameter, parameters are set, setting parameters include：
Give tacit consent to cutoff frequency setting, measurement period setting.
S4, is the waveform for adding the PHY obtained after a Rise and MAC at Driver ends, different frequency is verified by waveform
Influence to the signal transmission of PHY modules and MAC module.
Specifically, PHY modules by clock driver and MAC module communicate between support transmission rate：
10M/100M/1000Mb/s, its correspondence clk signal are respectively：2.5MHz/25MHz/125MHz.RGMII data structures meet
IEEE 802.3-2000 are shown in IEEE ethernet standards, interface definition.Purpose using RGMII is to reduce circuit cost, makes realization
The number of pins of the device of this interface is reduced to 14 from 25.
TXD[1:0]：Data sending signal wire, data bit width 2, be MII interfaces half；RXD[1:0]：Data receiver
Signal wire, data bit width 2, be MII interfaces half；It is connected respectively to MAC sides and PHY sides.
The link of both two kinds of signals of different cabling modes and Tx, Rx is carried using SigXplorer softwares
Take, default topological structure can be obtained.Receiving terminal and transmitting terminal can be equipped with default topological structure, is responsible for high speed signal
Send and receive.High-speed line can be equipped with, major function is transmission high-speed line.Via, high-speed line and miscellaneous line can be equipped with
The switching of different layers in lamination is realized by via.By the contact between the high-speed line and via of different layers, finally realize
Default topology.
In SigXplorer softwares, by oneself understanding to simulation parameter, after setting parameters such as figure three, this
A little parameters are respectively that Default Cutoff Frequency (acquiescence cutoff frequency) are set as 10GHz, Measurement
Cycle (measurement period) is 5-8(s), such setting can easily see that the last emulation after emulation obtains waveform.
In SigXplorer softwares, after setting parameters, finally emulation obtains waveform as shown in Figure 3 and Figure 4.
Waveform shown in Fig. 3 and Fig. 4, for different clock frequencies, PHY ends simulation waveform and MAC ends simulation waveform have one
The trend of cause, at PHY ends with the rise of frequency, the rise time reduces, and overshoot is held essentially constant, and MAC ends also have
Same trend.
The foregoing description of the disclosed embodiments, enables professional and technical personnel in the field to realize or use the present invention.
A variety of modifications to these embodiments will be apparent for those skilled in the art, as defined herein
General Principle can be realized in other embodiments without departing from the spirit or scope of the present invention.Therefore, it is of the invention
The embodiments shown herein is not intended to be limited to, and is to fit to and the principles and novel features disclosed herein phase one
The most wide scope caused.
Claims (7)
- A kind of 1. signal simulation analysis system based on Gigabit Media stand-alone interface, it is characterised in that including：PHY modules, when Clock driver and MAC module；PHY modules are communicated by clock driver and MAC module；Clock driver produces simulation analysis system clock, is used for PHY modules and MAC module simulation analysis.
- 2. the signal simulation analysis system according to claim 1 based on Gigabit Media stand-alone interface, it is characterised in thatPHY sides Tx signal wires and PHY sides Rx signal wires are equipped between PHY modules and clock driver；PHY modules are connected by PHY sides Tx signal wires with clock driver, Propagation Simulation analysis Tx signals；PHY modules are connected by PHY sides Rx signal wires with clock driver, Propagation Simulation analysis Rx signals.
- 3. the signal simulation analysis system according to claim 1 or 2 based on Gigabit Media stand-alone interface, its feature exist In,MAC sides Tx signal wires and MAC sides Rx signal wires are equipped between MAC module and clock driver；MAC module is connected by MAC sides Tx signal wires with clock driver, Propagation Simulation analysis Tx signals；MAC module is connected by MAC sides Rx signal wires with clock driver, Propagation Simulation analysis Rx signals.
- 4. a kind of signal simulation analysis method based on Gigabit Media stand-alone interface, it is characterised in that method includes：Step 1, PHY modules, clock driver and MAC module are built for RGMII signals；Step 2, the link for being RGMII carry out topological setting, and wherein PHY modules carry out letter by clock driver and MAC module Message communication；Step 3, by default simulation parameter, sets parameters；Step 4, is the waveform for adding the PHY obtained after a Rise and MAC at Driver ends, different frequency is verified by waveform Influence to the signal transmission of PHY modules and MAC module.
- 5. the signal simulation analysis method according to claim 4 based on Gigabit Media stand-alone interface, it is characterised in thatStep 1 further includes：Clock driver produces simulation analysis system clock, makes for PHY modules and MAC module simulation analysis With.
- 6. the signal simulation analysis method according to claim 4 based on Gigabit Media stand-alone interface, it is characterised in thatStep 2 further includes：Using SigXplorer softwares to PHY modules, the signal transmission of clock driver and MAC module into Row extraction.
- 7. the signal simulation analysis method according to claim 4 based on Gigabit Media stand-alone interface, it is characterised in thatStep 3 further includes：In SigXplorer softwares, by default simulation parameter, parameters are set, setting is every Parameter includes：Give tacit consent to cutoff frequency setting, measurement period setting.
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| US20090257457A1 (en) * | 2008-04-15 | 2009-10-15 | Wael William Diab | Method and system for mac and phy synchronization for energy efficient networking |
| CN101527658A (en) * | 2009-04-13 | 2009-09-09 | 重庆重邮东电通信技术有限公司 | Portable gigabit Ethernet network performance tester and manufacturing method thereof |
| CN106230718A (en) * | 2016-08-03 | 2016-12-14 | 天津光电聚能专用通信设备有限公司 | Based on XilinxFPGA many kilomega networks converging system and implementation method |
| CN106961338A (en) * | 2017-03-24 | 2017-07-18 | 中国南方电网有限责任公司电网技术研究中心 | A kind of RTDS emulating instruments and the method for PCI-Express fast exchange data |
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