CN107888297B - Underwater acoustic communication delay-tolerant disconnection network system with dormancy awakening function and method - Google Patents
Underwater acoustic communication delay-tolerant disconnection network system with dormancy awakening function and method Download PDFInfo
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- CN107888297B CN107888297B CN201711161148.3A CN201711161148A CN107888297B CN 107888297 B CN107888297 B CN 107888297B CN 201711161148 A CN201711161148 A CN 201711161148A CN 107888297 B CN107888297 B CN 107888297B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B13/00—Transmission systems characterised by the medium used for transmission, not provided for in groups H04B3/00 - H04B11/00
- H04B13/02—Transmission systems in which the medium consists of the earth or a large mass of water thereon, e.g. earth telegraphy
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
- H04B1/40—Circuits
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/12—Arrangements for detecting or preventing errors in the information received by using return channel
- H04L1/16—Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals
- H04L1/18—Automatic repetition systems, e.g. Van Duuren systems
- H04L1/1829—Arrangements specially adapted for the receiver end
- H04L1/1835—Buffer management
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/12—Arrangements for detecting or preventing errors in the information received by using return channel
- H04L1/16—Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals
- H04L1/18—Automatic repetition systems, e.g. Van Duuren systems
- H04L1/1867—Arrangements specially adapted for the transmitter end
- H04L1/1874—Buffer management
Abstract
The invention relates to an underwater acoustic communication technology, in particular to an underwater acoustic communication capacity delay and interruption network system with a dormancy awakening function, which comprises a plurality of communication nodes, wherein each node comprises an underwater acoustic communication transceiver; the underwater acoustic communication transceiver comprises a signal receiving acoustic array, a signal transmitting acoustic array, a battery module, a weak signal receiving circuit, a signal acquisition and processing circuit, a power amplification circuit and a dormancy awakening control circuit; the battery module is respectively connected with the weak signal receiving circuit, the signal acquisition processing circuit, the power amplification circuit and the dormancy awakening control circuit; the signal receiving acoustic array is respectively connected with the weak signal receiving circuit and the dormancy awakening control circuit; the weak signal receiving circuit is sequentially connected with the signal acquisition processing circuit and the power amplifying circuit; the power amplification circuit is connected with the signal transmitting acoustic array; the signal acquisition processing circuit is respectively connected with the dormancy awakening control circuit and the upper computer. A Bundle mechanism is added to a network layer in the ARM, so that a network protocol has a capacity delay capacity disconnection function. The system can reduce the energy consumption of the underwater acoustic communication transceiver, prolong the life cycle and avoid retransmission.
Description
Technical Field
The invention belongs to the technical field of underwater acoustic communication, and particularly relates to an underwater acoustic communication delay-tolerant network system with a dormancy awakening function and a method thereof.
Background
The underwater acoustic communication network is an important method for marine environment monitoring and marine resource exploration, and along with the gradual increase of the demand of human on marine resource environment development, the requirements on the functions and the performance of an underwater acoustic communication network system are higher and higher. However, many challenges exist in the underwater acoustic communication network, and due to the closed characteristic of the marine environment and the flowing characteristic of the water body, the underwater communication network nodes are not convenient for frequent recovery processing, so that the underwater acoustic communication network is urgently required to have the characteristics of low power consumption and long life cycle; in addition, due to the fact that the underwater sound environment is limited in bandwidth, the underwater sound propagation rate is low, communication signals have large time delay, and a communication link is difficult to maintain for a long time, the underwater sound communication network with the delay tolerant and interruption tolerant mechanism has high application value.
At present, the underwater acoustic communication network system mainly focuses on improving the communication rate, and less focuses on reducing the system power consumption and reducing the network overhead. As in document 1: M.S. Martins, N.Pinto, G.Rocha, J.Cabral, S.Laceros Mendez, "Development of a 1Mbps Low Power Acoustic model for Underwater Communications", in 2014 IEEE International Ultrasonics Symposium, Pages 2482-. For another example, chinese patent application No. 201611122254.6, "in-band full duplex underwater acoustic communication device for suppressing interference from the digital and analog domains".
Disclosure of Invention
The invention aims to provide an underwater acoustic communication network system which can effectively reduce the energy consumption of an underwater acoustic communication transceiver, prolong the life cycle of the underwater acoustic communication transceiver and has a delay-tolerant function.
In order to achieve the purpose, the invention adopts the technical scheme that: an underwater acoustic communication capacity delay and interruption network system with a dormancy awakening function comprises a plurality of communication nodes, wherein each node comprises an underwater acoustic communication transceiver; the underwater acoustic communication transceiver comprises a signal receiving acoustic array, a signal transmitting acoustic array, a battery module, a weak signal receiving circuit, a signal acquisition and processing circuit, a power amplification circuit and a dormancy awakening control circuit; the battery module is respectively connected with the weak signal receiving circuit, the signal acquisition processing circuit, the power amplification circuit and the dormancy awakening control circuit; the signal receiving acoustic array is respectively connected with the weak signal receiving circuit and the dormancy awakening control circuit; the weak signal receiving circuit is connected with the signal acquisition processing circuit, and the signal acquisition processing circuit is connected with the power amplification circuit; the power amplification circuit is connected with the signal transmitting acoustic array; the signal acquisition processing circuit is respectively connected with the dormancy awakening control circuit and the upper computer.
In the underwater acoustic communication capacitance-delay-capacitance disconnection network system with the sleep awakening function, the weak signal receiving circuit comprises a differential-to-single-ended amplifier, a first preamplifier, a primary band-pass filter, a program-controlled amplifier, a secondary band-pass filter, a first voltage follower and a first isolation audio transformer which are sequentially connected; the differential-to-single-ended amplifier is connected with the signal receiving acoustic array.
In the underwater acoustic communication capacity-delay and capacity-interruption network system with the sleep awakening function, the signal acquisition processing circuit comprises an FPGA (field programmable gate array), an ARM (advanced RISC machine) connected with the FPGA, the FPGA is also connected with an analog-to-digital converter and a digital-to-analog converter, an analog-to-digital conversion driving circuit connected with the analog-to-digital converter, and a second voltage follower connected with the digital-to-analog conversion circuit; the ARM is connected with a water lamp, an RTC real-time clock, an RS232 serial port communication unit, a reset circuit, a storage circuit and an RS485 serial port communication unit; the analog-to-digital conversion driving circuit is connected with the first isolation audio transformer, the second voltage follower is connected with the power amplification circuit, the RS485 serial port communication is connected with the upper computer, and the ARM is connected with the dormancy awakening control circuit.
In the underwater acoustic communication capacity-delay and capacity-interruption network system with the sleep awakening function, the FPGA sending process comprises UART data receiving, ARM instruction analysis, RS encoding, interleaving and FSK modulation; the receiving process comprises signal synchronization, double-path envelope detection, decision feedback equalization, de-interleaving, RS decoding and UART data transmission; the FPGA is also used for driving control of analog-to-digital conversion and digital-to-analog conversion and gain control of a program-controlled amplifier in a weak signal receiving circuit.
In the underwater acoustic communication capacity delay and interruption network system with the sleep and wake-up function, the internal network protocol structure of the ARM includes a Bundle mechanism in a network layer, and is used for temporarily keeping a data in a network under the condition that a communication link is unreliable, and sending the data again when the link is reconnected to avoid retransmission; adopting a TDMA protocol as an MAC layer protocol; the network layer comprises an application layer, a Bundle layer, a routing layer and a media access layer; the routing layer is used for forwarding the data packet and is realized by adopting a static routing table; the Bundle layer is used for data storage and confirmation, and stores data packets in the form of files.
In the underwater acoustic communication capacity-delay-capacity-interruption network system with the dormancy awakening function, the power amplification circuit comprises a second isolation audio frequency transformer, a comparator, a driving circuit, a full-bridge power amplification circuit and an impedance matching circuit which are sequentially connected, wherein the comparator is connected with a triangular wave generator and the second isolation audio frequency transformer; the second isolation audio transformer is connected with the signal acquisition processing circuit; the impedance matching circuit is connected with the signal transmitting acoustic array.
In the above underwater acoustic communication delay-tolerant and disconnection network system with the sleep wake-up function, the sleep wake-up control circuit includes a third isolated audio transformer, a second preamplifier, an MSP430 and a relay, which are connected in sequence; the relay is connected with the battery module, the third isolation audio transformer is connected with the signal receiving acoustic array, and the MSP430 is connected with the signal acquisition processing circuit.
In the above-mentioned underwater acoustic communication delay-and-disconnect network system with sleep wake-up function, the battery module comprises a 24V battery pack, a relay connected with the 24V battery pack, the second 24V-to-5V isolation stabilized voltage power supply is connected through an isolation structure, the system 24V direct current at the output end of the relay respectively passes through a 24V-to-15V isolation stabilized voltage power supply and a first 24V-to-5V isolation stabilized voltage power supply which are connected through the isolation structure, the first 24V-to-5V isolation stabilized voltage power supply respectively passes through a 5V-to-positive and negative 5V isolation stabilized voltage power supply and a 5V-to-5V isolation stabilized voltage power supply which are connected through the isolation structure, the first 24V-to-5V isolation stabilized voltage power supply is connected, the 5V-to-3.3V linear stabilized voltage power supply is connected, the 5V-to-positive and negative 5V isolation stabilized voltage power supply is connected, and the second 24V-to-5V isolation stabilized voltage power supply is connected, the 5; the 24V-to-15V isolation stabilized voltage power supply and the 5V-to-5V isolation stabilized voltage power supply are connected with a power amplification circuit; the linear stabilized voltage power supply for converting positive and negative 5V into positive and negative 3.3V is connected with a weak signal receiving circuit; the 5V to 3.3V and 5V to 2.5V linear stabilized voltage power supply is connected with the signal acquisition and processing circuit; the 5V to 3.3V linear stabilized voltage power supply is connected with the dormancy awakening control circuit.
In an underwater acoustic communication network, due to the tightness of marine environment and the flowing characteristic of water, underwater communication network nodes are not convenient to frequently recover and process, the underwater acoustic communication network is required to have a long life cycle, and the power consumption is reduced as much as possible, so the invention provides a dormancy awakening control method of an underwater acoustic communication transceiver, which comprises the following steps:
and 2, when the node is in a working state, if the node needs to be switched into a dormant state, an ARM generates an instruction signal to inform the MSP430, and the MSP430 generates a control signal to disconnect a relay and stop supplying power to systems except the MSP 430.
Due to the fact that the bandwidth of the underwater acoustic environment is limited, the underwater acoustic propagation rate is low, communication signals have large time domain delay, a communication link is difficult to maintain for a long time, and an underwater acoustic communication network is required to have a delay-tolerant and interruption-tolerant mechanism. The invention provides a method for controlling the delay and interruption of the underwater acoustic communication network, which comprises the following steps:
s1, in an initialization stage, the whole system establishes a static routing table, and then the routing table is updated periodically;
s2, keeping and confirming data through a Bundle layer, and storing a data packet in a file form;
s3, a sending process:
firstly, inquiring whether an application layer sending queue is empty or not, and if the application layer sending queue is empty, destroying a thread; otherwise, taking out the head of the queue data packet to package the Bundle and the routing layer, storing the Bundle packet into a Bundle storage file, inquiring a routing table to obtain the MAC address of the next hop node, and inserting the address and the data packet into a network layer sending queue to wait for the MAC layer to process;
meanwhile, starting a timer thread, and destroying the thread when receiving the reply of the receiving node before the timing time comes; otherwise, extracting the data from the Bundle storage file according to the maximum retransmission times, inquiring the routing table again for sending, if the maximum retransmission times is exceeded, deleting the data from the Bundle file, and notifying an application layer that the data sending fails;
s3, a receiving process:
after receiving the data packet of the MAC layer, firstly, carrying out routing layer decapsulation;
determining whether to forward according to whether the destination IP address in the packet is the IP address of the packet or the broadcast address of the packet, if not, forwarding, decapsulating the Bundle layer, replying a custody file data packet to a sending node, and inserting the data into an application layer sending queue;
if so, performing Bundle layer decapsulation, and simultaneously replying a custody file data packet to the sending node;
if the destination IP address of the packet received by the node is the own IP address or broadcast address, judging whether to keep the file data packet or a simple data packet;
if the data packet is the safekeeping file data packet, deleting the corresponding Bundle record from the Bundle safekeeping file, sending a message to inform a retransmission timer, and stopping the regular retransmission of the thread;
if the data packet is a pure data packet, replying a data packet for keeping files to a sending node, inquiring whether a corresponding receiving queue exists in the current receiving queue group or not according to the port number in the data packet, if so, sending the data packet to the corresponding receiving queue, and otherwise, establishing a corresponding receiving thread for processing.
The invention has the beneficial effects that: a low-power MSP430 singlechip is adopted as a sleep wake-up controller on a hardware circuit, and the power supply and the power failure are controlled through a relay switch, so that the power consumption of the node communication transceiver can be effectively reduced, and the life cycle of the node communication transceiver can be prolonged; aiming at the characteristics that the propagation delay of an underwater network is large and a communication link is difficult to maintain for a long time, the invention adds a Bundle mechanism which is suitable for a Delay Tolerant Network (DTN) in a network layer, temporarily stores a part of data in the network under the condition that the communication link is unreliable, and sends the data again when waiting for the reconnection of the link, thereby avoiding retransmission.
Drawings
FIG. 1 is a diagram of an application scenario of one embodiment of the present invention;
FIG. 2 is a block diagram of a prior art underwater acoustic communications transceiver;
FIG. 3 is a block diagram of an underwater acoustic communicator in accordance with one embodiment of the present invention;
fig. 4 is a full-bridge power amplifier topology circuit according to an embodiment of the present invention;
FIG. 5 is a block diagram of a driver circuit according to one embodiment of the present invention;
FIG. 6 is a block diagram of a sleep wake-up circuit according to an embodiment of the present invention;
fig. 7 is a block diagram of a communicator isolation structure in accordance with one embodiment of the present invention;
FIG. 8 is a schematic diagram of functional blocks within an FPGA of one embodiment of the present invention;
FIG. 9 is a diagram illustrating an ARM internal network protocol architecture according to an embodiment of the present invention;
FIG. 10 is a flow chart of a Bundle protocol transmission process according to an embodiment of the present invention;
fig. 11 is a flow chart of Bundle protocol receiving process according to an embodiment of the present invention.
Detailed Description
Embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
Examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the drawings are illustrative only and should not be construed as limiting the invention.
The following disclosure provides many different embodiments, or examples, for implementing different features of the invention. To simplify the disclosure of the present invention, the components and arrangements of specific examples are described below. They are merely examples and are not intended to limit the present invention. Furthermore, the present invention may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. In addition, the present invention provides examples of various specific processes and materials, but one of ordinary skill in the art may recognize the applicability of other processes and/or the use of other materials. In addition, the structure of a first feature described below as "on" a second feature may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features are formed between the first and second features, such that the first and second features may not be in direct contact.
In the description of the present invention, it should be noted that, unless otherwise specified and limited, the terms "connected" and "connected" should be interpreted broadly, and may be, for example, mechanically or electrically connected, or may be connected between two elements, directly or indirectly through an intermediate medium, and specific meanings of the terms may be understood by those skilled in the relevant art according to specific situations.
In order to reduce energy consumption of the underwater acoustic communication transceiver when the underwater acoustic communication transceiver works underwater and enhance cruising ability of the underwater acoustic communication transceiver, the embodiment adopts an underwater acoustic communication delay-tolerant network system with a dormancy wakeup function, the underwater acoustic communication network system is composed of a plurality of communication nodes, each node comprises an underwater acoustic communication transceiver, and each transceiver comprises a transmitting unit, a receiving unit and a dormancy wakeup control unit, wherein the transmitting unit comprises a modulator, a digital-to-analog converter, a power amplifier and a transmitting acoustic array, the receiving unit comprises a receiving acoustic array, a weak signal amplifier, an analog-to-digital converter, a demodulator and a data analysis processor, and the dormancy wakeup unit comprises a signal amplifier and a dormancy wakeup controller.
The underwater acoustic communication transceiver of the underwater acoustic communication network system adopts a three-core processing chip, and has a three-core architecture: the FPGA (field programmable gate array kernel in the same figure), the ARM (embedded processor kernel in the same figure) and the MSP430 (single chip microcomputer in the same figure) reasonably divide the overall work according to the advantages of each processor core.
The FPGA is responsible for arithmetic operation, and realizes synchronization, coding and decoding, interleaving and de-interleaving, equalization and modulation and demodulation of signals. The signal synchronization mode adopts a linear frequency modulation signal, and the method has higher distance resolution and good robustness to Doppler interference; the coding and decoding adopt RS codes and are suitable for the condition that errors occur in a concentrated mode in underwater acoustic communication; the modulation and demodulation adopts an FSK mode, the modulation adopts a direct digital frequency synthesis method to generate carrier frequencies 21kHz and 23kHz corresponding to signals 0 and 1, and the receiving end adopts a two-way envelope detection mode to demodulate.
The ARM is responsible for network protocols and peripheral control, the MAC layer adopts a Time Division Multiple Access (TDMA) protocol, the network layer adopts a static routing table and a Bundle protocol, the TDMA protocol can effectively avoid the problem of collision retransmission, the Bundle mechanism has a capacity delay and capacity break function, a piece of data can be temporarily stored in the network under the condition that a communication link is unreliable, and the data is sent again when the link is reconnected so as to avoid retransmission; the ARM control peripheral comprises an RTC real-time clock, an RS232 serial port communication unit and an RS485 serial port communication unit.
The MSP430 is responsible for sleep wake-up control, when the MSP430 detects a wake-up pilot signal, the relay is controlled to be closed to supply power to the ARM, the FPGA and other circuits, when the system is in an idle state, the ARM sends a sleep instruction to the MSP430, and the MSP430 controls the relay to be opened to stop the power supply of the ARM, the FPGA and other circuits and enable the MSP to enter a low power consumption state.
Fig. 1 is an application scenario diagram of this embodiment, where a plurality of nodes are dispersed in an underwater environment, when a task arrives, any common node initiating the task may be used as a head node to establish a local area network topology relationship in a self-organizing manner, and each network node basically constitutes an underwater acoustic communication transceiver.
Fig. 2 is a block diagram of a conventional underwater acoustic communication transceiver, which does not have a sleep wake-up function, and still has a large power consumption when a node is in an idle state.
Fig. 3 is a schematic block diagram of the underwater acoustic communication transceiver according to this embodiment, in which a hardware circuit structure employs a three-core processing chip, the FPGA is responsible for arithmetic operations, the ARM is responsible for network protocol implementation and peripheral control, and the MSP430 is responsible for sleep wake-up control. In the embodiment, the MSP430 controls the relay to be opened and closed, and indirectly controls the weak signal receiving circuit, the digital circuit formed by the FPGA and the ARM and the power supply of part of the power amplifier circuit.
The structure of the receiving and transmitting circuit shown in fig. 3 works as follows, when receiving signals, after being received by the signal receiving acoustic array, the underwater acoustic communication signals sequentially pass through the differential-to-single-ended amplifier, the first preamplifier, the primary band-pass filter, the program-controlled amplifier, the secondary band-pass filter, the first voltage follower, the first isolation audio transformer, the analog-to-digital conversion driving circuit and the analog-to-digital converter, signals acquired by the analog-to-digital converter are sent to the FPGA for demodulation, and finally, demodulated data are transmitted to the ARM for data analysis; when a signal is sent, the ARM transmits an instruction and data to the FPGA, the FPGA controls the digital-to-analog converter to send corresponding data according to the instruction, the sent signal is a sine signal, the sine signal sequentially passes through the second voltage follower and the second isolation audio transformer and then is compared with triangular waves to generate an SPWM signal, the SPWM signal is adjusted through a dead zone of the gate-level driving circuit and controls the H-bridge power amplifier circuit, and finally the signal is transmitted to the signal sending acoustic array through the impedance matching circuit at the maximum power to convert electric energy into acoustic energy.
Fig. 4 is a full-bridge power amplifier topology circuit of the present embodiment, and it can be seen from the full-bridge topology that if Q1, Q3, or Q2, Q4 are turned on simultaneously, the power supply will be short-circuited, and the power transistor will be damaged. In order to avoid the situation, the conduction time of each power tube is not more than 90% of the half period, that is, the driving signal of the power tube is redesigned, a dead time is added between the conduction time of the power tube and the conduction time of the power tube, and the situation that the two power tubes cannot have the direct connection hidden trouble is ensured. When the circuit output is 25kHz, the conduction time of each power tube in one period is required to be as follows:
the dead time is:
td＝2μs
the dead time may be implemented by a delay circuit and a gate circuit.
Fig. 5 is a block diagram of a gate driver circuit of the power amplifier according to the present embodiment. Firstly, PWM obtained by comparing sine waves and triangular waves is used as a control signal 1, a control signal 2 is generated after 0.05T of delay through a two-stage RC integrating circuit and a Schmitt reverse trigger, and the control signal 1 and the control signal 2 are input into an AND gate to obtain a driving signal 1. The control signal 1 and the control signal 2 are input into an or gate, and then are inverted to obtain a driving signal 2, and in addition, the MSP430 generates a control signal to control whether the driving signal 1 and the driving signal 2 work or not through the and gate.
Fig. 6 is a block diagram of the sleep wake-up circuit according to the present embodiment. The received signal firstly passes through a third isolation audio transformer, then sequentially passes through a cascade structure of a two-stage amplifier and a band-pass filter, and then is transmitted to the MSP430 by an analog-to-digital converter. When the node is in a dormant state, if the MSP430 detects a wake-up signal, the relay is controlled to be closed, and the 24V battery pack direct current is sent into the system; when the node is in a working state, if the node needs to be switched into a dormant state, the ARM generates a command signal to inform the MSP430, and the MSP430 generates a control signal to disconnect the relay and stop supplying power to parts of the system except the MSP 430.
Fig. 7 is a schematic block diagram of an isolation structure of an underwater acoustic communication transceiver according to this embodiment. In order to reduce crosstalk among all parts of the circuit, the circuit is divided into 4 parts, namely a weak signal receiving circuit, a signal acquisition processing circuit, a power amplification circuit and a dormancy awakening control circuit, analog signals among all circuit modules are isolated by adopting an isolation audio transformer, and in addition, according to a mode of combining an isolation stabilized voltage power supply and a linear stabilized voltage power supply in a mode of illustration, power isolation among all the circuits is ensured, power noise is reduced, and meanwhile, the use efficiency of the power supply is improved as much as possible.
Fig. 8 is a schematic diagram of an internal functional module of the FPGA of this embodiment. Fig. 8 shows functional modules inside the FPGA and their connections. The transmitting process comprises UART data receiving, ARM instruction analysis, RS encoding, interleaving and FSK modulation; the receiving process comprises signal synchronization, double-path envelope detection, decision feedback equalization, de-interleaving, RS decoding and UART data transmission; in addition, the FPGA also realizes the drive control of analog-to-digital conversion and digital-to-analog conversion and the gain control of a program control gain amplifier in a weak signal receiving circuit.
Fig. 9 is a schematic diagram illustrating an ARM internal network protocol structure according to this embodiment. For the characteristics that the propagation delay of an underwater network is long and a communication link is difficult to maintain for a long time, in the embodiment, a Bundle mechanism suitable for a Delay Tolerant Network (DTN) is added in a network layer, so that a piece of data can be temporarily stored in the network under the condition that the communication link is unreliable, and the data is sent again when the link is waited to be reconnected, so as to avoid retransmission. In order to avoid the collision retransmission problem, a Time Division Multiple Access (TDMA) protocol is adopted as the MAC layer protocol. Before the underwater acoustic network communication node enters a normal operation state, each node must carry out time synchronization and appoint own MAC time slot, and after normal operation, the node can only transmit in the time slot of the node when transmitting.
Fig. 10 and 11 are a network layer transmission flowchart and a reception flowchart of the present embodiment, respectively. The network layer mainly comprises a routing layer and a Bundle layer, wherein the routing layer is mainly responsible for forwarding data packets and is realized by adopting a static routing table, the whole system can establish the static routing table in an initialization stage and then regularly update the routing table; the Bundle layer is responsible for keeping and confirming data, and stores the data packets in a file form, so that the data packets are prevented from being lost in the retransmission or forwarding process.
In the sending process, as shown in fig. 10, it is first queried whether the application layer sending queue is empty, then the head data packet is taken out to perform Bundle and routing layer encapsulation, then the Bundle packet is stored in a Bundle archive file, then the routing table is queried to obtain the MAC address of the next hop node, and then the address and the data packet are inserted into the network layer sending queue to wait for the MAC layer to process. When the data packet is inserted into a network layer, a timer thread is started, the thread is destroyed when a reply of a receiving node is received before the timing time is up, otherwise, the data is extracted from the Bundle storage file according to the maximum retransmission times, and the routing table is inquired again for sending, if the maximum retransmission times are exceeded, the data packet cannot reach the receiving node, so that the data packet can be deleted from the Bundle file, and an application layer data sending failure is notified.
In the receiving process, as shown in fig. 11, after receiving the data packet of the MAC layer, the routing layer decapsulates first, and then determines whether to forward according to whether the destination IP address in the packet is its own IP address or broadcast address, and if not, forwards, decapsulates the Bundle layer, replies a custody file data packet to the sending node, and inserts the data into the application layer sending queue. If so, unpacking the Bundle layer, and simultaneously replying a data packet of the safekeeping file to the sending node to indicate that the data packet is taken over by the current node and the sending node is not responsible for safekeeping any more; if the destination IP address of the packet received by the node is the IP address or the broadcast address of the node, judging whether the packet is a storage file data packet or a pure data packet, if the packet is the storage file data packet, deleting the corresponding Bundle record from the Bundle storage file, and sending a message to inform a retransmission timer thread of finishing the work, so that timed retransmission is not needed any more, if the packet is the pure data packet, replying a storage file data packet to the sending node, inquiring whether a corresponding receiving queue exists in the current receiving queue group according to a port number in the data packet, if the receiving queue exists, sending the receiving queue to the corresponding receiving queue, otherwise, creating the corresponding receiving thread for processing.
It should be understood that parts of the specification not set forth in detail are well within the prior art.
Although specific embodiments of the present invention have been described above with reference to the accompanying drawings, it will be appreciated by those skilled in the art that these are merely illustrative and that various changes or modifications may be made to these embodiments without departing from the principles and spirit of the invention. The scope of the invention is only limited by the appended claims.
Claims (4)
1. An underwater acoustic communication capacity delay and interruption network system with a dormancy awakening function comprises a plurality of communication nodes, wherein each node comprises an underwater acoustic communication transceiver; the underwater acoustic communication transceiver is characterized by comprising a signal receiving acoustic array, a signal transmitting acoustic array, a battery module, a weak signal receiving circuit, a signal acquisition processing circuit, a power amplification circuit and a dormancy awakening control circuit; the battery module is respectively connected with the weak signal receiving circuit, the signal acquisition processing circuit, the power amplification circuit and the dormancy awakening control circuit; the signal receiving acoustic array is respectively connected with the weak signal receiving circuit and the dormancy awakening control circuit; the weak signal receiving circuit is connected with the signal acquisition processing circuit, and the signal acquisition processing circuit is connected with the power amplification circuit; the power amplification circuit is connected with the signal transmitting acoustic array; the signal acquisition processing circuit is respectively connected with the dormancy awakening control circuit and the upper computer;
the weak signal receiving circuit comprises a differential-to-single-ended amplifier, a first preamplifier, a primary band-pass filter, a program-controlled amplifier, a secondary band-pass filter, a first voltage follower and a first isolation audio transformer which are connected in sequence; the differential-to-single-ended amplifier is connected with the signal receiving acoustic array;
the signal acquisition processing circuit comprises an FPGA, an ARM connected with the FPGA, an analog-to-digital converter, a digital-to-analog converter, an analog-to-digital conversion driving circuit connected with the analog-to-digital converter and a second voltage follower connected with the digital-to-analog converter; the ARM is connected with a water lamp, an RTC real-time clock, an RS232 serial port communication unit, a reset circuit, a storage circuit and an RS485 serial port communication unit; the analog-to-digital conversion driving circuit is connected with the first isolation audio transformer, the second voltage follower is connected with the power amplifying circuit, the RS485 serial port communication is connected with the upper computer, and the ARM is connected with the dormancy awakening control circuit;
the power amplification circuit comprises a second isolation audio transformer, a comparator, a driving circuit, a full-bridge power amplification circuit and an impedance matching circuit which are connected in sequence, wherein the comparator is connected with a triangular wave generator and the second isolation audio transformer; the second isolation audio transformer is connected with the signal acquisition processing circuit; the impedance matching circuit is connected with the signal transmitting acoustic array;
the dormancy awakening control circuit comprises a third isolation audio transformer, a second preamplifier, an MSP430 and a relay which are sequentially connected; the relay is connected with the battery module, the third isolation audio transformer is connected with the signal receiving acoustic array, and the MSP430 is connected with the signal acquisition processing circuit; when the node is in a dormant state, if the MSP430 detects a wake-up signal, the relay is controlled to be closed, and the direct current of the battery pack is sent to the system; when the node is in a working state, if the node needs to be switched into a dormant state, an ARM generates an instruction signal to inform the MSP430, the MSP430 generates a control signal to disconnect a relay, and power supply to systems except the MSP430 is stopped;
the battery module comprises a 24V battery pack, a relay connected with the 24V battery pack, a second 24V-to-5V isolation stabilized voltage power supply connected through an isolation structure, a system 24V direct current at the output end of the relay is respectively connected with a 24V-to-15V isolation stabilized voltage power supply and a first 24V-to-5V isolation stabilized voltage power supply through the isolation structure, the first 24V-to-5V isolation stabilized voltage power supply is respectively connected with a 5V-to-positive/negative 5V isolation stabilized voltage power supply and a 5V-to-5V isolation stabilized voltage power supply through the isolation structure, the first 24V-to-5V isolation stabilized voltage power supply is connected with a 5V-to-3.3V linear stabilized voltage power supply, the 5V-to-2.5V linear stabilized voltage power supply is connected with a 5V-to-positive/negative 5V isolation stabilized voltage power supply, and the second 24V-to; the 24V-to-15V isolation stabilized voltage power supply and the 5V-to-5V isolation stabilized voltage power supply are connected with a power amplification circuit; the linear stabilized voltage power supply for converting positive and negative 5V into positive and negative 3.3V is connected with a weak signal receiving circuit; the 5V to 3.3V linear stabilized voltage power supply is connected with the signal acquisition processing circuit; the 5V to 3.3V linear stabilized voltage power supply is connected with the dormancy awakening control circuit.
2. The underwater acoustic communication delay-tolerant network system with the sleep-wakeup function as claimed in claim 1, wherein the FPGA sending process comprises UART data receiving, ARM instruction parsing, RS encoding, interleaving, FSK modulation; the receiving process comprises signal synchronization, double-path envelope detection, decision feedback equalization, de-interleaving, RS decoding and UART data transmission; the FPGA is also used for driving control of analog-to-digital conversion and digital-to-analog conversion and gain control of a program-controlled amplifier in a weak signal receiving circuit.
3. The underwater acoustic communication delay-and-break network system with sleep and wake-up functions as claimed in claim 1, wherein the ARM internal network protocol structure includes a Bundle mechanism in the network layer for temporarily keeping a copy of data in the network when the communication link is unreliable, and for retransmitting the data when the link is reconnected to avoid retransmission; adopting a TDMA protocol as an MAC layer protocol; the network layer comprises an application layer, a Bundle layer, a routing layer and a media access layer; the routing layer is used for forwarding the data packet and is realized by adopting a static routing table; the Bundle layer is used for data storage and confirmation, and stores data packets in the form of files.
4. The method for controlling the delay and interruption of the underwater acoustic communication delay and interruption tolerant network system with the sleep and wake-up function as claimed in any one of claims 1 to 3, characterized by comprising the following steps:
s1, in an initialization stage, the whole system establishes a static routing table, and then the routing table is updated periodically;
s2, keeping and confirming data through a Bundle layer, and storing a data packet in a file form;
s3, a sending process:
firstly, inquiring whether an application layer sending queue is empty or not, and if the application layer sending queue is empty, destroying a thread; otherwise, taking out the head of the queue data packet to package the Bundle and the routing layer, storing the Bundle packet into a Bundle storage file, inquiring a routing table to obtain the MAC address of the next hop node, and inserting the address and the data packet into a network layer sending queue to wait for the MAC layer to process;
meanwhile, starting a timer thread, and destroying the thread when receiving the reply of the receiving node before the timing time comes; otherwise, extracting the data from the Bundle storage file according to the maximum retransmission times, inquiring the routing table again for sending, if the maximum retransmission times is exceeded, deleting the data from the Bundle file, and notifying an application layer that the data sending fails;
s3, a receiving process:
after receiving the data packet of the MAC layer, firstly, carrying out routing layer decapsulation;
determining whether to forward according to whether the destination IP address in the packet is the IP address of the packet or the broadcast address of the packet, if not, forwarding, decapsulating the Bundle layer, replying a custody file data packet to a sending node, and inserting the data into an application layer sending queue;
if so, performing Bundle layer decapsulation, and simultaneously replying a custody file data packet to the sending node;
if the destination IP address of the packet received by the node is the own IP address or broadcast address, judging whether to keep the file data packet or a simple data packet;
if the data packet is the safekeeping file data packet, deleting the corresponding Bundle record from the Bundle safekeeping file, sending a message to inform a retransmission timer, and stopping the regular retransmission of the thread;
if the data packet is a pure data packet, replying a data packet for keeping files to a sending node, inquiring whether a corresponding receiving queue exists in the current receiving queue group or not according to the port number in the data packet, if so, sending the data packet to the corresponding receiving queue, and otherwise, establishing a corresponding receiving thread for processing.
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| CN111190365B (en) * | 2019-12-31 | 2021-04-06 | 中国海洋石油集团有限公司 | Two-stage wake-up circuit for underwater acoustic communication and wake-up method thereof |
| CN112291794B (en) * | 2020-09-18 | 2021-08-27 | 中国人民解放军军事科学院国防科技创新研究院 | Underwater sound wireless networking method and device based on DTN architecture |
| CN112202740A (en) * | 2020-09-21 | 2021-01-08 | 上海微波技术研究所（中国电子科技集团公司第五十研究所） | FPGA-based awakenable UDP transmission protocol implementation method and system |
| CN116634521B (en) * | 2023-07-20 | 2023-11-10 | 天津七一二通信广播股份有限公司 | Cross-layer protocol architecture integrating MAC layer and routing layer and implementation method |
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