CN107846272B - Device and method for rapidly generating Golden sequence - Google Patents

Device and method for rapidly generating Golden sequence Download PDF

Info

Publication number
CN107846272B
CN107846272B CN201711146923.8A CN201711146923A CN107846272B CN 107846272 B CN107846272 B CN 107846272B CN 201711146923 A CN201711146923 A CN 201711146923A CN 107846272 B CN107846272 B CN 107846272B
Authority
CN
China
Prior art keywords
register
lfsr
sequence
data
model
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201711146923.8A
Other languages
Chinese (zh)
Other versions
CN107846272A (en
Inventor
陈庆禄
刘坤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Dongguan Ampertronics Automation Technology Co ltd
Original Assignee
Dongguan Ampertronics Automation Technology Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Dongguan Ampertronics Automation Technology Co ltd filed Critical Dongguan Ampertronics Automation Technology Co ltd
Priority to CN201711146923.8A priority Critical patent/CN107846272B/en
Publication of CN107846272A publication Critical patent/CN107846272A/en
Application granted granted Critical
Publication of CN107846272B publication Critical patent/CN107846272B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0202—Channel estimation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H04L27/2601—Multicarrier modulation systems
    • H04L27/2602—Signal structure
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H04L27/2601—Multicarrier modulation systems
    • H04L27/2602—Signal structure
    • H04L27/261—Details of reference signals
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00—Arrangements affording multiple use of the transmission path
    • H04L5/003—Arrangements for allocating sub-channels of the transmission path
    • H04L5/0048—Allocation of pilot signals, i.e. of signals known to the receiver

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Power Engineering (AREA)
  • Mobile Radio Communication Systems (AREA)
  • Error Detection And Correction (AREA)

Abstract

The invention relates to the technical field of communication algorithms, and discloses a device and a method for quickly generating a Golden sequence, which comprises the following steps: generating an m-sequence LFSR model; mapping the register state S (n) of the m-sequence LFSR model to a Galois field, namely f (S (n)); calculating the Golden sequence S (n + Nc) ═ f‑1(f(S(n))*λNc). The invention improves the rapid generation algorithm of Golden sequence, is used for generating the reference signal of the wireless communication system, and the reference signal carries out channel estimation and demodulation at the receiving end to realize the recovery of the original unknown signal, which is used as the necessary link in the wireless communication system and the rapid generation of the reference signal; meanwhile, the calculation amount is reduced, the cost of the terminal is reduced, the energy consumption is low, and the method is particularly applied to application scenes of the Internet of things based on NB-IoT, LTE-M and the like with high requirements on energy consumption and cost.

Description

Device and method for rapidly generating Golden sequence
Technical Field
The invention relates to the technical field of communication algorithms, in particular to a device and a method for quickly generating a Golden sequence.
Background
The randomness and orthogonal information of Golden sequences are used for generating a pilot sequence in a communication system to realize channel estimation based on an interpolation model. However, the existing method requires a large amount of recursion for direct calculation, which is low in efficiency and needs a large amount of processing resources due to the traditional loop nesting.
Disclosure of Invention
Aiming at the defects of low efficiency and high cost in the prior art, the invention provides a device and a method for quickly generating a Golden sequence.
In order to solve the above technical problems, the present invention is solved by the following technical solutions.
A method for fast generation of Golden sequences, comprising:
generating an m-sequence LFSR model;
mapping the register state S (n) of the m-sequence LFSR model to a Galois field, namely f (S (n));
calculating the Golden sequence S (n + Nc) ═ f-1(f(S(n))*λNc)，
Wherein: nc is a known initial value, Nc is 1600, n is a random natural number, and λ is a primitive.
Preferably, the step of generating the m-sequence LFSR model comprises: the Golden sequence generation model can be equivalent to the superposition of LFSR models of 2 m sequences shown in the following figure, each group of m sequences is composed of 30 shift registers and a modulo-2 adder, and the generation algorithm of the corresponding Golden sequence is as follows:
X1(n+31)＝X1(n)⊕X1(n+3)；
X2(n+31)＝X2(n)⊕X2(n+1)⊕X2(n+2)⊕X2(n+3)；
C(n)＝X1(n+Nc)⊕X2(n+Nc)；
wherein, Nc and X1、X2Is a known initial value, Nc 1600, X1The initial state is 0X40000000, X2Initial state is formed by CinitGiving out CinitIs a random natural number, n is a random natural number, and C (n) is an output Golden sequence.
Preferably, the step of mapping the register state s (n) of the m-sequence LFSR model to a galois field, i.e. f (s (n));
generating an LFSR model of the Galois field;
for register cyclic shift in LFSR model: XOR the data of the last second register and the last third register into the last register; XOR-adding the data of the last third register into the last second register to obtain a mapping from the register state S (n) of the m-sequence LFSR to the Galois field, and recording the mapping as f (S (n)), so that f (S (n) ═ lambda ^ lambdat+n。
An apparatus for fast generation of Golden sequences, comprising:
the LFSR model generation module is used for generating an m-sequence LFSR model;
a galois field mapping module for mapping the register state s (n) of the m-sequence LFSR model to a galois field, f (s (n));
a Golden sequence calculating module for calculating the Golden sequence S (n + Nc) ═ f-1(f(S(n))*λNc)。
Preferably, the galois field mapping module includes:
the Galois field LFSR model generating module is used for generating an LFSR model of a Galois field;
a cyclic shift module for cyclically shifting registers in the LFSR model: XOR the data of the last second register and the last third register into the last register; XOR-adding the data of the last third register into the last second register to obtain a mapping from the register state S (n) of the m-sequence LFSR to the Galois field, and recording the mapping as f (S (n)), so that f (S (n) ═ lambda ^ lambdat+n。
A readable storage medium for storing a software program, the program file for performing the above method.
Due to the adoption of the technical scheme, the invention has the remarkable technical effects that: the invention improves the rapid generation algorithm of Golden sequence, is used for generating the reference signal of the wireless communication system, and the reference signal carries out channel estimation and demodulation at the receiving end to realize the recovery of the original unknown signal, which is used as the necessary link in the wireless communication system and the rapid generation of the reference signal; meanwhile, the calculation amount is reduced, the cost of the terminal is reduced, the energy consumption is low, and the method is particularly applied to application scenes of the Internet of things based on NB-IoT, LTE-M and the like with high requirements on energy consumption and cost.
Drawings
FIG. 1 is a flowchart illustrating the operation of a method for rapid Golden sequence generation according to the present invention;
FIG. 2 is a schematic diagram of a solution to a rounding polynomial in the primitive polynomial equation of the present invention;
FIG. 3 is a schematic diagram of an apparatus for rapidly generating Golden sequences according to the present invention;
FIG. 4 is a schematic diagram of a solution to a rounding polynomial in the primitive polynomial equation of the present invention;
FIG. 5Is GF (2) in the present invention31) A schematic diagram of an LFSR model generated by the domain elements of (a);
FIG. 6 is a schematic diagram of a register cyclic shift according to the present invention;
FIG. 7 is a second schematic diagram of the register cycle shift according to the present invention;
FIG. 8 is a third schematic diagram of the register cycle shift of the present invention;
FIG. 9 is a fourth schematic diagram of the register cycle shift according to the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples.
Example 1
As shown in fig. 1 to 9, a method for rapidly generating a Golden sequence includes:
generating an m-sequence LFSR model;
mapping the register state S (n) of the m-sequence LFSR model to a Galois field, namely f (S (n));
calculating the Golden sequence S (n + Nc) ═ f-1(f(S(n))*λNc)，
Wherein: nc is a known initial value, Nc is 1600, n is a random natural number, and λ is a primitive.
The step of generating the m-sequence LFSR model comprises the following steps: the Golden sequence generation model can be equivalent to the superposition of LFSR models of 2 m sequences shown in the following figure, each group of m sequences is composed of 30 shift registers and a modulo-2 adder, and the generation algorithm of the corresponding Golden sequence is as follows:
X1(n+31)＝X1(n)⊕X1(n+3)；
X2(n+31)＝X2(n)⊕X2(n+1)⊕X2(n+2)⊕X2(n+3)；
C(n)＝X1(n+Nc)⊕X2(n+Nc)；
wherein, Nc and X1、X2Is a known initial value, Nc 1600, X1The initial state is 0X40000000, X2Initial state is formed by CinitGiving out CinitIs a random natural number, n is a random natural number, C (n) is outputGolden sequence.
Mapping the register state S (n) of the m-sequence LFSR model to a Galois field, namely f (S (n));
generating an LFSR model of the Galois field;
for register cyclic shift in LFSR model: XOR the data of the last second register and the last third register into the last register; XOR-adding the data of the last third register into the last second register to obtain a mapping from the register state S (n) of the m-sequence LFSR to the Galois field, and recording the mapping as f (S (n)), so that f (S (n) ═ lambda ^ lambdat+n。
An apparatus for fast generation of Golden sequences, comprising:
the LFSR model generation module is used for generating an m-sequence LFSR model;
a galois field mapping module for mapping the register state s (n) of the m-sequence LFSR model to a galois field, f (s (n));
a Golden sequence calculating module for calculating the Golden sequence S (n + Nc) ═ f-1(f(S(n))*λNc)。
Preferably, the galois field mapping module includes:
the Galois field LFSR model generating module is used for generating an LFSR model of a Galois field;
a cyclic shift module for cyclically shifting registers in the LFSR model: XOR the data of the last second register and the last third register into the last register; XOR-adding the data of the last third register into the last second register to obtain a mapping from the register state S (n) of the m-sequence LFSR to the Galois field, and recording the mapping as f (S (n)), so that f (S (n) ═ lambda ^ lambdat+n。
GF (λ m) denotes a galois field containing λ m elements, which is a beigal group of finite elements.
In the galois field, the other field elements, except the 0 element, are determined by the primitive element λ and the primitive polynomial p (x) as follows:
Xp-1＝0，p＝λm-1 ═ 15 (where λ ═ 2, m ═ 4);
the left side of the equation is a cyclotomic polynomial, and in the complex domain, the solution of the observation equation is shown in FIG. 2 when x1∈P＝{ej2πk/15|0<k<15, and k is co-prime with 15, the set of solutions to the equation can be expressed as { x { n }1 1，x1 2，x1 3，…，x1 141, this is a λmA cyclic group of order 1.
I.e. for any element in the set P (here necessarily 8 elements), its integer power can traverse the λ of the equationm-1 solution.
Under GF (2)m) To x 151 factorization, impossible to root like infinite domain, it can prove that the end result must be:
x1 5-1＝x1 5+1＝(x+1)…(x4+x3+1)(x4+x+1)；
that is, a series of irreducible polynomials (i.e., about polynomials) are obtained, where the polynomials with the highest order m are xp-1 at GF (2)m) The primitive polynomial of (a). Such as polynomial x15-1 has two primitive polynomials:
P(x)＝x4+x3+1 and p (x) x4+x+1；
It can be shown that there is a one-to-one correspondence between the solutions of the equations in the finite field and the solutions of the equations in the infinite field, and the operational relationship between the elements remains unchanged (both groups are isomorphic). The elements in the set P also correspond to the solutions of the primitive polynomial P (x) 0 one to one. That is, when λ satisfies x4+ x +1 ═ 0 or x4+x3+ 1-0, all powers of λ necessarily traverse GF (2)4) All of 2 in4-1 element.
Such as lambda4+ λ +1 ═ 0, i.e. λ4λ + 1. If GF (2) is formed thereby4) All non-0 elements of (a):
λ1＝0h0010，λ2＝0h0100，λ3＝0h1000，
λ4＝λ+1＝0h0011，λ5＝λ2+λ＝0h0110，λ6＝λ3+λ2＝0h1100，
λ7＝λ4+λ3＝0h1011，λ8＝λ5+λ4＝0h0101，λ9＝λ6+λ5＝0h1010，
λ10＝λ7+λ6＝0h0111，λ11＝λ8+λ7＝0h1110，λ12＝λ9+λ8＝0h1111，
λ13＝λ10+λ9＝0h0111，λ14＝λ11+λ10＝0h1001，λ15＝λ12+λ11＝0h0001＝λ0；
given λ ═ 2, the primitive polynomial: p (x) x3+x+1；
One GF (2) is obtained3) The field elements are shown in the following table:
TABLE 1GF (2)3) Of (1), p (x) x3+x+1
Figure GDA0002967651880000061
GF(λm) In (1), addition is defined as bitwise modulo λ addition, subtraction is defined as bitwise modulo λ subtraction, multiplication by non-0 elements is defined as λa*λb＝λ(a+b)。
For λ ═ 2, the addition and subtraction are the same, i.e., bitwise exclusive-or.
From the multiplication definition and the definition of the primitive polynomial, GF (lambda) can be generated by using the LFSR modelm) Non-0 field element in (1). For example, FIG. 3 shows 2 GF (2)31) The domain element in (1) generates a model.
With X2(n+31)＝X2(n)⊕X2(n+1)⊕X2(n+2)⊕X2(n +3) is an example to illustrate:
1) mixing X2If 31 registers in the LFSR are circularly shifted, the LFSR model shown in fig. 6 can be obtained;
2) the data from register 29 is xor-ed into register 30 to obtain the equivalent LFSR model as shown in fig. 7;
3) XOR the data from register 28 into register 30, the equivalent LFSR can be obtained as shown in FIG. 8;
4) the data from register 28 is xor' ed into register 29 to obtain the equivalent LFSR as shown in fig. 9.
As can be seen, after the above logic operations, the LFSR of the X2 sequence is converted into the corresponding GF (2)31) The LFSR of (1). That is, the operation is equivalent to a mapping of the register state S (n) of the m-sequence LFSR to the Galois field, denoted as f (S (n)), then
f(S(n))＝λt+n；
Where λ t is the corresponding GF (2)31) A certain field element.
If its inverse mapping exists, it is denoted as f-1(G) Then, then
f-1(λt+n)＝S(n)；
Thus, S (n + Nc) ═ f-1(λt+n+Nc)＝f-1(λt+n*λNc)＝f-1(f(S(n))*λNc)；
The above equation indicates that S (n + Nc) only needs to map the current state S (n) to the corresponding galois field, then perform a galois field multiplication, and then map the result back.
The embodiment of the invention avoids the technical problem of low efficiency and large consumption of processing resources due to the traditional Golden sequence methods such as loop nesting, recursion and the like, and the Golden sequence is generated efficiently and at low cost. The generated Golden sequence is used for generating a reference signal of a wireless communication system, the reference signal is subjected to channel estimation and demodulation at a receiving end to realize the recovery of an original unknown signal, and the Golden sequence is used as a necessary link in the wireless communication system to quickly generate the reference signal; meanwhile, the calculation amount is reduced, the cost of the terminal is reduced, the energy consumption is low, and the method is particularly applied to application scenes of the Internet of things based on NB-IoT, LTE-M and the like with high requirements on energy consumption and cost.
In the present embodiment, the above method may be stored as a program in a storage medium, which may include but is not limited to: a U-disk, a Read-only memory (ROM), a Random Access Memory (RAM), a removable hard disk, a magnetic or optical disk, and other various media capable of storing program codes.
For specific examples in this embodiment, reference may be made to the examples described in the above embodiments and optional implementation manners, and details of this embodiment are not described herein again.
It will be apparent to those skilled in the art that the modules or steps of the present invention described above may be implemented by a general purpose computing device, they may be centralized on a single computing device or distributed across a network of multiple computing devices, and alternatively, they may be implemented by program code executable by a computing device, such that they may be stored in a storage device and executed by a computing device, and in some cases, the steps shown or described may be performed in an order different than that described herein, or they may be separately fabricated into individual integrated circuit modules, or multiple ones of them may be fabricated into a single integrated circuit module. Thus, the present invention is not limited to any specific combination of hardware and software.
In summary, the above-mentioned embodiments are only preferred embodiments of the present invention, and all equivalent changes and modifications made in the claims of the present invention should be covered by the claims of the present invention.

Claims (3)

1. A method for rapidly generating a Golden sequence is characterized by comprising the following steps: the method comprises the following steps:
generating an m-sequence LFSR model;
mapping the register state S (n) of the m-sequence LFSR model to a Galois field, namely f (S (n));
computing Golden sequence S (n + Nc) = f-1（f（S（n））*λNc），
Wherein: nc is a known initial value, Nc =1600, n is a random natural number, and λ is a primitive element; mapping the register state S (n) of the m-sequence LFSR model to a Galois field, namely f (S (n));
generating an LFSR model of the Galois field;
for register cyclic shift in LFSR model: carrying out XOR on the data of the penultimate register and the data of the last register, and storing the XOR data into the last register; carrying out exclusive OR on the data of the third last calculator and the data of the last register, and storing the data after exclusive OR into the last register; carrying out exclusive OR on the data of the penultimate register and the data of the penultimate register, and storing the data after exclusive OR in the penultimate register; obtaining a mapping from the register state S (n) of the m-sequence LFSR to the Galois field, and recording the mapping as f (S (n)) = λt+n。
2. An apparatus for fast generation of Golden sequence, characterized by: the method comprises the following steps:
the LFSR model generation module is used for generating an m-sequence LFSR model;
a galois field mapping module for mapping the register state s (n) of the m-sequence LFSR model to a galois field, f (s (n));
a Golden sequence calculating module for calculating a Golden sequence S (n + Nc) = f-1（f（S（n））*λNc) Wherein: nc is a known initial value, Nc =1600, n is a random natural number, and λ is a primitive element;
the Galois field LFSR model generating module is used for generating an LFSR model of a Galois field;
a cyclic shift module for cyclically shifting registers in the LFSR model: carrying out XOR on the data of the penultimate register and the data of the last register, and storing the XOR data into the last register; carrying out exclusive OR on the data of the third last calculator and the data of the last register, and storing the data after exclusive OR into the last register; carrying out exclusive OR on the data of the penultimate register and the data of the penultimate register, and storing the data after exclusive OR in the penultimate register; obtaining a mapping of the register state S (n) of the m-sequence LFSR to the Galois fieldIf f (S) (n) = λ (S (n))t+n。
3. A readable storage medium, characterized by: the readable storage medium is for storing a software program, the program file for performing the method of claim 1.
CN201711146923.8A 2017-11-17 2017-11-17 Device and method for rapidly generating Golden sequence Active CN107846272B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201711146923.8A CN107846272B (en) 2017-11-17 2017-11-17 Device and method for rapidly generating Golden sequence

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201711146923.8A CN107846272B (en) 2017-11-17 2017-11-17 Device and method for rapidly generating Golden sequence

Publications (2)

Publication Number Publication Date
CN107846272A CN107846272A (en) 2018-03-27
CN107846272B true CN107846272B (en) 2021-05-25

Family

ID=61679802

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201711146923.8A Active CN107846272B (en) 2017-11-17 2017-11-17 Device and method for rapidly generating Golden sequence

Country Status (1)

Country Link
CN (1) CN107846272B (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102227888A (en) * 2008-12-02 2011-10-26 株式会社泛泰 Method and apparatus for generating pseudo random sequence in broadband wireless communication system
CN102282790A (en) * 2009-01-20 2011-12-14 株式会社泛泰 Apparatus and method for generating scrambling codes in a radio communication system
CN102520908A (en) * 2011-12-20 2012-06-27 大唐微电子技术有限公司 Pseudo-random number generator and pseudo-random number generating method
CN102891726A (en) * 2012-09-10 2013-01-23 华为技术有限公司 Method for generating Gold sequence and chip
CN103020018A (en) * 2012-12-27 2013-04-03 南京师范大学 Construction method of compressive sensing matrix based on multi-dimensional pseudo-random sequence

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070088997A1 (en) * 2005-09-26 2007-04-19 Peter Lablans Generation and self-synchronizing detection of sequences using addressable memories
FR3002388B1 (en) * 2013-02-20 2015-04-10 Commissariat Energie Atomique METHOD FOR ACQUIRING A GPS SIGNAL BY ITERATIVE DECODING

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102227888A (en) * 2008-12-02 2011-10-26 株式会社泛泰 Method and apparatus for generating pseudo random sequence in broadband wireless communication system
CN102282790A (en) * 2009-01-20 2011-12-14 株式会社泛泰 Apparatus and method for generating scrambling codes in a radio communication system
CN102520908A (en) * 2011-12-20 2012-06-27 大唐微电子技术有限公司 Pseudo-random number generator and pseudo-random number generating method
CN102891726A (en) * 2012-09-10 2013-01-23 华为技术有限公司 Method for generating Gold sequence and chip
CN103020018A (en) * 2012-12-27 2013-04-03 南京师范大学 Construction method of compressive sensing matrix based on multi-dimensional pseudo-random sequence

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
"基于FPGA的多路伪随机序列发生器的设计与实现";王兵;《广东通信技术》;20150811(第6期);第49-51页 *

Also Published As

Publication number Publication date
CN107846272A (en) 2018-03-27

Similar Documents

Publication Publication Date Title
JP4559505B2 (en) Extending the repetition period of random sequences
CA2633858C (en) Mixed radix conversion with a priori defined statistical artifacts
Hou et al. BASIC codes: Low-complexity regenerating codes for distributed storage systems
Goresky et al. Fibonacci and Galois representations of feedback-with-carry shift registers
JP4866389B2 (en) Closed Galois field combination
Lin et al. Novel polynomial basis with fast Fourier transform and its application to Reed–Solomon erasure codes
GB2549981A (en) A public key cryptosystem based on the partitioning of elements of vectors
JP2005512183A (en) Galois field multiplication system
Angelopoulos et al. Energy-aware hardware implementation of network coding
Ghosh et al. A speed area optimized embedded co-processor for McEliece cryptosystem
US20180115419A1 (en) Method of generating an elliptic curve cryptographic key pair
CN109375897B (en) Method for generating pseudo-random sequence
CN103812596A (en) Pseudo random sequence generation method and apparatus
Massolino et al. Optimized and scalable co-processor for McEliece with binary Goppa codes
Abu-Khader et al. Square Root Generator for Galois Field in Multiple-Valued Logic
Pedersen et al. Network coding over the 2 32− 5 prime field
CN108809323B (en) Method and device for generating cyclic redundancy check code
CN112579045A (en) Method and device for generating pseudorandom sequence and storage medium
CN102891689B (en) A kind of error location polynomial method for solving and device
CN107846272B (en) Device and method for rapidly generating Golden sequence
US20040054703A1 (en) Method and device for generating a pseudo-random sequence using a discrete logarithm
CN114553386B (en) Sequence generation method and device and computer readable storage medium
CN110661591B (en) Data processing method, apparatus and computer readable storage medium
Choi et al. Analysis of 90/150 CA Corresponding to the Power of Irreducible Polynomials.
JP3812983B2 (en) Error evaluation polynomial coefficient calculator

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant