CN107491408B

CN107491408B - Computing server node

Info

Publication number: CN107491408B
Application number: CN201710635683.1A
Authority: CN
Inventors: 王磊; 鲁璐
Original assignee: Zhengzhou Yunhai Information Technology Co Ltd
Current assignee: Zhengzhou Yunhai Information Technology Co Ltd
Priority date: 2017-07-31
Filing date: 2017-07-31
Publication date: 2023-09-15
Anticipated expiration: 2037-07-31
Also published as: CN107491408A

Abstract

The invention provides a computing server node which is characterized by comprising a centralized processing unit, a management unit, a computing unit 1 and a computing unit 2, wherein the computing unit 1 and the computing unit 2 are in data communication through a UPI bus; the computing unit 1 and the computing unit 2 are respectively provided with three PCIE bus controllers PE1, PE2 and PE3. The invention breaks through the limitation of the traditional computing server in application by combining the OCUlink connector based on the PCIE expansion technology and the Cable interconnection technology. The invention has higher data storage capacity, more flexible PCIE expansion capacity and more various disk storage applications.

Description

Computing server node

Technical Field

The invention relates to the field of computers, in particular to a server node architecture design.

Background

The traditional OCP standard computing server can only support 3.5 inch disk positions of 1 standard, the transmission speed of the SATA disk is only 6-12 Gbps, and the traditional application of large data and high-speed data transmission cannot be met. Meanwhile, PCIE devices supported by the system are supported by the CPU0, and resources on the CPU1 are idle and not used, so that an 'island' effect can be generated, the use of system resources is uneven, and the requirements of the current distributed application can not be met.

Disclosure of Invention

The invention aims to solve the technical problems. Therefore, the invention provides a computing server node which has the advantages of supporting a plurality of storage disk extensions, having high data transmission rate and solving the island effect.

In order to achieve the above purpose, the present invention adopts the following technical scheme.

A computing server node comprises a centralized processing unit, a management unit, a computing unit 1 and a computing unit 2, wherein the computing unit 1 and the computing unit 2 are in data communication through a UPI bus. The computing unit 1 and the computing unit 2 are respectively provided with three PCIE bus controllers PE1, PE2 and PE3.

The x16 signal in PE1 of the computing unit 1 is split into 2 independent x8 signals and used to Connect the Mezz card connectors Connect a and Connect B. The x16 signal in the PE2 of the computing unit 1 can be switched through a resistor to be connected with the centralized processing unit to support the QAT data encryption/decryption technology integrated in the centralized processing unit, or be connected to a PCIE Slot with x24 physical specification to be matched with a standard PCIE card; the x16 signals in PE3 of the computing unit 1 are divided into 2 independent x8 signals, wherein 1 set x8 is connected to PCIE Slot of the x24 physical specification, and the other 1 set x8 is connected to PCIE Slot of the x8 physical specification.

The x16 signals of PE1 in the computing unit 2 are divided into 4 groups of independent x4 signals, and PCIE expansion application is performed through 4 groups of OCUlink extraction.

Preferably, the centralized processing unit mainly controls low-speed and simple-function devices in the system, and is connected with 2 M.2 devices through the SATA bus to store an operating system such as Windows, linux or Vmware required by the computing system.

Preferably, the centralized processing unit supports 8 SATA devices through a high density OCUlink connector, supports the construction of soft RAIDs, and is used to store data required by the computing system.

Preferably, the centralized processing unit is connected to the connector Connect C meeting the OCP specification through 4 sets of KR signals, and can be matched with a PHY card to support a network controller integrated into the centralized processing unit, so as to support a 4 x 1gb or 4 x 10gb network electrical port and optical port network according to different PHY implementations.

Preferably, the management unit is mainly used for monitoring the core electronic devices in the computing system and the running state of the whole system.

Preferably, the management unit is designed based on an expected 2500 chip, and a special management port is provided for supporting the management of a client based on standard IMPI instructions remotely, and simultaneously, USB and VGA interfaces are provided for facilitating the local management.

The invention has the beneficial effects that:

1. higher data storage capacity

The invention supports 16 memory slots, which is 33% higher than 12 of traditional OCP nodes, and can support 1024GB of fast data storage capacity.

2. More flexible PCIE expansion capability

By optimizing the resource allocation of the PCIE controller, the OCP module can be still used compared with the traditional OCP computing node standard OCP Mezz card when being matched with the computing unit of the integrated FPGA. Besides the fact that 2 PCIE expansion card applications are supported by the computing node from the computing unit 1 meeting the standard, the application of more resource load balancing, namely 2 PCIE cards, can be supported by the computing unit 1 and the computing unit 2 respectively through adopting an OCUlink and Cable expansion mode.

3. More various disk storage applications

By adopting the OCUlink and Cable extension mode, the traditional OCP computing node can support 1 application of 3.5 inch disks, 2 applications of 2.5 inch NVMe storage, the bandwidth of the NVMe storage interface is PCIE 3.0x4, and the transmission rate of 32Gbps can be provided and is far higher than that of the prior SATA 6-12 Gbps.

Drawings

Fig. 1 is a design diagram of a computing server node architecture of embodiment 1.

Fig. 2 is a topology diagram of a PCIE device supported by a computing server node according to embodiment 2.

Detailed Description

The invention will be further described with reference to the drawings and examples.

Example 1

As shown in fig. 1, a computing server node includes a centralized processing unit, a management unit, a computing unit 1 and a computing unit 2, where the computing unit 1 and the computing unit 2 communicate data through a UPI bus. The computing unit 1 and the computing unit 2 are respectively provided with three PCIE bus controllers PE1, PE2 and PE3.

The centralized processing unit mainly controls low-speed and simple-function equipment in the system, is connected with 2 M.2 equipment through a SATA bus and is used for storing a Linux operating system required by the computing system.

The centralized processing unit supports 8 SATA devices through a high-density OCUlink connector, supports the construction of soft RAID and is used for storing data required by a computing system.

The centralized processing unit is connected to a connector Connect C conforming to the OCP specification through 4 groups of KR signals, and can be matched with a PHY card to support a network controller integrated into the centralized processing unit, and the network controller is matched with the PHY to support a 4 x 1Gb network electric interface.

The management unit is mainly used for monitoring the core electronic devices in the computing system and the running state of the whole system.

The management unit is designed based on an expected 2500 chip, and a special management port is provided for supporting the management of a client based on a standard IMPI instruction remotely, and simultaneously, USB and VGA interfaces are provided for facilitating the local management.

Example 2

As shown in fig. 2, the computing server node supports connection of PCIE devices, and the server node includes a computing unit 1 (CPU 0) and a computing unit 2 (CPPU 1). The PE3 PCIE controller of the CPU0 leads out a signal of 16 land, wherein 8 land is connected to a standard PCIE x8 slot through an adapter plate, and can support a standard FHHL card; in addition, 8lane PCIE signals are also connected to the patch panel, and the signals are connected to the two 2.5 inch NVMe storage devices in front through Cable through two sets of x4 OCULINK connectors.

The other 1 PCIE device in the system is supported by the CPU1, a PE1 controller of the CPU1 leads out PCIE signals of 16Lane, the PCIE signals are divided into 4 groups of x4 signals, the signals are connected to a Riser expansion board through 4 x4 OCUlink connectors by Cable, and 1 Slot with x16 specification is arranged on the Riser board, so that a standard FHFL card can be supported.

While the foregoing description of the embodiments of the present invention has been presented in conjunction with the drawings, it should be understood that it is not intended to limit the scope of the invention, but rather, it is intended to cover all modifications or variations within the scope of the invention as defined by the claims of the present invention.

Claims

1. The computing server node is characterized by comprising a centralized processing unit, a management unit, a computing unit 1 and a computing unit 2, wherein the computing unit 1 and the computing unit 2 are in data communication through a UPI bus; the computing unit 1 and the computing unit 2 are respectively provided with three PCIE bus controllers PE1, PE2 and PE3;

the x16 signal in PE1 of the computing unit 1 is split into 2 independent x8 signals and used to connect the Mezz card connectors ConnectionA and connectib; the x16 signal in the PE2 of the computing unit 1 can be switched through a resistor to be connected with the centralized processing unit to support the QAT data encryption/decryption technology integrated in the centralized processing unit, or be connected to the PCIE card matched with the standard on the PCIESLot of the x24 physical specification; the x16 signals in the PE3 of the computing unit 1 are divided into 2 groups of independent x8 signals, wherein 1 group of x8 is connected to the PCIESLot of the x24 physical specification, and the other 1 group of x8 is connected to the PCIESLot of the x8 physical specification;

dividing the x16 signal of PE1 in the computing unit 2 into 4 groups of independent x4 signals, and leading out the 4 groups of OCUlink to perform PCIE expansion application;

the centralized processing unit supports 8 SATA devices through a high-density OCUlink connector, supports the construction of soft RAID and is used for storing data required by a computing system;

the centralized processing unit is connected to a connector ConnectC which accords with the OCP specification through 4 groups of KR signals, and can be matched with a PHY card to support a network controller integrated into the centralized processing unit, and 4 x 1Gb or 4 x 10Gb network electric port and optical port networks are supported according to different PHYs.

2. The computing server node of claim 1, wherein the centralized processing unit is configured to control low-speed, simple-function devices in the system, and connect 2 m.2 devices via SATA bus for storing operating systems required by the computing system, such as Windows, linux, or Vmware.

3. The computing server node of claim 1, wherein the management unit is configured to monitor core electronics and overall system operating status of the computing system.

4. The computing server node of claim 1, wherein the management unit is designed based on an expected 2500 chip, and has a dedicated management port for supporting the management of client remote based on standard IMPI instructions, while providing USB and VGA interfaces for facilitating local management.