CN107480560A - The random hamiltonian circuit generation method of multichannel for chip top-layer overcoat - Google Patents
The random hamiltonian circuit generation method of multichannel for chip top-layer overcoat Download PDFInfo
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- CN107480560A CN107480560A CN201710636671.0A CN201710636671A CN107480560A CN 107480560 A CN107480560 A CN 107480560A CN 201710636671 A CN201710636671 A CN 201710636671A CN 107480560 A CN107480560 A CN 107480560A
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- loops
- adjacent edge
- central area
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- loop
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
- G06F21/75—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information by inhibiting the analysis of circuitry or operation
Abstract
The present invention relates to chip top-layer metal protection layer generation technique, for the wiring quantity in increase overcoat region, improves the difficulty that attacker identifies.Therefore, the technical solution adopted by the present invention is, the random hamiltonian circuit generation method of the multichannel for chip top-layer overcoat, step is as follows：1) dot chart is generated；2) two loops are randomly choosed in all loops；3) judge whether two element loops selected have adjacent edge；4) judge whether central area also has the element loop not being merged, if in the presence of execution step 2；If being not present, step 5 is performed；5) two loops are randomly choosed in all loops, if two loops are belonging respectively to different borderline regions, are reselected；6) judge whether two loops selected have adjacent edge；7) repeat step 5 and step 6, untill the random hamiltonian circuit of number needed for residue.Present invention is mainly applied to manufacture and design occasion.
Description
Technical field
The present invention relates to chip top-layer metal protection layer generation technique, specifically, is related to for chip top-layer overcoat
The random hamiltonian circuit generation method of multichannel.
Background technology
From microprobe attack and since FIB attack technologies are suggested, for the attack resistance technical research of the two always never
It was interrupted.At present, the main flow attack resistance means attacked for FIB and microprobe are to be felt using top-level metallic overcoat as attack
Know structure.Top-level metallic overcoat is made up of the detection sensor of metal line screen layer and lower section.Screen layer on the one hand can be with
Underlying circuit is covered, attacker can not be observed internal structure, also causes microprobe can not contact internal cabling；On the other hand can
With perceptually unit, coordinate detection sensor, the detection structure as FIB attacks.Top-level metallic screen layer graph topology knot
Structure species is various, and graph topology structure is more complicated, and attacker identifies that the difficulty of screen layer is bigger, and intrusion scene is higher.And with
Fascination screen layer of the machine hamiltonian circuit as basic structure, because its graph topology structure has very high randomness, it is difficult to know
Not, main flow overcoat topological structure is become.
Overcoat generating algorithm at present, studied mainly for the single random hamiltonian circuit in certain area.But
It is that single random hamiltonian circuit still can be identified by attacker.Identify difficulty, it is necessary to realize same for increase attacker
Multiple random hamiltonian circuits can be carried out in one region while are connected up, then are equipped with multiple detection sensors, top will be greatly promoted
The anti-attack ability of layer metal protection layer.
The content of the invention
For overcome the deficiencies in the prior art, the present invention is directed to propose carrying out multiple random Hami simultaneously in a kind of the same area
The generating algorithm of loop generation, the wiring quantity in increase overcoat region, improve the difficulty of attacker's identification.Therefore, this
The technical scheme that invention uses is the random hamiltonian circuit generation method of the multichannel for chip top-layer overcoat, and step is as follows：
1) the general area size according to required generation, dot chart is generated, and it is minimum single using adjacent four lattice points as one
Position, the square matrices of certain amount are generated, as element loop matrix, the random hamiltonian circuit according to required generation
Number, is divided into multiple regions, intermediate rest square is unified for central area by the square of boundary；
2) two loops are randomly choosed in all loops, if two loops are belonging respectively to different borderline regions, again
Selection, until two loops belong to identical borderline region, or one belongs to borderline region, and one belongs to central area, also or
Person two belongs to central area；
3) judge whether two element loops selected have adjacent edge.If adjacent edge is not present, step 2 is performed；If
Adjacent edge be present, then remove adjacent edge, merge into an element loop；If two loops of selection belong to borderline region,
Element loop after then merging still falls within this borderline region；If selection two loops all centered on region, merge after
Element loop still falls within central area；If one, two loops of selection belong to borderline region, one belongs to central area, then closes
Element loop after and belongs to borderline region, belongs to originally and will be disappeared in the loop of central area because of union operation；
4) judge whether central area also has the element loop not being merged, if in the presence of execution step 2；If do not deposit
Then performing step 5；
5) two loops are randomly choosed in all loops, if two loops are belonging respectively to different borderline regions, again
Selection, until two loops belong to identical borderline region；
6) judge whether two loops selected have adjacent edge, if adjacent edge is not present, perform step 2, if in the presence of
Adjacent edge, then adjacent edge is removed, merge into an element loop；
7) repeat step 5 and step 6, untill the random hamiltonian circuit of number needed for residue.
In one example, double random hamiltonian circuits are generated, therefore boundary square is divided into two regions of A, B, in
Between remaining square be divided into region C.
The features of the present invention and beneficial effect are：
A plurality of random hamiltonian circuit can be generated simultaneously using this method, and generation topological structure has height random.
Completely random between each hamiltonian circuit simultaneously, non-correlation.Coordinate multiple detection sensors, top-level metallic will be greatly promoted and prevented
The anti-attack ability of sheath.
Brief description of the drawings：
Fig. 1 double loops region division schematic diagram.
(a) dot chart (b) region division schematic diagram
The random selection of Fig. 2 double loops merges schematic diagram.
Fig. 3 double loops central area merges schematic diagram.
(a) there is non-combining unit circuit diagram in central area
(b) non-combining unit circuit diagram is not present in central area
The complete double loop generation result schematic diagrams of Fig. 4.
The big lattice point number double loop generation result schematic diagrams of Fig. 5.
The loop regions of Fig. 6 tetra- divide schematic diagram.
Embodiment
The present invention is applied to chip top-layer metal protection layer and generated, and is related to based on high complicated random hamiltonian circuit topology knot
During the overcoat generation of structure, while carry out the generation method of a plurality of random hamiltonian circuit in the same area.
The present invention proposes a kind of generating algorithm for generating a plurality of random hamiltonian circuit simultaneously in the same area.The algorithm is pre-
Boundary member is first divided into multiple regions, each region most generates a random hamiltonian circuit at last.By borderline region and
Central area carries out circulating random merging again, ultimately generates the random hamiltonian circuit of predetermined number.The following institute of its algorithm frame
Show.For purposes of illustration only, using double random hamiltonian circuit generating process as embodiment, generating process schematic diagram institute as shown in Figure 1 to Figure 4
Show.
The random hamiltonian circuit generating algorithm of multichannel
8) the general area size according to required generation, generates dot chart, as shown in Fig. 1 (a).And with adjacent four lattice points
For a least unit, the square matrices of certain amount are generated, as element loop matrix, as shown in Fig. 1 (b).According to institute
The random hamiltonian circuit number that need to be generated, multiple regions are divided into by the square of boundary.Intermediate rest square is unified
Centered on region.In Fig. 1 (b) illustrated embodiments, generate double random hamiltonian circuits, thus by boundary square be divided into A,
Two regions of B.Intermediate rest square is divided into region C.
9) two loops are randomly choosed in all loops, if two loops are belonging respectively to different borderline regions, again
Selection, until two loops belong to identical borderline region, or one belongs to borderline region, and one belongs to central area, also or
Person two belongs to central area.
10) judge whether two element loops selected have adjacent edge.If adjacent edge is not present, step 2 is performed.If
Adjacent edge be present, then remove adjacent edge, merge into an element loop.If two loops of selection belong to borderline region,
Element loop after then merging still falls within this borderline region；If selection two loops all centered on region, merge after
Element loop still falls within central area；If one, two loops of selection belong to borderline region, one belongs to central area, then closes
Element loop after and belongs to borderline region, belongs to originally and will be disappeared in the loop of central area because of union operation.It is real as shown in Figure 2
Apply in example, randomly choosed the rectangular cells loop of a-quadrant two, judgement has adjacent edge, then merged, the list after merging
First loop still falls within a-quadrant.Perform step 4.
11) judge whether central area also has the element loop not being merged, if in the presence of (shown in such as Fig. 3 (a)), hold
Row step 2；If in the absence of (shown in such as Fig. 3 (b)), step 5 is performed.
12) two loops are randomly choosed in all loops, if two loops are belonging respectively to different borderline regions, again
Selection, until two loops belong to identical borderline region.
13) judge whether two loops selected have adjacent edge.If adjacent edge is not present, step 2 is performed.If in the presence of
Adjacent edge, then adjacent edge is removed, merge into an element loop.
14) repeat step 5 and step 6, untill the random hamiltonian circuit of number needed for residue, as shown in Figure 4.
Algorithm terminates.
As shown in figure 5, it is the embodiment of the double random hamiltonian circuits generated in large area region.Hand at random double loop
It is wrong so that graph topology is complicated, and attacker, which needs to take considerable time, to be identified.
When needs carry out more random hamiltonian circuits generations, it is necessary to which boundary member to be first divided into the area of required number
Domain, dividing mode can be according to certain rules, can also completely random.As shown in fig. 6, schematic diagram is divided for four loop regions,
Boundary member is divided into tetra- regions of A, B, C, D, intermediate rest square matrix is divided into central area, is breathed out at random using multichannel
Close loop generating algorithm can generate four hamiltonian circuits at random staggeredly on its basis.
Implemented according to the random hamiltonian circuit generating algorithm of multichannel.Protection scope of the present invention is not with above-mentioned embodiment
It is limited, the equivalent modification or change that those of ordinary skill in the art are made according to disclosed content, should all includes protection
Scope.
Claims (2)
1. a kind of random hamiltonian circuit generation method of multichannel for chip top-layer overcoat, it is characterized in that, step is as follows：
1) the general area size according to required generation, generates dot chart, and using adjacent four lattice points as a least unit, it is raw
Into the square matrices of certain amount, as element loop matrix, according to the random hamiltonian circuit number of required generation, by side
Square at boundary is divided into multiple regions, and intermediate rest square is unified for central area；
2) two loops are randomly choosed in all loops, if two loops are belonging respectively to different borderline regions, are reselected,
Until two loops belong to identical borderline region, or one belongs to borderline region, and one belongs to central area, also or two
Belong to central area；
3) judge whether two element loops selected have adjacent edge.If adjacent edge is not present, step 2 is performed；If in the presence of
Adjacent edge, then adjacent edge is removed, merge into an element loop；If two loops of selection belong to borderline region, close
Element loop after and still falls within this borderline region；If selection two loops all centered on region, merge after unit
Loop still falls within central area；If one, two loops of selection belong to borderline region, one belongs to central area, then after merging
Element loop belong to borderline region, belong to originally and will be disappeared in the loop of central area because of union operation；
4) judge whether central area also has the element loop not being merged, if in the presence of execution step 2；If being not present,
Perform step 5；
5) two loops are randomly choosed in all loops, if two loops are belonging respectively to different borderline regions, are reselected,
Until two loops belong to identical borderline region；
6) judge whether two loops selected have adjacent edge, if adjacent edge is not present, step 2 is performed, if existing adjacent
Side, then adjacent edge is removed, merge into an element loop；
7) repeat step 5 and step 6, untill the random hamiltonian circuit of number needed for residue.
2. it is used for the random hamiltonian circuit generation method of multichannel of chip top-layer overcoat, its feature as claimed in claim 1
It is in an example, to generate double random hamiltonian circuits, therefore boundary square is divided into two regions of A, B, intermediate rest
Square is divided into region C.
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| CN201710636671.0A CN107480560A (en) | 2017-07-31 | 2017-07-31 | The random hamiltonian circuit generation method of multichannel for chip top-layer overcoat |
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| CN201710636671.0A CN107480560A (en) | 2017-07-31 | 2017-07-31 | The random hamiltonian circuit generation method of multichannel for chip top-layer overcoat |
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Citations (4)
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|---|---|---|---|---|
| JP2012018425A (en) * | 2011-09-08 | 2012-01-26 | Takemi Kanai | P=np technology |
| CN103500740A (en) * | 2013-10-10 | 2014-01-08 | 北京昆腾微电子有限公司 | Chip capable of resisting invasive attack, manufacturing method thereof and attack detection method |
| CN106227955A (en) * | 2016-07-22 | 2016-12-14 | 天津大学 | A kind of reconstructing method for chip top-layer metal protection layer |
| CN106484932A (en) * | 2015-09-01 | 2017-03-08 | 天津蓝海微科技有限公司 | A kind of method improving active shielding wiring safety |
-
2017
- 2017-07-31 CN CN201710636671.0A patent/CN107480560A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2012018425A (en) * | 2011-09-08 | 2012-01-26 | Takemi Kanai | P=np technology |
| CN103500740A (en) * | 2013-10-10 | 2014-01-08 | 北京昆腾微电子有限公司 | Chip capable of resisting invasive attack, manufacturing method thereof and attack detection method |
| CN106484932A (en) * | 2015-09-01 | 2017-03-08 | 天津蓝海微科技有限公司 | A kind of method improving active shielding wiring safety |
| CN106227955A (en) * | 2016-07-22 | 2016-12-14 | 天津大学 | A kind of reconstructing method for chip top-layer metal protection layer |
Non-Patent Citations (1)
| Title |
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| 张赟等: "一种抗物理攻击防篡改检测技术", 《微电子学与计算机》 * |
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