CN107423229B - Buffer area improvement method for page-level FTL - Google Patents
Buffer area improvement method for page-level FTL Download PDFInfo
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- CN107423229B CN107423229B CN201710156124.2A CN201710156124A CN107423229B CN 107423229 B CN107423229 B CN 107423229B CN 201710156124 A CN201710156124 A CN 201710156124A CN 107423229 B CN107423229 B CN 107423229B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/023—Free address space management
- G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
- G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
- G06F12/0646—Configuration or reconfiguration
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/12—Replacement control
- G06F12/121—Replacement control using replacement algorithms
- G06F12/123—Replacement control using replacement algorithms with age lists, e.g. queue, most recently used [MRU] list or least recently used [LRU] list
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CN201710156124.2A CN107423229B (en) | 2017-03-16 | 2017-03-16 | Buffer area improvement method for page-level FTL |
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CN201710156124.2A CN107423229B (en) | 2017-03-16 | 2017-03-16 | Buffer area improvement method for page-level FTL |
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CN107423229A CN107423229A (en) | 2017-12-01 |
CN107423229B true CN107423229B (en) | 2020-09-01 |
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Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108196795B (en) * | 2017-12-30 | 2020-09-04 | 惠龙易通国际物流股份有限公司 | Data storage method and device and computer storage medium |
CN108762664B (en) * | 2018-02-05 | 2021-03-16 | 杭州电子科技大学 | Solid state disk page-level cache region management method |
CN109446117B (en) * | 2018-09-06 | 2023-02-28 | 杭州电子科技大学 | Design method for page-level flash translation layer of solid state disk |
CN109918316B (en) * | 2019-02-26 | 2021-07-13 | 深圳忆联信息系统有限公司 | Method and system for reducing FTL address mapping space |
CN110688325B (en) * | 2019-09-05 | 2021-12-03 | 苏州浪潮智能科技有限公司 | Garbage recycling method, device and equipment for solid state disk and storage medium |
CN113076267B (en) * | 2021-04-29 | 2023-05-26 | 华侨大学 | Address conversion method and data storage device based on hot spot aggregation |
Citations (6)
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---|---|---|---|---|
US20100169544A1 (en) * | 2008-12-31 | 2010-07-01 | Eom Young-Ik | Methods for distributing log block associativity for real-time system and flash memory devices performing the same |
CN103176752A (en) * | 2012-07-02 | 2013-06-26 | 晶天电子(深圳)有限公司 | Super-endurance solid-state drive with Endurance Translation Layer (ETL) and diversion of temp files for reduced Flash wear |
CN102097128B (en) * | 2010-11-25 | 2014-03-19 | 中国人民大学 | Self-adaptive buffer area replacement method based on flash memory |
CN104102591A (en) * | 2013-04-08 | 2014-10-15 | 香港理工大学 | Computer subsystem and method for implementing flash translation layer in computer subsystem |
CN105224240A (en) * | 2014-05-30 | 2016-01-06 | 北京忆恒创源科技有限公司 | By the method for data write storage device, device and memory device |
CN105917318A (en) * | 2012-07-24 | 2016-08-31 | 英特尔公司 | System and method for implementing SSD-based I/O caches |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
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US9621286B2 (en) * | 2011-06-29 | 2017-04-11 | Tektronix, Inc. | Apparatus for generation of corrected vector wideband RF signals |
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- 2017-03-16 CN CN201710156124.2A patent/CN107423229B/en active Active
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20100169544A1 (en) * | 2008-12-31 | 2010-07-01 | Eom Young-Ik | Methods for distributing log block associativity for real-time system and flash memory devices performing the same |
CN102097128B (en) * | 2010-11-25 | 2014-03-19 | 中国人民大学 | Self-adaptive buffer area replacement method based on flash memory |
CN103176752A (en) * | 2012-07-02 | 2013-06-26 | 晶天电子(深圳)有限公司 | Super-endurance solid-state drive with Endurance Translation Layer (ETL) and diversion of temp files for reduced Flash wear |
CN105917318A (en) * | 2012-07-24 | 2016-08-31 | 英特尔公司 | System and method for implementing SSD-based I/O caches |
CN104102591A (en) * | 2013-04-08 | 2014-10-15 | 香港理工大学 | Computer subsystem and method for implementing flash translation layer in computer subsystem |
CN105224240A (en) * | 2014-05-30 | 2016-01-06 | 北京忆恒创源科技有限公司 | By the method for data write storage device, device and memory device |
Non-Patent Citations (1)
Title |
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基于连续缓存和二级缓存的DFTL改进算法;姚英彪 等;《计算机研究与发展》;20141230;第51卷(第9期);第2012-2021页 * |
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