CN107391316A - A kind of computing device and its application method based on non-volatile memory - Google Patents
A kind of computing device and its application method based on non-volatile memory Download PDFInfo
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- CN107391316A CN107391316A CN201710777052.3A CN201710777052A CN107391316A CN 107391316 A CN107391316 A CN 107391316A CN 201710777052 A CN201710777052 A CN 201710777052A CN 107391316 A CN107391316 A CN 107391316A
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- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/14—Error detection or correction of the data by redundancy in operation
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Abstract
The present invention provides a kind of computing device based on non-volatile memory, including：Storage, and/or internal memory on processor, integrated piece on a processor, and energy storage device, for storing electric energy when being powered, and electric energy are provided in power down with will storage and/or the internal memory on piece described in still unsaved data Cun Chudao on the processor；Wherein, described upper storage and/or the internal memory use nonvolatile storage of the read or write speed for nanosecond, for providing the memory access of the data to performing computing to the processor.
Description
Technical field
The present invention relates to the improvement of the structure to computing device.
Background technology
The storage program principle proposed based on American Hungary mathematician Feng Nuo Yiman in nineteen forty-six, i.e., by program in itself
Treat, the data of program and program processing are stored in the same way so that modern computer is deposited as data
Storage and application have obtained significant progress.
Even to this day, most computer has still continued to use the institutional framework based on Feng's Neumann computers, such meter
Calculate frame structure and be called Feng Nuo Yiman architectures.Computer or computing device based on Feng Nuo Yiman architectures, tool
Standby long-term storage or memory program, data, the ability of intermediate result and final operation result, can be by the program and data of needs
Deliver in computer or computing device, and data can be directed to and carry out the working processes such as logical operation, can be controlled by instructing
The trend of processing procedure sequence and data, coordinate corresponding operation, and by processing output to user or input computer or computing device
In stored.
Fig. 1 shows the schematic diagram for the computing device for schematically having gone out traditional Feng Nuo Yiman architectures, now absolutely mostly
The commercially available PC of number, notebook computer, tablet personal computer, mobile phone etc. are using such structure, it can be seen which employs three-level
Mode comes storage program and data.Storage (first order) on piece is integrated with the chip of processor, and outside processor
Also there is internal memory (second level) and be commonly referred to as the external storage (third level) of hard disk.In above-mentioned three-level, deposited on piece
Preserve on a processor, thus possess most fast memory access speed, its cost is high and to be commonly stored capacity extremely limited, interior
Deposit and be connected with processor, the data of most of application program would generally be run on internal memory, and the memory capacity of internal memory has
Limit, it belongs to volatile memory, such as SRAM or dynamic RAM with storage on piece, such volatile
Memory can lose data after system power failure.By contrast, positioned at the third level external storage using such as tape, disk and
The nonvolatile storages such as flash memory, the external storage have maximum memory capacity and most slow memory access speed, and it is stored
Data will not be lost after system power failure.
However, above-mentioned traditional computing device with third level storage is in read-write data and the process of operation program
In, data need mutually to transmit between the memory of each level, cause system to have to take a considerable amount of time to hold
The operation such as space of storage and internal memory on the even remote digital independent of row moderate distance, write-in, transmission and releasing piece,
It thus limit the speed of service of computing device.Also, as described in the text, deposited in above-mentioned traditional computing device on piece
It is volatile memory used by storage and internal memory, if there occurs power down during the computing device is run, then slow
The program and data for storing and operating on internal memory on piece be present can then lose, so as to influence the experience of user, or even meeting
The data degradation for being difficult to retrieve is brought for user.In addition, in traditional computing device, journey is applied for performing the overwhelming majority
The memory capacity of the internal memory of sequence is limited, limits the quantity or size of its application program that can be run within the same period.
The content of the invention
Therefore, it is an object of the invention to overcome above-mentioned prior art the defects of, there is provided a kind of based on non-volatile memory
Computing device, including：
Storage, and/or internal memory on processor, integrated piece on a processor, and
Energy storage device, for storing electric energy when being powered, and provide in power down electric energy with by the processor not yet
Described in the data Cun Chudao of preservation on piece storage and/or the internal memory；
Wherein, described upper storage and/or the internal memory use nonvolatile storage of the read or write speed for nanosecond,
For providing the memory access of the data to performing computing to the processor.
Preferably, according to described device, wherein also including condenser network in the energy storage device, the condenser network is not
In the state for closing electric discharge when providing electric energy.
Preferably, according to described device, wherein the condenser network charges in charging on the basis of original electricity.
Preferably, according to described device, wherein nonvolatile storage used by described upper storage and/or the internal memory
It is selected from the group：Phase transition storage, magnetic RAM, spin-torque conversion random access memory, Ferroelectric Random Access Memory, resistive
Random access memory.
Preferably, according to described device, wherein the internal memory is additionally operable to the configuration file that storage starts described device.
And a kind of application method for foregoing any one described device, including：
1) when described device powers off or triggers dormancy instruction, by the energy storage device by the number of computing in the processor
According to described upper storage of deposit and/or the internal memory；
2) in described device Power resumption or startup, restarting storage stores on said sheets and/or the internal memory
In the data, recover power-off or dormancy before state.
Preferably, according to methods described, wherein also including：
When described device is powered, the energy storage device is charged.
A kind of application method for foregoing any one described device, including：
When starting described device, the configuration file of described device is read from the internal memory；
Perform access data when, by the processor from the internal memory and/or described are upper store in read data with
Carry out computing；
When performing write-in data, the internal memory and/or described upper storage are stored data into.
Compared with prior art, the advantage of the invention is that：
Having broken computing device needs to use the intrinsic cognition of tertiary storage structure, reduces data transfer, the layer exchanged
Number of stages.In the case of the memory access speed stored on internal memory and/or piece is ensured, there is provided capacity can be suitable for computing device
The computing device with two-stage or one-level storage organization of demand.Computing device need not be taken a long time to perform medium and long distance
Digital independent, write-in, transmission etc. operate.In addition, in the present invention, due to being not provided with third-level storage, but by internal memory
It is combined with hard disk as second level memory, therefore the operation of releasing memory space need not be performed after EP (end of program) operation,
Simplify operating process and control required complexity.Also, read or write speed is employed in the present invention as nanosecond
Nonvolatile storage, be not in the phenomenon of loss of data in memory in system power failure.And further, in the present invention
Energy storage device is also provided with, electric energy is stored when being powered, and electric energy is provided will not yet be preserved on the processor in power down
Data stored, due in the present invention only there is provided memory access speed internal memory and/or piece on store, therefore compared to
For setting condenser network in common computing device, in the case where consuming identical electric energy, the present invention can store more
Data, thus be also equipped with energy-conservation the advantages of.In addition, the memory capacity of the internal memory set by the present invention is far longer than in tradition
The memory capacity deposited, therefore more or bigger application programs can be run within the same period.
Brief description of the drawings
Embodiments of the present invention is further illustrated referring to the drawings, wherein：
Fig. 1 is the schematic diagram of the computing device with third level storage traditional in the prior art；
Fig. 2 is the computing device based on non-volatile memory of two-level memory structure according to an embodiment of the invention
Schematic diagram；
Fig. 3 is the module diagram of the computing device based on non-volatile memory according to still another embodiment of the invention；
Fig. 4 is the flow chart of the application method to the computing device in Fig. 2 or Fig. 3 according to one embodiment of present invention.
Embodiment
The present invention is elaborated with reference to the accompanying drawings and detailed description.
As described in background technology, the speed of service of traditional computing device is limited to the memory access speed of third level storage
Degree.With reference to figure 1, the computing device is stored data in the external storage of the third level when not actuated.When the startup meter
When calculating device, at configuration file used in startup is passed through into the second level first from the external storage of the third level internal memory reading
Configured in reason device；And according to available capacity in internal memory and the required data volume size used, by data from the third level
External storage in exchange into the internal memory of the second level, being read by processor from the internal memory of the second level needs progress logical operation
Data to be handled accordingly, and the data after calculating are returned in the internal memory of the second level to enter the operation of line program；
If small part data be present is repeatedly carried out logical operation process, then the least a portion of data buffer storage can handled
In being stored in device on the piece of the first order, to save the memory access time；Program for terminating operation, then need internally to deposit into capable release
Put, i.e., preserved the external storage of the data Jiao Huanzhi third level in the internal memory of the second level, to prevent loss of data.
As can be seen that data need to transmit or exchange step by step in the structure of above-mentioned three-level, memory distance processor
Core it is more remote, then transmit or to exchange time for being consumed of data longer.Also, the first order, the second level, the 3rd under normal circumstances
The stepwise speed of level memory access deposit data is successively decreased, and this causes the speed of service, the complexity being controlled of above-mentioned computing device
Limited and influence by three-decker.In addition, being generally believed in this area should not be realized on piece using nonvolatile storage
Storage and internal memory.This is because, this area has been generally acknowledged that the memory access speed of the nonvolatile storages such as tape, disk and flash memory
Degree it is very slow, this cause for need to have can quickly on the piece of memory access data store and internal memory for, using traditional
Nonvolatile storage can not realize their function, i.e., for data cached or carrying application program, deposit on internal memory and piece
Storage must possess quite faster memory access speed.
A kind of the defects of inventor is by studying in the prior art, it is proposed that calculating dress based on non-volatile memory device
Put, it has broken the intrinsic cognition for needing to have third level storage structure on computing device in the prior art, will be new non-easy
Lose memory to be combined with computing device, overcome power down in the process of running and the situation of loss of data occurs, ensure that meter
Calculate the security of device.In the computing device of the present invention, without being separately provided the external storage of referred to as hard disk again, it can be with
Storage hierarchy in original Computer Architecture by the way of internal memory is combined, is overcome using storage in storage on piece or piece
The problem of more, control complexity and autgmentability difference.Also, the computing device of the present invention also improves the stability of system and reliable
Property, rapidly still unsaved data storage in processor can be stored on piece after a power failure or internal memory in, when power supply is extensive
After multiple, it can quickly start up and recover data.
Inventor find it is newly developed in recent years go out new nonvolatile storage can preserve for a long time in the event of a power failure
Data, while taking into account non-volatile, possess lower energy consumption, higher storage density, cause it to have close to several
Hundred GB memory capacity, and the speed of its memory access data can reach close to dynamic random access memory (DRAM) read-write speed
The nanosecond of degree.Nonvolatile storage with such feature is particularly suitable for the computing device according to the present invention.
Fig. 2 shows the computing device according to an embodiment of the invention based on non-volatile memory device.Reference chart
2, the computing device employs the storage organization of two-stage, including is integrated on non-volatile on the chip of processor and stores
(first order) and the nonvolatile memory (second level) with the relational processor.Wherein, depositing for storage is gone up for described non-volatile
Storing up capacity, occupied area on chip is related to it, therefore can be according to set by being determined to the size requirement of processor chips
The memory capacity of non-volatile upper storage.Due to employing the storage organization of two-stage in the present invention, the nonvolatile memory needs
Bear the effect of external storage in Fig. 1, therefore in the present invention preferably by relatively large non-volatile of memory capacity
Memory is as the nonvolatile memory, such as more than 100GB.
When not actuated, start required configuration file according to the above-mentioned computing device of the present invention, need processor to enter
The data of row logical operation, the program for needing to run etc. are stored in the nonvolatile memory.When the startup computing device
When, configuration file used in startup is read from the nonvolatile memory of the second level as processor；After the configuration has been completed, handle
Device reads the data for needing to carry out logical operation to be handled accordingly from the nonvolatile memory of the second level, and by after calculating
Data return in the nonvolatile memory of the second level to enter the operation of line program；If small part data be present repeatedly to be held
Row logical operation process, then the least a portion of data buffer storage non-volatile of the first order upper can be stored within a processor
In, to save the memory access time；When terminating the program of operation, without being discharged to nonvolatile memory, on nonvolatile memory
The program sum of operation is according to this and the data in non-volatile upper storage will not lose after a power failure.
It should be appreciated that the computing device using one-level storage organization can also be set in other embodiments of the invention,
And it is not provided with the nonvolatile memory of the second level.Such embodiment is suitable for less demanding to the size of chip and to depositing
Store up the not high application of capacity requirement.
Preferably, in the present invention such as following non-volatile memory devices can be used, including：Phase transition storage (phase
Change memory, PCM), magnetic RAM (Magnetic Random Access Memory, MRAM), from turn-knob
Square conversion random access memory (Spin Torque Transfer Random Access Memory, STT-RAM), ferroelectric random
Memory (Ferroelectric RAM, FeRAM), resistive random access memory (RRAM).Such non-volatile memory device, no
Data therein can be lost because of computing device power down, there is higher security, and it is also equipped with low in energy consumption, noise
It is small, robustness is high, the low advantage of radiating.
According to one embodiment of present invention, energy storage device can also further be increased in above-mentioned computing device.Ginseng
The example shown in Fig. 3 is examined, computing device provided by the invention includes：Control core, memory cell, input/output interface, electricity
Hold energy-storage module and power module.
Wherein, control core, flow direction and the corresponding data of manipulation for control data carry out logical operation.It can be with
For central processing unit, or other control units such as programmable logic controller (PLC), can specifically use application specific integrated circuit
(Application Specific Integrated Circuit, ASIC) is realized, can also use field programmable gate array
(Field Programmable Gate Array, FPGA) is realized.It is not shown in figure 3 for data execution logic computing
ALU.
Memory cell, for data storage.As introduced in previous embodiment, two-stage or one-level can be used in the present invention
Storage organization, to set non-volatile upper storage and/or nonvolatile memory.In the memory unit can with stored memory data,
System file and application software file etc., it is connected with control core by bus so that control core can be controlled to storage
Data and/or program in unit are written and read, run.
Input/output interface, for providing the interface of input data and output data for the computing device with such as showing
Show that the inputs such as device, mouse and keyboard and/or output equipment are attached.
Power module, for providing electric energy for the computing device (including capacitance energy storage module).
Capacitance energy storage module is the important module provided by the invention based on non-volatile memory computing device, its be used for be
Electric energy is provided for computing device so that computing device can be by still unsaved data in processor, such as control after system power-off
Data storage in unit is into nonvolatile memory cell.Preferably, capacitance energy storage module includes condenser network and peripheral control
Circuit, wherein condenser network store electric energy in the situation collection electric charge of system normal power supply, and peripheral control circuits then control to adjust
The discharge and recharge of condenser network.
The mode of operation of capacitance energy storage module according to the present invention can be divided into two classes：Power storage and electric energy release.
In system normal power supply, capacitance energy storage module enters power storage state, and the computing device passes through control unit and electric capacity
Energy-storage module inner capacitor peripheral control circuits are charged to electric capacity, and electric charge is stored into capacitor.When system generation is different
When normal off is electric or enters resting state, capacitance energy storage module enters electric energy release conditions, and capacitance energy storage module passes through computing device
Power module be computing device power supply, the data storage run is to non-volatile memory during control core exception will occur power-off
In device.After data storage terminates, control core and electric capacity peripheral control circuits close electric capacity discharge path, close electric charge and put
Electricity, prevent capacitive electric energy to be lost in, save electric energy, while when computing device restores electricity, can be on the basis of the original electricity of electric capacity
Charged, accelerate the charging interval.
The application method of the above-mentioned computing device with capacitance energy storage module will be specifically introduced below.With reference to figure 4, the side
Method includes：
Step S1, the computing device are in normal power supply state, computing device normal work, and capacitance energy storage module enters
Power storage state；
Step S2, when the computing device powers off or triggers dormancy instruction, computing device system standby；
Step S3, capacitance energy storage module switch to electric energy release conditions, discharged by electric capacity, by the data in control unit
It is stored in internal storage location；
Step S4, power on, the computing device start, and capacitance energy storage module enters electric capacity storage state；
Step S5, control unit is read from storage device starts configuration file, will be brought into operation at power-off, computer dress
Restarting is put, recovers the state before power-off or dormancy.
In summary, a kind of technique according to the invention scheme, using the teaching of the invention it is possible to provide calculating dress based on non-volatile memory device
Put, middle operating file, startup configuration file of the computing device using non-volatile memory device storage computing device, filling
When putting unexpected power-off, the Nonvolatile memory device, which remains unchanged, can preserve the content of service data, ensure that the power down peace of device
Entirely, it can be simultaneously reached the purpose quickly started.Meanwhile the present invention has broken the storage system of conventional computing devices, using interior
Deposit with external memory integral structure, overcome that storage hierarchy in original Computer Architecture is more, control is complicated and autgmentability difference
Problem, while improve the stability and reliability of system.
It should be noted that each step introduced in above-described embodiment is all not necessary, those skilled in the art
Appropriate choice, replacement, modification etc. can be carried out according to being actually needed.
It should be noted last that the above embodiments are merely illustrative of the technical solutions of the present invention and it is unrestricted.On although
The present invention is described in detail with reference to embodiment for text, it will be understood by those within the art that, to the skill of the present invention
Art scheme is modified or equivalent substitution, and without departure from the spirit and scope of technical solution of the present invention, it all should cover at this
Among the right of invention.
Claims (8)
1. a kind of computing device based on non-volatile memory, including：
Storage, and/or internal memory on processor, integrated piece on a processor, and
Energy storage device, for storing electric energy when being powered, and electric energy is provided will not yet be preserved on the processor in power down
Data Cun Chudao described in storage and/or the internal memory on piece；
Wherein, described upper storage and/or the internal memory use read or write speed to be used for for the nonvolatile storage of nanosecond
The memory access of data to performing computing is provided to the processor.
2. device according to claim 1, wherein also including condenser network in the energy storage device, the condenser network exists
In the state for closing electric discharge when not providing electric energy.
3. device according to claim 2, wherein the condenser network fills in charging on the basis of original electricity
Electricity.
4. according to the device described in any one in claim 1-3, wherein described upper storage and/or the internal memory are used
Nonvolatile storage be selected from the group：Phase transition storage, magnetic RAM, spin-torque conversion random access memory, ferroelectricity
Random access memory, resistive random access memory.
5. device according to claim 4, wherein the internal memory is additionally operable to the configuration file that storage starts described device.
6. a kind of application method for being directed to any one described device in claim 1-5, including：
1) when described device powers off or triggers dormancy instruction, the data of computing in the processor are deposited by the energy storage device
Enter described upper storage and/or the internal memory；
2) in described device Power resumption or startup, restarting is stored in storage on said sheets and/or the internal memory
The data, recover the state before power-off or dormancy.
7. according to the method for claim 6, wherein also including：
When described device is powered, the energy storage device is charged.
8. a kind of application method for being directed to any one described device in claim 1-5, including：
When starting described device, the configuration file of described device is read from the internal memory；
When performing access data, data are read to carry out from the internal memory and/or described upper storage by the processor
Computing；
When performing write-in data, the internal memory and/or described upper storage are stored data into.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710777052.3A CN107391316A (en) | 2017-09-01 | 2017-09-01 | A kind of computing device and its application method based on non-volatile memory |
| PCT/CN2018/088166 WO2019041903A1 (en) | 2017-09-01 | 2018-05-24 | Nonvolatile memory based computing device and use method therefor |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201710777052.3A CN107391316A (en) | 2017-09-01 | 2017-09-01 | A kind of computing device and its application method based on non-volatile memory |
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| WO (1) | WO2019041903A1 (en) |
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| WO2019041903A1 (en) * | 2017-09-01 | 2019-03-07 | 中国科学院计算技术研究所 | Nonvolatile memory based computing device and use method therefor |
| CN110134545A (en) * | 2019-04-03 | 2019-08-16 | 上海交通大学 | The method and system of the virtual NVRAM of offer based on credible performing environment |
| CN111160515A (en) * | 2019-12-09 | 2020-05-15 | 中山大学 | Running time prediction method, model search method and system |
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| CN107391316A (en) * | 2017-09-01 | 2017-11-24 | 中国科学院计算技术研究所 | A kind of computing device and its application method based on non-volatile memory |
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| WO2019041903A1 (en) * | 2017-09-01 | 2019-03-07 | 中国科学院计算技术研究所 | Nonvolatile memory based computing device and use method therefor |
| CN110134545A (en) * | 2019-04-03 | 2019-08-16 | 上海交通大学 | The method and system of the virtual NVRAM of offer based on credible performing environment |
| CN110134545B (en) * | 2019-04-03 | 2020-12-22 | 上海交通大学 | Method and system for providing virtual NVRAM based on trusted execution environment |
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Application publication date: 20171124 |