CN107370909A - A kind of plate straightening roll autocontrol method based on machine vision technique - Google Patents
A kind of plate straightening roll autocontrol method based on machine vision technique Download PDFInfo
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- CN107370909A CN107370909A CN201710562837.9A CN201710562837A CN107370909A CN 107370909 A CN107370909 A CN 107370909A CN 201710562837 A CN201710562837 A CN 201710562837A CN 107370909 A CN107370909 A CN 107370909A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/14—Picture signal circuitry for video frequency region
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T7/00—Image analysis
- G06T7/10—Segmentation; Edge detection
- G06T7/11—Region-based segmentation
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T7/00—Image analysis
- G06T7/10—Segmentation; Edge detection
- G06T7/13—Edge detection
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/76—Television signal recording
- H04N5/907—Television signal recording using static stores, e.g. storage tubes or semiconductor memories
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T2207/00—Indexing scheme for image analysis or image enhancement
- G06T2207/20—Special algorithmic details
- G06T2207/20024—Filtering details
- G06T2207/20032—Median filtering
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Abstract
The invention discloses a kind of plate straightening roll autocontrol method based on machine vision technique, 1, the digital video for being converted into being subsequently can by computer by the analog video that camera exports by modulus switching device；2nd, digital video byte stream is received, selection signal is deposited according to frame and effective video data are acquired effective line synchronising signal and form is changed, and is cached in corresponding memory；3rd, buffer storage of the two panels SRAM as video data is built；Image processing module carries out medium filtering, rim detection, binaryzation, micronization processes to a two field picture, obtains to be sent to USB control modules by the image information of computer Direct Recognition；Video data after USB control module reception processings, control USB device end chip are sent to host computer；The inventive method is capable of the detection information of accurate measurement plate shape, can reach 25fps frame per second, meet requirement of real-time, than realizing that image processing function has obvious superiority using software.
Description
Technical field
The invention belongs to automate and technical field of machine vision, more particularly to a kind of steel based on machine vision technique
Plate straightener autocontrol method.
Background technology
In the plate straightening roll automatic control system based on machine vision technique, flatness detection information is in banding, is being entered
Need first to extract it from background before row identification, and be refined as the width of a pixel, facilitate the processing of computer.
Existing video frequency collection card has the shortcomings that volume is big, power consumption is high, function is not easy to expand on the market, is realized with software at image
Reason, causing host computer, over-burden, declines whole control system real-time performance.
The content of the invention
In order to overcome the above-mentioned problems of the prior art, it is an object of the invention to provide one kind to be based on machine vision skill
The plate straightening roll autocontrol method of art, using FPGA parallel processing capability, designed, designed video acquisition system, and it will scheme
As processing function is realized with FPGA, to mitigate the processing load of host computer.
In order to achieve the above object, the present invention adopts the following technical scheme that：
Flatness detection information acquisition system of the present invention, for hardware aspect, system is divided into four parts：Analog-to-digital conversion
The digital video that the analog video that camera exports is converted into being subsequently can by computer by device SAA7113；FPGA is mainly completed
The control functions such as the collection and processing of video data, it is the core devices of whole system；Two panels SRAM is as the slow of video data
Memory is rushed, realizes the storage line by line of interlacing scan data；Video data is realized by USB control terminal chips CY7C68013FX2
Real-time transmission.
The design of FPGA internal logics is divided into 5 modules：
(1) I2C bus control units module is connected with modulus switching device SAA7113 I2C EBIs, total using I2C
Wire protocol writes initialization control word to modulus switching device SAA7113, sets its working method.
(2) control signal generation module receives the digital video byte stream from modulus switching device SAA7113 outputs, according to
Timing reference signal SAV and EAV in video flowing produce effective line synchronising signal needed for video data acquiring and frame deposits switching
Signal.
(3) frame deposits the digital video byte stream that control module receives modulus switching device SAA7113 outputs, is believed according to control
The frame that number generation module is sent deposits selection signal and effective video data are acquired effective line synchronising signal and form conversion,
And it is cached in corresponding memory；After as soon as two field picture is changed, it is sent to image processing module.
(4) image processing module carries out the processing such as medium filtering, rim detection, binaryzation, refinement to a two field picture, finally
Obtain to be sent to USB control modules by the image information of computer Direct Recognition.
(5) video data after the reception processing of USB control modules, after carrying out the bit width conversion of 8 to 16 to it, control
USB device end chip CY7C68013 is sent to host computer.
A kind of plate straightening roll autocontrol method of view-based access control model technology of the present invention, this method comprise the following steps：
Step A：The analog video that plate straightening roll camera exports is converted into being calculated by modulus switching device
The digital video of machine processing；
Step B：The collection and processing that control module mainly completes video data are deposited using control signal generation module and frame
Control；Be connected using I2C bus control units module with modulus switching device SAA7113 I2C EBIs, receive from
The digital video byte stream of SAA7113 outputs, the frame sent according to control signal generation module deposits selection signal and effective row is same
Effective video data are acquired step signal and form conversion, and is cached in corresponding memory；
Step C：Buffer storage of the two panels SRAM as plate straightening roll video data is built, realizes interlacing scan data
Storage line by line；Plate straightening roll image processing module carries out medium filtering, rim detection, binaryzation, refinement to a two field picture
Processing, finally obtain and can be sent by the image information of computer Direct Recognition to plate straightening roll USB control modules；USB is controlled
Video data after molding block reception processing, control USB device end chip CY7C68013 are sent to host computer, realize detection letter
The spatial domain image processing method of breath.
Compared to the prior art compared with the present invention possesses following advantage：
1st, collecting part uses buffer-stored strategy, and raising data throughput is read while write using two panels SRAM.
2nd, image processing section realizes the sliding window of filter in spatial domain using synchronization fifo.
Design system of the present invention is capable of the detection information of accurate measurement plate shape, can reach 25fps frame per second, meets real-time
Property require, than realizing that image processing function has obvious superiority using software.Brief description of the drawings
Fig. 1 is the flatness detection information acquisition system general structure of the present invention.
Fig. 2 is the YUV4 of the present invention:2:The form of 2PAL standard images, wherein Fig. 2 (a) are the lattice of one-frame video data
Formula, Fig. 2 (b) are the data line of field valid period, and Fig. 2 (c) defines for timing reference signal.
Fig. 3 is the generation process of the synchronous control signal of the present invention, and wherein Fig. 3 (a) is the generation stream that frame deposits switching signal
Cheng Tu, Fig. 3 (b) are the generation flow chart of synchronizing signal.
Fig. 4 is the SRAM control unit internal logic of the present invention.
Fig. 5 is the realization of the sliding window of the present invention.
Fig. 6 is the image processing effect of the present invention, and wherein Fig. 6 (a) is original image, and Fig. 6 (b) is that edge extracting closes two-value
Image after change, Fig. 6 (c) are image after refinement.
Embodiment
The present invention is described in further details with reference to the accompanying drawings and detailed description：
As shown in figure 1, control signal generation module and frame are deposited control module and realized and effective video data are acquired
Function, image processing module realizes the spatial domain image processing function of detection information.
Step A：The analog video that plate straightening roll camera exports is converted into being calculated by modulus switching device
The digital video of machine processing.
Step B：The collection and processing that control module mainly completes video data are deposited using control signal generation module and frame
Control function；Be connected using I2C bus control units module with modulus switching device SAA7113 I2C EBIs, receive from
The digital video byte stream of SAA7113 outputs, the frame sent according to control signal generation module deposits selection signal and effective row is same
Effective video data are acquired step signal and form conversion, and is cached in corresponding memory.
The video format of SAA7113 outputs is YUV4:2:2PAL standard images, its form are as shown in Figure 2.Wherein Fig. 2 (a)
The form of one-frame video data is represented, one-frame video data includes 625 rows, preceding 312 behavior odd field, rear 313 behavior idol field altogether.Often
Effective and two stages of blanking are divided in field again.The field valid period covers 288 effective rows altogether, and the whole that they are contained in one has
Data are imitated, all rows are all invalid datas in the field blanking stage.Data line is also classified into effectively and blanking two parts, field are effective
Shown in the form of period data line such as Fig. 2 (b).Often capable Elided data and valid data depend on two timing reference signal SAV
Separated with EAV, wherein SAV is in the beginning of each video effective data block, end of the EAV in each video effective data block.SAV
It is made up of with EAV the sequence of 4 bytes, form is：FF 00 00XY.Wherein first three bytes are the identification of timing reference signal
Code.4th byte XY includes the information such as field mark, field blanking state and horizontal blanking state, and it is defined as shown in Fig. 2 (c).
In gatherer process, it should valid data therein are only gathered, in order to reach this purpose, it must be understood that each
The original position of effective row；In addition, must also know when a two field picture starts.Control signal generation module is exactly to pass through seizure
SAV and EAV signals, the original position of each effective row and a two field picture is judged according to the implication of its 4th byte,
Shown in its course of work such as Fig. 3 (a), the generation process that frame deposits switching signal is described：The knowledge of timing reference signal is caught first
Other prefix " FF 00 00 " sequence, then the XY of more current XY and previous timing reference signal (be temporarily stored in temporary register
In), if current XY is B6, and a upper XY is EC, then shows the beginning that current location is a two field picture, because XY changes from EC
Only it can just occur when two field pictures switch over for B6, frame now is deposited into switching signal ramsel negates.Fig. 3 (b)
The generation process of shown effective line synchronising signal is also similar, and by the value of XY in timing reference signal, (80 represent that odd field is effective
Row starts, and C7 represents that the even effective row in field starts) judge whether the beginning of effective row, if so, then enabling effective line synchronising signal
Qfv, while effective pixel data is started counting up, when the valid data meter for needing to gather is full, make effective line synchronising signal qfv
It is invalid.
Because frame has two panels SRAM, their control module also has two, but the complete phase of design of two control modules
Together, its internal logic is as shown in Figure 4.Its input is pixel data vpo, and synchronizing signal qfv and frame deposit switching signal ramsel.
ramaddr[18:0]、ramdata[15:0], oe, we and ce are respectively SRAM address bus, data/address bus and control letter
Number, control module is exactly that the read-write to SRAM is realized by this 5 signals.Dataen_sr and dout_sr [7:0] it is the number of module
According to output and synchronizing signal.
The course of work that frame deposits control module is divided into two stages of write and read, and wherein data write phase will be to effective video
Data are acquired, and are the keys of whole module design.The alternation that two panels frame is deposited in system is to deposit switching signal by frame
What ramsel level change was realized, when being jumped on ramsel, a piece of SRAM work, when being jumped under ramsel, another work.
As can be seen that ramsel saltus step can deposit the enabling signal of control module as respective frame, when a piece of frame during from this
After depositing start-up operation, it is possible to according to effective row in the two field picture of qfv signal acquisitions one.Due to the two panels SRAM used in system
Capacity is 512K bytes, can not preserve whole valid data in a two field picture, therefore is only intercepted in system big in a two field picture
It is small be 512 × 512 part, for YUV4:2:For 2 form, each pixel takes two bytes, is just filled with a piece of frame
Deposit.Specifically, what is gathered in design is preceding 256 row of odd field data and preceding 256 row of even field data.For complete in a frame
For the effective row in portion, the data of collection correspond to the 1st row to 256 rows (odd field) therein, and the 289th row to the 544th row is (occasionally
).
In order to facilitate spatial domain image procossing, interleaved data must be stored by row-by-row system.It is right in design
19 bit address lines of frame memory are divided by the ranks form of video, i.e., are deposited by the use of high 9 of address wire as video data
The row address of storage, low 10 as pixel address in the row of video data.Address mapping strategy is as follows：
1) row address and column address initial value are 0；
2) a line is often gathered, row address adds 2；
3) when row address is 510, shows that odd field data acquisition finishes, row address be set to 1, start to gather even field data,
It is still that every collection a line address adds 2.
4) show that the collection of a frame data and form convert when row address is 511.
5) address of pixel is realized according to the counting to qfv in row, is often gathered a pixel address and is added 1.
After said process terminates, the interleaved image of a frame is converted to the form stored line by line.At this moment can
Since 0 address, all video datas are deposited into middle reading from frame, and be sent to image processing module.
SRAM read-write sequences must follow strictly order below：Address is sent, hair read-write control signal, reading and writing data, is taken
Disappear read-write control signal.It is exactly to stablize correct clock signal by generation to be written and read SRAM that frame, which deposits control module,.
Step C：Buffer storage of the two panels SRAM as plate straightening roll video data is built, realizes interlacing scan data
Storage line by line；Plate straightening roll image processing module carries out medium filtering, rim detection, binaryzation, refinement to a two field picture
Processing, finally obtain and can be sent by the image information of computer Direct Recognition to plate straightening roll USB control modules；USB is controlled
Video data after molding block reception processing, control USB device end chip CY7C68013 are sent to host computer, realize detection letter
The spatial domain image processing method of breath.
Image processing module need to realize three functions altogether：Medium filtering, edge extracting and binaryzation, image thinning.
1) medium filtering
For 3 × 3 windows used in design, the essence of medium filtering is exactly to be found out by comparing operation 9 in window
The problem of intermediate value of individual data is a sequence.If using conventional sort method, generally require to carry out tens comparisons behaviour
Make, the real-time of filtering can not be ensured, therefore the present invention carries out the quick comparison of medium filtering using following thinking.
The first steps, maximum, median and the minimum value of three data of the first row in window are found out, is denoted as max1 respectively,
Med1 and min1；Similarly, the maximum of the second row, median and minimum value, max2, med2, min2, the maximum of the third line are denoted as
Value, median and minimum value, are denoted as max3, med3 and min3.
Second step, max1, max2 and max3 that the first step obtains are ranked up, find out maximum therein, median
And minimum value, it is denoted as max_max123, med_max123 and min_max123；Similarly, med1, med2 and med3 maximum are found out
Value, median and minimum value max_med123, med_med123 and min_med123, also min1, min2 and min3 maximum
Value, median and minimum value max_min123, med_min123 and min_min123.
Max_max123 is that 9 numbers are inner maximum, it is impossible to is median；And min_min123 is that 9 numbers are inner minimum,
It is intermediate value to be also impossible to；For med_max123, at least 5 numbers are less than that, (med_max123 be expert at remaining two
Number, 3 numbers that min_max123 is expert at), therefore intermediate value is unlikely to be, similarly med_min123 is nor intermediate value；Come again
Analyze max_med123, and at least five number (minimum value that max_med123 is expert at, med_med123 and its institute less than that
The minimum value being expert at, min_med123 and its minimum value being expert at), therefore it is not intermediate value, similarly there is min_med123
It is not intermediate value.
3rd step, by analysis above, present intermediate value is only possible to appear in min_max123, max_min123 and med_
In tri- values of med123, therefore, as long as finding out their intermediate value in this step, the intermediate value of 9 numbers as in window.
In summary, this medium filtering thinking experienced three steps, the data group being compared in each step altogether
All be mutually it is independent, can be to their parallel processings in FPGA.And each step is to find maximum in three numbers
Value, minimum value and median, in order to complete this 3 steps in 8 clocks, it is necessary to which the operation of every step is compressed in 2 clocks
Interior realization, it is specific as follows：
(1) compare the size of the first two number, the greater is designated as max, smaller is designated as min；
(2) max and the 3rd number is compared, the greater is maximum.Compare min and the 3rd number, smaller is most
Small value.Determination for median, it can be realized by a branch statement：If max is less than the 3rd number, max is centre
Value；Otherwise the size of min and the 3rd number is compared, it is intermediate value to take the greater.
Another key issue that medium filtering is realized in FPGA is the realization of sliding window, the thinking used in design
It is to construct sliding window [4] using synchronous fifo, as shown in Figure 5.3 sizes are the fifo of 1018 bytes, and each fifo is added
6 registers of end, can just preserve 1 row video data.This 3 groups of fifo and register is end to end can cache 3 rows
Video data, wherein register f11, f13, f15, f21, f23, f25, f31, f33 and f35 constitute the sliding window of luminance signal
Mouthful.Every two pixel clocks, the sliding window slides a pixel.
2) edge extracting and binaryzation
Edge extracting is handled using Sobel operators, and the structure of module is identical with medium filtering module, both
It is different to differ only in processing procedure.In order to ensure the reliable of computing, after edge extracting the calculating of new gray value be divided into four
Step is completed：
(1) to the point that coefficients are 2, multiplying is realized by the way of moving to left one.
(2) by two row data are separately summed up and down in window.
(3) data for obtaining second step carry out phase reducing, and the result after subtracting each other is likely to occur negative.And for
For Verilog register, due to the concept of no negative, if minuend is less than subtrahend, the result after subtracting each other is on the contrary
One very big positive number.Therefore first have to judge whether minuend is more than subtrahend before subtraction is carried out, if so, then can phase
Subtract；Otherwise, by result treatment into minimal gray level 0.
(4) binary conversion treatment is carried out to treated new gray value, processing procedure is very simple, only need to give a threshold value i.e.
Can.
3) image thinning
It is that light stripe centric line is extracted that laser strip, which is carried out refining the best way, but so image is indulged
To traversal, converted good picture format is upset output again, all collections and processing work above are all without meaning
Justice.It is substantially parallel in view of laser rays lower edges, in the design using approximate method, the top edge of laser rays is carried
Take.Specific method is：The whole two field picture of scanning (is realized) with 1K synchronization fifo with the window of one 1 × 2, if be located in window
The gray value of top is 0, and underlying gray value is 255, illustrate be at this band-like image top edge, now keep window
The gray value of lower section is constant.If two gray scales in window are other any situations, by the currently processed ash in lower section
Angle value is changed to 0.
3 flatness detection information acquisition system treatment effects and performance evaluation
Image comparison after flatness detection information original image and video acquisition system processing is as shown in Figure 6.(a) to be original
Image, it can be seen that the detection information of its banding is more roomy, and background information also compares more.(b) carried for medium filtering and edge
Take and binary conversion treatment after result, it can be seen that detection information extracts from background, but every detection information is still
There is one fixed width, it is impossible to be directly used in the identification of computer.Finally, the image by micronization processes is such as shown in (c), in image only
The top edge of flatness detection banding information is left, and an only pixel wide, detection information can at this moment are directly used
To determine the skew of steel plate relative fiducial positions, so as to determine prolonging for this section of plate shape by the geometrical relationship of laser triangulation
Stretch rate.
Finally the real-time of video acquisition system is tested, and it is real to the FPGA realizations of image processing function and software
Now contrasted, as a result as shown in table 1：
The image processing function of table 1 is realized with FPGA and software and contrasted
It can be seen that carrying out IMAQ and processing using FPGA, the two field picture of coprocessing 1500 in 1 minute, can reach
25fps frame per second, no frame losing phenomenon.And be very low with the efficiency of software processing mass image data, in one minute
Only handled 246 two field pictures, frame per second only has 4.1fps, and frame loss rate has reached 83.6%, and CPU usage be up to 59%~
74%.
Claims (1)
- A kind of 1. plate straightening roll autocontrol method of view-based access control model technology, it is characterised in that：This method comprises the following steps：Step A：Being converted into the analog video that plate straightening roll camera exports by modulus switching device can be by computer The digital video of reason；Step B：Control module is deposited using control signal generation module and frame mainly to complete the collection of video data and handle to control； It is connected using I2C bus control units module with modulus switching device SAA7113 I2C EBIs, is received from analog-digital converter The digital video byte stream of part SAA7113 outputs, the frame sent according to control signal generation module deposit selection signal and effective row Effective video data are acquired synchronizing signal and form conversion, and is cached in corresponding memory；Step C：Build buffer storage of the two panels SRAM as plate straightening roll video data, realize interlacing scan data by Row storage；Plate straightening roll image processing module carries out medium filtering, rim detection, binaryzation, micronization processes to a two field picture, Finally obtain and can be sent by the image information of computer Direct Recognition to plate straightening roll USB control modules；USB controls mould Video data after block reception processing, control USB device end chip CY7C68013 are sent to host computer, realize detection information Spatial domain image processing method.
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Citations (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103140049A (en) * | 2011-12-05 | 2013-06-05 | 湖南城市学院 | System and method of chip mounter quick positioning based on field programmable gate array (FPGA) |
| CN103158620A (en) * | 2013-03-25 | 2013-06-19 | 中国电子科技集团公司第三十八研究所 | Vehicle pedestrian detection tracking early warning system |
| CN103475799A (en) * | 2013-09-15 | 2013-12-25 | 贵州大学 | Real-time detection device for fruit tree agronomic parameters |
| CN103826105A (en) * | 2014-03-14 | 2014-05-28 | 贵州大学 | Video tracking system and realizing method based on machine vision technology |
| CN104469274A (en) * | 2013-09-22 | 2015-03-25 | 华南师范大学 | An intelligent video surveillance system |
| CN104469265A (en) * | 2013-09-15 | 2015-03-25 | 程媛 | Glass defect image acquiring and processing system |
| CN104935886A (en) * | 2015-06-09 | 2015-09-23 | 宁夏大学 | Indoor intelligent video monitoring system based on SOPC |
| US20150324998A1 (en) * | 2014-05-06 | 2015-11-12 | Nant Holdings Ip, Llc | Image-based feature detection using edge vectors |
| CN105572541A (en) * | 2015-12-07 | 2016-05-11 | 浙江大学 | High-voltage line patrol fault detection method and system based on visual attention mechanism |
| CN205230140U (en) * | 2015-12-22 | 2016-05-11 | 安徽理工大学 | Image boundary detection device based on FPGA and sobel operator |
| CN105825219A (en) * | 2016-05-10 | 2016-08-03 | 梁伟棠 | Machine vision detection system |
-
2017
- 2017-07-11 CN CN201710562837.9A patent/CN107370909A/en active Pending
Patent Citations (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103140049A (en) * | 2011-12-05 | 2013-06-05 | 湖南城市学院 | System and method of chip mounter quick positioning based on field programmable gate array (FPGA) |
| CN103158620A (en) * | 2013-03-25 | 2013-06-19 | 中国电子科技集团公司第三十八研究所 | Vehicle pedestrian detection tracking early warning system |
| CN103475799A (en) * | 2013-09-15 | 2013-12-25 | 贵州大学 | Real-time detection device for fruit tree agronomic parameters |
| CN104469265A (en) * | 2013-09-15 | 2015-03-25 | 程媛 | Glass defect image acquiring and processing system |
| CN104469274A (en) * | 2013-09-22 | 2015-03-25 | 华南师范大学 | An intelligent video surveillance system |
| CN103826105A (en) * | 2014-03-14 | 2014-05-28 | 贵州大学 | Video tracking system and realizing method based on machine vision technology |
| US20150324998A1 (en) * | 2014-05-06 | 2015-11-12 | Nant Holdings Ip, Llc | Image-based feature detection using edge vectors |
| CN104935886A (en) * | 2015-06-09 | 2015-09-23 | 宁夏大学 | Indoor intelligent video monitoring system based on SOPC |
| CN105572541A (en) * | 2015-12-07 | 2016-05-11 | 浙江大学 | High-voltage line patrol fault detection method and system based on visual attention mechanism |
| CN205230140U (en) * | 2015-12-22 | 2016-05-11 | 安徽理工大学 | Image boundary detection device based on FPGA and sobel operator |
| CN105825219A (en) * | 2016-05-10 | 2016-08-03 | 梁伟棠 | Machine vision detection system |
Non-Patent Citations (2)
| Title |
|---|
| 孙略: "《视频技术基础（插图版）》", 31 May 2013 * |
| 清华大学出版社: "《新世纪医院院长与医院信息化工作全书》", 31 May 2001 * |
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