CN107305442B - Input device and control method thereof - Google Patents

Input device and control method thereof Download PDF

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Publication number
CN107305442B
CN107305442B CN201610237005.5A CN201610237005A CN107305442B CN 107305442 B CN107305442 B CN 107305442B CN 201610237005 A CN201610237005 A CN 201610237005A CN 107305442 B CN107305442 B CN 107305442B
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level
key
key signal
processing circuit
pin
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CN107305442A (en
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黄顺治
张志隆
李延霖
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Giga Byte Technology Co Ltd
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Giga Byte Technology Co Ltd
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/033—Pointing devices displaced or positioned by the user, e.g. mice, trackballs, pens or joysticks; Accessories therefor
    • G06F3/038—Control and interface arrangements therefor, e.g. drivers or device-embedded control circuitry
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/02—Input arrangements using manually operated switches, e.g. using keyboards or dials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01H—ELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
    • H01H9/00—Details of switching devices, not covered by groups H01H1/00 - H01H7/00
    • H01H9/54—Circuit arrangements not adapted to a particular application of the switching device and for which no provision exists elsewhere

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  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Input From Keyboards Or The Like (AREA)

Abstract

The invention relates to an input device and a control method thereof. The processing circuit has an input pin and an output pin. The input pin is coupled with the key. The output pin provides a key signal to a host device. The processing circuit controls the level of the key signal according to the level of the input pin. When the level of the input pin is changed from a first level to a second level, the processing circuit sets the key signal to a third level after a predetermined time, ignores the level change of the input pin within a first masking period, and maintains the key signal at the third level.

Description

Input device and control method thereof
Technical Field
The invention relates to an input device and a control method thereof.
Background
Generally, a computer system is composed of three types of devices, i.e., an input device, an output device, and a host device. The input device is used for controlling the host device by a user. Common input devices include a mouse, keyboard, trackball, joystick, touchpad, and the like. Most input devices have at least one key. After the user presses the key, the host device performs a corresponding action, such as opening an application. In the electronic competition game, the requirement of the user on the key reaction speed of the mouse is higher and higher. If the key cannot be timely judged whether to be pressed down, the use is inconvenient.
Disclosure of Invention
In order to overcome the defects of the prior art, the invention provides an input device and a control method thereof.
The invention provides an input device which comprises at least one key and a processing circuit. The processing circuit has an input pin and an output pin. The input pin is coupled with the key. The output pin provides a key signal to the host device. The processing circuit controls the level of the key signal according to the level of the input pin. When the level of the input pin is changed from the first level to the second level, the processing circuit sets the key signal to the third level after a predetermined time, ignores the level change of the input pin in the first shielding period, and maintains the key signal at the third level.
The invention also provides a control method applied to the input device, which comprises the steps of judging the level change of a key; when the level of the key is changed from the first level to the second level, setting the key signal to be a third level after a preset time, neglecting the level change of the key in the first shielding period and maintaining the key signal at the third level; providing a key signal to the host device. The host device executes the function corresponding to the key according to the key signal.
The invention is described in detail below with reference to the drawings and specific examples, but the invention is not limited thereto.
Drawings
In order to make the features and advantages of the present invention comprehensible, preferred embodiments accompanied with figures are described in detail below:
FIG. 1 is a diagram of an operating system according to an embodiment of the present invention;
FIG. 2A is a diagram illustrating level variation of a key under an ideal state;
FIG. 2B is a diagram illustrating level variation of a key in an actual state;
FIGS. 3A-3D are schematic diagrams of key signals and pin levels;
fig. 4 is a schematic diagram of a control method according to an embodiment of the invention.
The reference numbers in the figures are as follows:
100: an operating system; 110: an input device;
120: a host device; 111: a processing circuit;
KY 1-KYn: pressing a key; P1-Pn, PO: a pin;
SBT, SBT 1-SBT 4: a key signal; IM: an impedance;
LV, SP 1: a level; t1, T2: a point in time;
h: high level; l: low level;
311-314: during the shielding period; 315: presetting time;
s411 to S417: and (5) carrying out the following steps.
Detailed Description
The invention will be described in detail with reference to the following drawings, which are provided for illustration purposes and the like:
fig. 1 is a schematic diagram of an operating system according to an embodiment of the present invention. As shown, the operating system 100 includes an input device 110 and a host apparatus 120. The input device 110 may be a mouse, keyboard, trackball, joystick, or touch pad, but is not intended to limit the present invention. Other computer peripheral devices with buttons (e.g., a printer or scanner) may also be used as the input device 110. The host device 120 executes a corresponding service program according to the information provided by the input device 110.
In the present embodiment, the input device 110 includes keys KY1～KYnAnd a processing circuit 111, n being a positive integer. When pressing a key KY1～KYnWhen one of them is pressed, the processing circuit 111 outputs a corresponding key signal SBTTo the host device 120. The host device 120 then executes the function or service program corresponding to the pressed key. The number of keys is not limited in the present invention. In one possible embodiment, the input device 110 has only a single key. The present invention also does not limit the key KY1～KYnThe kind of (2). In other embodiments, key KY1～KYnIs a mechanical switch, such as a microswitch.
The processing circuit 111 has a pin P1～PnAnd PO. Pin P1～PnRespectively coupled with keys KY1～KYn. The processing circuit 111 is based on the key KY1～KYnThe pressing state of the key generates a key signal SBT, and then outputs a key signal S through the pin POBTTo the host device 120. The host device 120 generates a key signal S according to the key signalBTAnd executing the function or service program corresponding to the pressed key. The invention does not limit how the processing circuit 111 determines the key KY1～KYnThe pressed state of (1). In one embodiment, the processing circuit 111 is based on the key KY1～KYnThe level of the key is changed to determine whether a key is pressed. For example, when pressing KY1～KYnWhen one of the keys is pressed, the level of the pressed key will change, while the level of the other keys not pressed will remain unchanged. Therefore, by detecting the key KY1～KYnThe level of the key can be known whether a key is pressed.
FIG. 2A is a schematic diagram showing the impedance and level variation of a key under an ideal state. FIG. 2B is a diagram illustrating the impedance and level variation of the key in the actual state. Due to the key KY1～KYnHas the same characteristics, so the following keys KY1For example. As shown in FIG. 2A, in an ideal state, the key KY is pressed1When the key KY is pressed and loosened once1When pressed (i.e. time point T1), key KY1The impedance IM of the capacitor is changed from high impedance to low impedance and is maintained at low impedance; when pressing a key KY1When released (time point T2), key KY1The impedance IM changes from low impedance to high impedance.
When pressing a key KY1For high impedance, key KY1The level LV of is a low level L. When pressing a key KY1Key KY with low impedance1The level LV is a high level H. Therefore, by measuring the key KY1The level LV can determine the key KY1The pressed state of (1). For example, when pressing KY1When the level LV is at a low level L, it indicates a key KY1Not pressed. Conversely, when the key KY is pressed1When the level LV is at the high level H, it indicates the key KY1Is pressed.
However, in practice, when the key KY is pressed1When pressed or released, the switching state of impedance and level is not instantaneous, but accompanied by a vibration process, i.e. key KY1The impedance IM of the circuit generates a jitter (bounce) as shown in FIG. 2B. At key KY1Within a short time when the button is pressed, the button KY1The impedance IM of (a) is jittered as shown by symbol 210. Similarly, at key KY1When released, the key KY1The impedance IM of the circuit also generates a jitter phenomenon, such asAs shown by numeral 220.
When pressing a key KY1When the impedance IM of the key is jittered 210 and 220, the key KY1The output level also fluctuates with the occurrence of jitter. As shown in fig. 2B, the key KY is pressed for a while after a time point T11The output level varies between the high level H and the low level L and then stabilizes at the high level H. For a period of time after time point T2, key KY1The output level also varies between the high level H and the low level L and then stabilizes at the low level L.
Key KY1The level jitter of the signal will make the processing circuit 111 mistaken for the key KY1Is pressed several times, thereby outputting an erroneous key signal to the host device 120, and causing the host device 120 to execute an erroneous function or service program. Due to the existence of vibration phenomenon, the conventional key control method of the input device usually provides a function of anti-jitter (debounce), i.e. the pin (e.g. P1) of the processing circuit reads the key KY1When the signal of (2) is changed, the key signal S is not transmitted temporarilyBTTo the host device, but after a predetermined time, confirms that the signal is changed (e.g. key KY)1The output level is changed from low level to high level and maintained at high level), and then the key signal S is transmittedBTTo the host device, thereby preventing sending out multiple continuous key signals. The predetermined anti-shake time in the conventional input device is usually determined according to the product specification of the input device, and is generally longer (e.g. 10ms), so that the conventional input device has a slow key response. The invention provides two key control schemes to send out the key signals in advance, and compared with the traditional input equipment, the invention shortens the key response time and has faster key response.
An embodiment of the present invention provides an input device key control scheme that includes: when the pin (such as P1) of the processing circuit reads the key KY1Signal change (e.g. key KY)1The output level changes from low level to high level), a key signal S is immediately sentBTTo the host device, any signal is not acted within a predetermined time thereafter, which in one possible embodiment may be less than the press andthe limit of the key interval is released and is longer than the time of key vibration.
Another embodiment of the present invention provides an input device key control scheme comprising: when the pin (such as P1) of the processing circuit reads the key KY1Signal change (e.g. key KY)1The output level is changed from a low level to a high level), a predetermined time for anti-jitter processing is set to be less than the predetermined time (e.g., 10ms) for anti-jitter of the conventional input device, e.g., 2ms), the processing circuit confirms that the level output by the key is still in a vibration state or a changed state, and then sends the key signal SBTTo the host device, any signal within a second predetermined time (e.g., 8ms) thereafter does not act, and in one implementation, the second predetermined time is the anti-jitter time set by the original specification of the key minus the first predetermined time.
Compared with the conventional key control method of the input device, in any case of the above input device case processing schemes, the response delay from the pressing of the key to the sending of the signal is reduced, so that the key response speed can be increased, for example, the former processing method can reduce the delay of more than 10ms, and the latter processing method can reduce the delay of more than 8 ms.
The two aforementioned input device case processing schemes of the present invention are described below by way of specific embodiments.
In one embodiment, the processing circuit 111 sets the key signal S when the level of the pin P1 changes from a first level (e.g., low level L) to a second level (e.g., high level H)BTIs at a third level (e.g., high level H). It should be understood that once the key signal S is pressedBTA key signal S set by the processing circuit 111 and indicating that the processing circuit is to set the key signal S immediatelyBTAnd transmitting the data to the host device. Then, during a masking period, the level change of the pin P1 is ignored, and the key signal S is outputtedBTIs maintained at the third level. After the masking period, the processing circuit 111 sets the key signal S according to the level of the pin P1BTThe level of (c).
For example, if the level of pin P1 remains at the second bit after the masking periodIn practice, the processing circuit 111 will generate the key signal SBTIs set at a third level. Conversely, after the masking period, if the level of the pin P1 has returned to the first level, the processing circuit 111 will send the key signal SBTIs set at a fourth level (e.g., low level L).
The present invention does not limit the relationship between the first to fourth levels. In this embodiment, the first level is different from the second level, and the third level is different from the fourth level. For example, the first level is a low level and the second level is a high level. In another embodiment, the first level may be the same as or different from the third level, and the second level may be the same as or different from the fourth level.
FIG. 3A shows a key signal SBTAnd the level of pin P1. In the present embodiment, when the level SP1 of the pin P1 is not equal to the first level (e.g., not equal to the low level L), the processing circuit 111 outputs the key signal SBT1Is set at a third level (e.g., high level H). In one embodiment, when the level SP1 of the pin P1 is not equal to the low level (e.g., at the time point T1), the processing circuit 111 immediately sends the key signal SBT1Is set to a high level H.
Then, in the masking period 311, the processing circuit 111 will generate the key signal S regardless of whether the pin P1 is at the first or the second levelBTIs maintained at the third level (e.g., high level H). After the masking period 311, the processing circuit 111 sets the level of the key signal according to the level of the pin P1. In the embodiment, after the masking period 311, the level SP1 of the pin P1 is still maintained at the second level (e.g., high level H), so the processing circuit 111 sets the key signal SBT1Is maintained at a third level (e.g., high level H). In other embodiments, after the masking period 311, if the level SP1 of the pin P1 has returned to the first level (shown by the dashed line), the processing circuit 111 immediately sends the key signal SBT1Is changed from a third level (e.g., high level H) to a fourth level (e.g., low level L).
At time T2, the level SP1 of the pin P1 returns from the second level (e.g., high level H) to the first level (e.g., low level L). Due to level SP of pin P11 changes, so the processing circuit 111 immediately sets the key signal SBT1From a third level (e.g., high level H) to a fourth level (e.g., low level L). Then, during a masking period 312, the processing circuit 111 ignores the level SP1 change of the pin P1 and outputs the key signal SBT1Is maintained at the fourth level (e.g., low level L). After the masking period 312, the processing circuit 111 will again set the key signal S according to the level SP1 of the pin P1BT1The level of (c).
The invention is not limited to the length of the masking periods 311 and 312. The masking period 311 may be the same or different than the masking period 312. In one embodiment, the masking period 311 is longer than the masking period 312. In other embodiments, the masking periods 311 and 312 are greater than the impedance jitter time of the key. In addition, after the user presses and releases the key, the key is usually pressed again after 70-80 ms at the fastest time. Therefore, the masking periods 311 and 312 are required to be less than 70-80 ms. In some embodiments, masking period 312 is omitted.
FIG. 3B shows a key signal SBTAnd another illustration of the level of pin P1. FIG. 3B is similar to FIG. 3A, except that at time T2, although the level SP1 of pin P1 changes (from high to low), the processing circuit 111 waits for a predetermined time 315 before changing the level of the key signal SBT2 from the third level (e.g., high H) to the fourth level (e.g., low L). In this example, during the masking period 312, the processing circuit 111 ignores the level SP1 change of the pin P1 and maintains the key signal SBT2At a fourth level (e.g., low level L). After the masking period 312, the processing circuit 111 sets the key signal S according to the level SP1 of the pin P1BT2The level of (c). In one embodiment, after the masking period 312, the processing circuit 111 may set the key signal S immediately according to the level SP1 of the pin P1BT2Or wait for a period of time before setting the key signal SBT2The level of (c).
FIG. 3C shows a key signal SBTAnd another illustration of the level of pin P1. In the present embodiment, when the level of the pin P1 changes, the processing circuit 111 waits for a period of time 315 before setting the key signal SBT3And ignores the level change of the pin P1 during a masking period 313 after the setting, and does not set the key signal S according to the level of the pin P1 until after the masking period 313BT3The level of (c).
For example, at time T1, the level SP1 of pin P1 changes from a first level (e.g., low level L) to a second level (e.g., high level H). Although the level SP1 of the pin P1 changes, the processing circuit 111 waits for a predetermined time 315 before sending the key signal SBT3Is set at a third level (e.g., high level H). Then, during the masking period 313, the processing circuit 111 disregards the level SP1 change of the pin P1 and changes the key signal SBT3Is maintained at a third level (e.g., high level H).
After the masking period 313, when the level SP1 of the pin P1 returns from the second level (e.g., high level H) to the first level (e.g., low level L), the processing circuit 111 will wait for a predetermined time 315 before sending the key signal SBT3Changes from a third level (e.g., high level H) to a fourth level (e.g., low level L), and then during another masking period 314, the processing circuit 111 ignores the change of the level SP1 of the pin P1 and maintains the key signal SBT3At a fourth level (e.g., low level L). After the masking period 314, the processing circuit 111 sets the key signal S according to the level SP1 of the pin P1BT3The level of (c).
The masking period 314 may be the same as or different from the masking period 313. In one possible embodiment, the masking period 314 is shorter than the masking period 313. In other embodiments, the masking period 314 may be the same, shorter, or longer than the masking period 312. The masking period 313 may also be the same, shorter or longer than the masking period 311.
FIG. 3D shows a key signal SBTAnd another illustration of the level of pin P1. FIG. 3D is similar to FIG. 3C, except that after the masking period 313, when the level SP1 of the pin P1 returns from the second level (e.g., high level H) to the first level (e.g., low level L) (i.e., time point T2), the processing circuit 111 immediately sends the key signal SBT3Is changed from a third level (e.g., high level H) to a fourth level (e.g., low level L), and then the level S of the pin P1 is ignored during a masking period 314P1 changes and maintains the key signal SBT3Is at a fourth level (e.g., low level L), after the masking period 314, the processing circuit 111 sets the key signal S according to the level SP1 of the pin P1BT3The level of (c).
Fig. 4 is a flowchart of a control method applied to the input device according to the above embodiment of the present invention. The control method of the embodiment is used for judging whether a key is pressed down or not, and setting the level of a key signal according to the pressing state of the key, so that a host device executes a corresponding service program according to the key signal.
In step S411, it is determined whether or not a key is pressed. In one possible embodiment, the step S411 determines whether the key is pressed according to the key level, but not limiting the invention. In other embodiments, step S411 may determine whether the key is pressed according to the impedance change of the key. For convenience of explanation, the following description will be made with reference to the level of the key as an example.
When the level of the key changes, such as from a first level to a second level, the key is pressed, and thus, the level of the key signal is set to a third level (step S412). In one embodiment, when the level of the key changes from the first level to the second level, the level of the key signal is set to the third level immediately. In another embodiment, when the level of the key is changed from the first level to the second level, the level of the key signal is set to the third level immediately, and any signal within a period of time is masked. In another embodiment, the level of the key signal is set to the third level after waiting a first predetermined time (e.g., 2ms) when the level of the key changes from the first level to the second level.
In this embodiment, the first level is different from the second level. For example, the first level is a low level or a high level, and the second level is a high level or a low level. In addition, the size of the third level is not limited in the present invention. In one embodiment, the third level may be the same as the first or second level.
Then, during a masking period, the level change of the key is ignored, and the key signal is maintained at the third level (step S413). The masking period must be longer than the time during which the level of the key is jittered. In addition, the shielding period is shorter than the interval between two consecutive pressing by the user. For example, if the user presses the key again about every 70-80 ms, the masking time is shorter than 70-80 ms.
After the masking period, the level of the key signal is set according to the level of the key (step S414). In the present embodiment, step S414 includes steps S415 to S417. In step S415, it is determined whether the level of the key has changed. When the level of the key is still maintained at the second level, the level of the key signal is maintained at the third level (step S416), and the process returns to step S415 to continuously determine whether the level of the key signal changes.
When the level of the key signal changes from the second level to the first level, the key is released. Therefore, the level of the key signal is changed from the third level to the fourth level (step S417). In one embodiment, the level of the key signal is immediately changed from the third level to the fourth level. In other embodiments, the level of the key signal is changed from the third level to the fourth level after waiting for a second predetermined time.
The present invention does not limit the size of the third and fourth levels. In one embodiment, the fourth level is different from the third level. For example, when the third level is a high level or a low level, the fourth level is a low level or a high level. In other embodiments, the fourth level may be equal to the second or first level.
In one embodiment, each time the level of the key signal needs to be changed (e.g., from the third level to the fourth level or from the fourth level to the third level), the level of the key signal may be changed immediately or after waiting for a predetermined time.
Taking fig. 3A as an example, the level of the key signal is immediately changed from low level to high level and immediately changed from high level to low level. In FIG. 3B, the level of the key signal is immediately changed from the low level to the high level, but is changed from the high level to the low level after waiting a predetermined time. In FIG. 3C, the key signal is changed from the low level to the high level after waiting for a first predetermined time, and is changed from the high level to the low level after waiting for a second predetermined time. The first preset time may be equal to, longer than or shorter than the second preset time. In FIG. 3D, the key signal waits for a predetermined time before changing from low to high, but immediately changes from high to low.
In this embodiment, since the level of the key signal is not affected by the jitter level of the key, the host device can be prevented from mistakenly pressing the key several times. In addition, when the key is pressed, the level of the key signal is changed immediately, so that the host device can respond immediately and execute the corresponding service program.
Unless otherwise defined, all terms (including technical and scientific terms) used herein are to be interpreted as commonly understood by one of ordinary skill in the art to which this invention belongs. Moreover, unless expressly stated otherwise, the definition of a term in a general dictionary shall be construed as being consistent with its meaning in the context of the relevant art and shall not be construed as an idealized or overly formal definition.
The present invention may be embodied in other specific forms without departing from the spirit or essential attributes thereof, and it should be understood that various changes and modifications can be effected therein by one skilled in the art without departing from the spirit and scope of the invention as defined in the appended claims.

Claims (8)

1. An input device, comprising:
pressing a key;
the processing circuit is provided with an input pin and an output pin, the input pin is coupled with the key, the output pin provides a key signal to the host device, and the processing circuit controls the level of the key signal according to the level of the input pin;
when the level of the input pin is changed from the first level to the second level, a key signal is immediately sent to the host device, and the response delay between the key pressing and the key signal sending is reduced; then the signals do not act within a preset time; after the preset time, the processing circuit sets the key signal to be at a third level, ignores any level change of the input pin in a first shielding period and maintains the key signal at the third level; after the first shielding period, when the level of the input pin is changed into the first level, the processing circuit sets the key signal to be a fourth level;
the time interval of the first shielding period is smaller than the limit of the interval between the pressing and the releasing of the key in the operation and larger than the switch vibration time of the key.
2. The input device as claimed in claim 1, wherein the predetermined time is zero, and the processing circuit sets the key signal to the third level immediately when the level of the input pin is changed from the first level.
3. The input device as recited in claim 1, wherein the predetermined time is not zero, and the processing circuit performs anti-shaking processing of the keys during the predetermined time.
4. An input device as described in claim 3, wherein the predetermined time is less than an anti-jitter time set by an original specification of the key.
5. The input device as recited in claim 1, wherein after the first masking period, when the level of the input pin returns from the second level to the first level, the processing circuit sets the key signal to change from the third level to the fourth level immediately, ignores the level change of the input pin during a second masking period, and maintains the key signal at the fourth level.
6. The input device as claimed in claim 1, wherein after the first masking period, when the level of the input pin returns from the second level to the first level, the processing circuit waits a default time to set the key signal to change from the third level to the fourth level, and ignores the level change of the input pin and maintains the key signal at the fourth level during a second masking period.
7. A control method applied to an input device according to any one of claims 1 to 6, comprising:
judging the level change of a key;
when the level of the key is changed from a first level to a second level, the key signal is immediately sent to the host device, and the response delay from the key pressing to the key signal sending is reduced; then the signals do not act within a preset time; after the preset time, setting a key signal as a third level, neglecting any level change of the key in a first shielding period, and maintaining the key signal at the third level; after the first shielding period, when the level of the key is changed into the first level, setting the key signal to be a fourth level;
providing the key signal to a host device, wherein the host device executes the function corresponding to the key according to the key signal;
the time interval of the first shielding period is smaller than the limit of the interval between the pressing and the releasing of the key in the operation and larger than the switch vibration time of the key.
8. The control method according to claim 7, wherein the predetermined time is zero, and the key signal is set to the third level immediately when the level of the key is changed from the first level; or the preset time is not zero and is less than the anti-shaking time set by the original specification of the key, and anti-shaking processing is carried out on the key within the preset time.
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CN102104804A (en) * 2009-12-18 2011-06-22 康佳集团股份有限公司 Synchronous control method of network television
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0652657A1 (en) * 1993-11-10 1995-05-10 Nortel Networks Corporation Pointer justification event leak control
CN101741394A (en) * 2009-11-03 2010-06-16 北京中星微电子有限公司 Method and device for detecting key input
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