CN107230709A - AlGaN/GaN MIS-HEMT preparation method - Google Patents
AlGaN/GaN MIS-HEMT preparation method Download PDFInfo
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- CN107230709A CN107230709A CN201610178147.9A CN201610178147A CN107230709A CN 107230709 A CN107230709 A CN 107230709A CN 201610178147 A CN201610178147 A CN 201610178147A CN 107230709 A CN107230709 A CN 107230709A
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- 229910002704 AlGaN Inorganic materials 0.000 title claims abstract description 63
- 238000002360 preparation method Methods 0.000 title claims abstract description 10
- 229910002601 GaN Inorganic materials 0.000 claims abstract description 94
- 229910052581 Si3N4 Inorganic materials 0.000 claims abstract description 58
- 229910052751 metal Inorganic materials 0.000 claims abstract description 50
- 239000002184 metal Substances 0.000 claims abstract description 50
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims abstract description 37
- 238000000034 method Methods 0.000 claims abstract description 24
- 238000005530 etching Methods 0.000 claims abstract description 16
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 7
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 7
- 239000010703 silicon Substances 0.000 claims abstract description 7
- 238000001312 dry etching Methods 0.000 claims abstract description 6
- 239000000758 substrate Substances 0.000 claims abstract description 6
- 230000008021 deposition Effects 0.000 claims abstract description 5
- 238000001259 photo etching Methods 0.000 claims description 15
- 239000004411 aluminium Substances 0.000 claims description 9
- 229910052782 aluminium Inorganic materials 0.000 claims description 9
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 9
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 6
- 239000000956 alloy Substances 0.000 claims description 6
- 229910045601 alloy Inorganic materials 0.000 claims description 6
- 229910052719 titanium Inorganic materials 0.000 claims description 6
- 239000010936 titanium Substances 0.000 claims description 6
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 4
- 230000015572 biosynthetic process Effects 0.000 claims description 4
- 238000011161 development Methods 0.000 claims description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 4
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 claims description 3
- 238000004026 adhesive bonding Methods 0.000 claims description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 3
- 229910052737 gold Inorganic materials 0.000 claims description 3
- 239000010931 gold Substances 0.000 claims description 3
- 229910052759 nickel Inorganic materials 0.000 claims description 2
- 239000012299 nitrogen atmosphere Substances 0.000 claims description 2
- 230000010287 polarization Effects 0.000 abstract description 4
- 238000004519 manufacturing process Methods 0.000 description 9
- 238000000151 deposition Methods 0.000 description 5
- 230000008569 process Effects 0.000 description 5
- 238000012545 processing Methods 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 4
- 238000004140 cleaning Methods 0.000 description 3
- 238000010168 coupling process Methods 0.000 description 3
- 238000005859 coupling reaction Methods 0.000 description 3
- 230000006870 function Effects 0.000 description 3
- 238000003860 storage Methods 0.000 description 3
- 239000002253 acid Substances 0.000 description 2
- 238000004891 communication Methods 0.000 description 2
- 230000008878 coupling Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 238000001755 magnetron sputter deposition Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000012528 membrane Substances 0.000 description 2
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 1
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 230000014509 gene expression Effects 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 229910000040 hydrogen fluoride Inorganic materials 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000005693 optoelectronics Effects 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 230000005533 two-dimensional electron gas Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
- H01L29/7786—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
- H01L29/7787—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT with wide bandgap charge-carrier supplying layer, e.g. direct single heterostructure MODFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66446—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
- H01L29/66462—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Junction Field-Effect Transistors (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
The embodiment of the present invention provides a kind of AlGaN/GaN MIS HEMT preparation method.This method includes:Grow GaN dielectric layers, AlGaN dielectric layers, gallium nitride cap layers, delta doping layer and Si3N4 dielectric layers successively on the surface of silicon substrate;Si3N4 dielectric layers are performed etching;In the GaN contact layers and remaining Si3N4 dielectric layers upper surface deposition the first metal layer of the silicon doping exposed;Dry etching is carried out downwards along the presumptive area on the surface of the Si3N4 dielectric layers exposed;Si3N4 dielectric layers are deposited in gate contact hole and are used as gate medium.The embodiment of the present invention passes through the selective etch to the low damage of gallium nitride cap layers progress, enhance AlGaN/GaN MIS HEMT grid-control ability, and the conducting resistance of gallium nitride cap layers is reduced by the polarization charge compensation technique adulterated with δ, so as to improve AlGaN/GaN MIS HEMT switching characteristic.
Description
Technical field
The present embodiments relate to semiconductor applications, more particularly to a kind of AlGaN/GaN MIS-HEMT
Preparation method.
Background technology
With the increasingly increase of efficiently complete circuit for power conversion and system requirements, with low-power consumption and height
The power device of fast characteristic has attracted many concerns recently.Gallium nitride GaN is third generation wide bandgap semiconductor
Material, because it has big energy gap (3.4eV), high electron saturation velocities (2e7cm/s), height
Breakdown electric field (1e10--3e10V/cm), higher heat-conductivity, corrosion-resistant and radiation resistance, high pressure,
There is stronger advantage, it is considered to be research is short under high frequency, high temperature, high-power and Flouride-resistani acid phesphatase environmental condition
The optimal material of wavelength optoelectronic and high voltagehigh frequency rate high power device.
At present, aluminium gallium nitride alloy/GaN high electron mobility transistor (AlGaN/GaN High Electron
Mobility Transistor, abbreviation AlGaN/GaN HEMT) it is study hotspot in power device,
Because AlGaN/GaN suppresses to form high concentration, the two-dimensional electron gas (2DEG) of high mobility at knot,
Hetero-junctions has good adjustment effect to 2DEG simultaneously.Because HEMT grid can be Schottky
Structure or metal dielectric layer semiconductor (Metal Insulator Semiconductor, abbreviation
MIS) structure, therefore, aluminium gallium nitride alloy/gallium-nitride metal insulating barrier semiconductor-HEMT
(AlGaN/GaN Metal Insulator Semiconductor-High Electron Mobility
Transistor, abbreviation AlGaN/GaN MIS-HEMT) be AlGaN/GaN HEMT one kind, and two
Person's operation principle is identical.
But the AlGaN/GaN MIS-HEMT produced by existing manufacture craft grid-control ability compared with
Small, conducting resistance is larger, has had a strong impact on AlGaN/GaN MIS-HEMT switching characteristic.
The content of the invention
The preparation method that the embodiment of the present invention provides a kind of AlGaN/GaN MIS-HEMT, to improve
AlGaN/GaN MIS-HEMT switching characteristic.
The one side of the embodiment of the present invention is to provide a kind of AlGaN/GaN MIS-HEMT preparation method,
Including:
Growing gallium nitride GaN dielectric layers, aluminium gallium nitride alloy AlGaN media successively on the surface of silicon substrate
Layer, gallium nitride cap layers;
δ is carried out to the gallium nitride cap layers to adulterate the gallium nitride cap layers to be formed containing delta doping layer, and in institute
State grown silicon nitride Si3N4 dielectric layers on the surface of delta doping layer;
The first area and second area of the Si3N4 dielectric layers are performed etching, to expose described first
Region and the second area distinguish corresponding delta doping layer;
The first metal is deposited in the delta doping layer and the remaining Si3N4 dielectric layers upper surface exposed
Layer;
Photoetching, etching are carried out to the first metal layer, to expose the Si3N4 dielectric layers and form Europe
Nurse contacts electrode;
Dry etching is carried out downwards along the presumptive area on the surface of the Si3N4 dielectric layers exposed, directly
To the AlGaN dielectric layers of etch away sections, the Si3N4 dielectric layers being etched away, described contain
There are gallium nitride cap layers and part the AlGaN dielectric layers formation gate contact hole of delta doping layer;
The Si3N4 dielectric layers are deposited in the gate contact hole as gate medium, and the gate medium
Surface less than the gate contact hole aperture where surface;
In the surface of the gate medium, the Si3N4 dielectric layers exposed and the Ohm contact electrode
Upper surface grows second metal layer, and forms grid to second metal layer progress photoetching, etching, with
Complete the making of the AlGaN/GaN MIS-HEMT.
AlGaN/GaN MIS-HEMT provided in an embodiment of the present invention preparation method, by gallium nitride cap
Layer carries out the selective etch of low damage, enhances AlGaN/GaN MIS-HEMT grid-control ability,
And the conducting resistance of gallium nitride cap layers is reduced by the polarization charge compensation technique adulterated with δ, so as to carry
High AlGaN/GaN MIS-HEMT switching characteristic.
Brief description of the drawings
Fig. 1 is AlGaN/GaN MIS-HEMT provided in an embodiment of the present invention preparation method flow chart;
Fig. 2 illustrates to perform the section of AlGaN/GaN MIS-HEMT in manufacturing process of the embodiment of the present invention
Figure;
Fig. 3 illustrates to perform the section of AlGaN/GaN MIS-HEMT in manufacturing process of the embodiment of the present invention
Figure;
Fig. 4 illustrates to perform the section of AlGaN/GaN MIS-HEMT in manufacturing process of the embodiment of the present invention
Figure;
Fig. 5 illustrates to perform the section of AlGaN/GaN MIS-HEMT in manufacturing process of the embodiment of the present invention
Figure;
Fig. 6 illustrates to perform the section of AlGaN/GaN MIS-HEMT in manufacturing process of the embodiment of the present invention
Figure;
Fig. 7 illustrates to perform the section of AlGaN/GaN MIS-HEMT in manufacturing process of the embodiment of the present invention
Figure;
Fig. 8 illustrates to perform the section of AlGaN/GaN MIS-HEMT in manufacturing process of the embodiment of the present invention
Figure;
Fig. 9 illustrates to perform the section of AlGaN/GaN MIS-HEMT in manufacturing process of the embodiment of the present invention
Figure.
Embodiment
Fig. 1 is AlGaN/GaN MIS-HEMT provided in an embodiment of the present invention preparation method flow chart.For
To the method in the present embodiment understand the description of system, Fig. 2-Fig. 9 is performs the embodiment of the present invention
AlGaN/GaN MIS-HEMT diagrammatic cross-section in procedure, as shown in figure 1, methods described includes:
Step S101, growing gallium nitride GaN dielectric layers, aluminium gallium nitride alloy successively on the surface of silicon substrate
AlGaN dielectric layers, gallium nitride cap layers;
As shown in Fig. 2 on the surface of silicon substrate growing gallium nitride GaN dielectric layers, aluminium gallium nitride alloy successively
AlGaN dielectric layers, gallium nitride cap layers, perform the AlGaN/GaN MIS-HEMT's after step S101
Diagrammatic cross-section is as shown in Fig. 2 wherein, silicon substrate is represented with 20, and GaN dielectric layers are represented with 21,
AlGaN dielectric layers represent that gallium nitride cap layers are represented with 23 with 22.
Step S102, the gallium nitride cap layers are carried out with δ adulterate the gallium nitride cap to be formed containing delta doping layer
Layer, and the grown silicon nitride Si3N4 dielectric layers on the surface of the delta doping layer;
On the basis of Fig. 2, δ is carried out to gallium nitride cap layers 23 and adulterates to form the nitridation containing delta doping layer
Gallium cap layers, and the grown silicon nitride Si3N4 dielectric layers on the surface of the delta doping layer, perform step S102
The diagrammatic cross-section of AlGaN/GaN MIS-HEMT afterwards is as shown in figure 3, wherein, delta doping layer is used
24 are represented, Si3N4 dielectric layers are represented with 25.
Step S103, the first area to the Si3N4 dielectric layers and second area are performed etching, to reveal
Go out the first area and the second area distinguishes corresponding delta doping layer;
On the basis of Fig. 3, first area and second area to Si3N4 dielectric layers carry out dry etching,
The Si3N4 dielectric layers in first area and second area are etched away by dry etching, and etch away
Source contact hole is formed after Si3N4 dielectric layers in one region, the Si3N4 etched away in second area is situated between
Drain terminal contact hole is formed after matter layer.
Perform the diagrammatic cross-section of the AlGaN/GaN MIS-HEMT after step S103 as shown in figure 4,
Wherein, etch away the source contact hole formed after the Si3N4 dielectric layers in first area to be represented with 30, carve
The drain terminal contact hole formed after Si3N4 dielectric layers in eating away second area is represented with 31.
It is step S104, heavy in the delta doping layer and the remaining Si3N4 dielectric layers upper surface exposed
Product the first metal layer;
Specifically, in the delta doping layer 24 and the remaining upper table of Si3N4 dielectric layers 25 exposed
Face deposits the first metal layer, performs the section signal of the AlGaN/GaN MIS-HEMT after step S104
Figure is as shown in figure 5, wherein, the first metal layer of deposition is represented with 26.
In embodiments of the present invention, it is described to be situated between in the delta doping layer exposed with the remaining Si3N4
Before the deposition the first metal layer of matter layer upper surface, in addition to:To the delta doping layer exposed and surplus
The remaining Si3N4 dielectric layers upper surface is cleaned.
Specifically, in the delta doping layer and the remaining Si3N4 dielectric layers upper surface deposition that expose
Before the first metal layer, using DHF+SC1+SC2 methods to the delta doping layer that exposes and remaining
The surface of the Si3N4 dielectric layers is cleaned, wherein, DHF expressions are cleaned with dilute hydrogen fluoride acid, SC1
Represent standardization the first step cleaning, SC2 represent standardization second step cleaning, three times cleaning time be
60s。
It is preferred that, the first metal layer is metal ohmic contact, and the metal ohmic contact includes four layers
Medium, four layers of medium is followed successively by titanium, aluminium, titanium and titanium nitride according to order from top to bottom.
Specifically, depositing the first metal layer using magnetron sputtering membrane process, the first metal layer connects for ohm
Metal is touched, metal ohmic contact includes four layers, and first layer is titanium, and the second layer is aluminium, and third layer is titanium,
4th layer is titanium nitride, and from first layer to the 4th layer of order and AlGaN/GaN MIS-HEMT
Diagrammatic cross-section in sequence consensus from top to bottom.
Step S105, to the first metal layer carry out photoetching, etching, to expose the Si3N4 media
Layer simultaneously forms Ohm contact electrode;
A part to the first metal layer 26 carries out photoetching, etching, to expose the Si3N4 dielectric layers,
The first metal layer 26 not etched away respectively constitutes Ohm contact electrode, and the Ohm contact electrode includes source electrode
And drain electrode, perform diagrammatic cross-section such as Fig. 6 institutes of the AlGaN/GaN MIS-HEMT after step S105
Show, wherein, source electrode is represented with 27, and drain electrode is represented with 28.
It is described that photoetching, etching are carried out to the first metal layer, to expose the Si3N4 dielectric layers and shape
Into after Ohm contact electrode, in addition to:Under conditions of 840 DEG C, anneal 30s in N2 atmosphere,
To form the metal electrode of good Ohmic contact.
It is described to the first metal layer carry out photoetching, including:The first metal layer is applied successively
Glue, exposure, development.
Step S106, done downwards along the presumptive area on the surface of the Si3N4 dielectric layers exposed
Method is etched, until the AlGaN dielectric layers of etch away sections, the Si3N4 media being etched away
Layer, the gallium nitride cap layers containing delta doping layer and part the AlGaN dielectric layers formation gate contact
Hole;
On the basis of Fig. 6, along the surface of the Si3N4 dielectric layers 25 exposed presumptive area to
Lower carry out dry etching, until the AlGaN dielectric layers 22 of etch away sections, the presumptive area is less than
The surface region of the Si3N4 dielectric layers 25 exposed, the Si3N4 dielectric layers 25 being etched away,
The gallium nitride cap layers 23 containing delta doping layer 24 and the part formation of AlGaN dielectric layers 22 grid
Pole contact hole, performs diagrammatic cross-section such as Fig. 7 of the AlGaN/GaN MIS-HEMT after step S106
It is shown, wherein, gate contact hole is represented with 29.
Step S107, in the gate contact hole Si3N4 dielectric layers are deposited as gate medium, and
The surface of the gate medium is less than surface where the aperture in the gate contact hole;
On the basis of Fig. 7, the Si3N4 dielectric layers are deposited in gate contact hole 29 as gate medium,
The diagrammatic cross-section of the AlGaN/GaN MIS-HEMT after step S107 is performed as shown in figure 8, grid are situated between
Matter is represented with 32, and the surface of gate medium 32 is less than in Fig. 7 surface where the aperture in gate contact hole 29,
I.e. gate medium 32 does not fill up gate contact hole 29.
It is described that the Si3N4 dielectric layers are deposited in the gate contact hole as gate medium, and the grid
Before the surface of medium is less than surface where the aperture in the gate contact hole, in addition to:It is clear using HCL
Wash the gate contact hole.
Step S108, in the surface of the gate medium, the Si3N4 dielectric layers and described ohm exposed
The upper surface growth second metal layer of electrode is contacted, and photoetching, etching shape are carried out to the second metal layer
Into grid, to complete the making of the AlGaN/GaN MIS-HEMT.
On the basis of Fig. 8, on the surface of gate medium 32, Si3N4 dielectric layers 25, the source electrode exposed
27 and the upper surface of drain electrode 28 use magnetron sputtering membrane process depositing second metal layer, and to described the
Two metal levels carry out photoetching, etching processing, form grid, herein, and light is carried out to the second metal layer
Carve, etching processing and above-mentioned steps S105 carry out photoetching, the process of etching processing to the first metal layer
Unanimously, here is omitted, and the section for performing the AlGaN/GaN MIS-HEMT after step S108 shows
It is intended to as shown in figure 9, grid is represented with 33, structure as shown in Figure 9 is finally fabricated to
AlGaN/GaN MIS-HEMT diagrammatic cross-section.
It is preferred that, the second metal layer includes two layer medium, and the two layer medium is according to from top to bottom
Order is followed successively by nickel and gold.It is described to the second metal layer carry out photoetching, including:To second gold medal
Category layer carries out gluing, exposure, development successively.
The embodiment of the present invention is enhanced by the selective etch to the low damage of gallium nitride cap layers progress
AlGaN/GaN MIS-HEMT grid-control ability, and by the polarization charge compensation technique adulterated with δ come
Reduce the conducting resistance of gallium nitride cap layers, improve AlGaN/GaN MIS-HEMT switching characteristic.
In summary, the embodiment of the present invention is by carrying out the selective etch of low damage to gallium nitride cap layers,
AlGaN/GaN MIS-HEMT grid-control ability is enhanced, and is mended by the polarization charge adulterated with δ
Repay technology to reduce the conducting resistance of gallium nitride cap layers, so as to improve AlGaN/GaN MIS-HEMT
Switching characteristic.
In several embodiments provided by the present invention, it should be understood that disclosed apparatus and method,
It can realize by another way.For example, device embodiment described above is only schematical,
For example, the division of the unit, only a kind of division of logic function, can have in addition when actually realizing
Dividing mode, such as multiple units or component can combine or be desirably integrated into another system, or
Some features can be ignored, or not perform.It is another, shown or discussed coupling each other or
Direct-coupling or communication connection can be the INDIRECT COUPLING or communication link of device or unit by some interfaces
Connect, can be electrical, machinery or other forms.
The unit illustrated as separating component can be or may not be it is physically separate, make
It can be for the part that unit is shown or may not be physical location, you can with positioned at a place,
Or can also be distributed on multiple NEs.Can select according to the actual needs part therein or
Person's whole units realize the purpose of this embodiment scheme.
In addition, each functional unit in each embodiment of the invention can be integrated in a processing unit,
Can also be that unit is individually physically present, can also two or more units be integrated in a list
In member.Above-mentioned integrated unit can both be realized in the form of hardware, it would however also be possible to employ hardware adds software
The form of functional unit is realized.
The above-mentioned integrated unit realized in the form of SFU software functional unit, can be stored in a computer
In read/write memory medium.Above-mentioned SFU software functional unit is stored in a storage medium, including some fingers
Order is to cause a computer equipment (can be personal computer, server, or network equipment etc.)
Or processor (processor) performs the part steps of each embodiment methods described of the invention.And it is foregoing
Storage medium include:USB flash disk, mobile hard disk, read-only storage (Read-Only Memory, ROM),
Random access memory (Random Access Memory, RAM), magnetic disc or CD etc. are various can be with
The medium of store program codes.
Those skilled in the art can be understood that, for convenience and simplicity of description, only with above-mentioned each
The division progress of functional module is for example, in practical application, as needed can divide above-mentioned functions
With by different functional module completions, i.e., the internal structure of device is divided into different functional modules, with
Complete all or part of function described above.The specific work process of the device of foregoing description, can be with
With reference to the corresponding process in preceding method embodiment, it will not be repeated here.
Finally it should be noted that:Various embodiments above is merely illustrative of the technical solution of the present invention, rather than right
It is limited;Although the present invention is described in detail with reference to foregoing embodiments, this area it is common
Technical staff should be understood:It can still modify to the technical scheme described in foregoing embodiments,
Or equivalent substitution is carried out to which part or all technical characteristic;And these modifications or replacement, and
The essence of appropriate technical solution is not set to depart from the scope of various embodiments of the present invention technical scheme.
Claims (8)
1. a kind of AlGaN/GaN MIS-HEMT preparation method, it is characterised in that including:
Growing gallium nitride GaN dielectric layers, aluminium gallium nitride alloy AlGaN media successively on the surface of silicon substrate
Layer, gallium nitride cap layers;
δ is carried out to the gallium nitride cap layers to adulterate the gallium nitride cap layers to be formed containing delta doping layer, and in institute
State grown silicon nitride Si3N4 dielectric layers on the surface of delta doping layer;
The first area and second area of the Si3N4 dielectric layers are performed etching, to expose described first
Region and the second area distinguish corresponding delta doping layer;
The first metal is deposited in the delta doping layer and the remaining Si3N4 dielectric layers upper surface exposed
Layer;
Photoetching, etching are carried out to the first metal layer, to expose the Si3N4 dielectric layers and form Europe
Nurse contacts electrode;
Dry etching is carried out downwards along the presumptive area on the surface of the Si3N4 dielectric layers exposed, directly
To the AlGaN dielectric layers of etch away sections, the Si3N4 dielectric layers being etched away, described contain
There are gallium nitride cap layers and part the AlGaN dielectric layers formation gate contact hole of delta doping layer;
The Si3N4 dielectric layers are deposited in the gate contact hole as gate medium, and the gate medium
Surface less than the gate contact hole aperture where surface;
In the surface of the gate medium, the Si3N4 dielectric layers exposed and the Ohm contact electrode
Upper surface grows second metal layer, and forms grid to second metal layer progress photoetching, etching, with
Complete the making of the AlGaN/GaN MIS-HEMT.
2. according to the method described in claim 1, it is characterised in that described in the δ exposed doping
Before layer and the remaining Si3N4 dielectric layers upper surface deposition the first metal layer, in addition to:
The delta doping layer exposed and the remaining Si3N4 dielectric layers upper surface are carried out clear
Wash.
3. method according to claim 2, it is characterised in that the first metal layer connects for ohm
Touch metal, the metal ohmic contact includes four layers of medium, four layers of medium is suitable according to from top to bottom
Sequence is followed successively by titanium, aluminium, titanium and titanium nitride.
4. method according to claim 3, it is characterised in that described to enter to the first metal layer
Row photoetching, etching, to expose the Si3N4 dielectric layers and be formed after Ohm contact electrode, in addition to:
Under conditions of 840 DEG C, anneal 30s in N2 atmosphere.
5. method according to claim 4, it is characterised in that described in the gate contact hole
The Si3N4 dielectric layers are deposited as gate medium, and the surface of the gate medium is less than the gate contact
Before surface where the aperture in hole, in addition to:
The gate contact hole is cleaned using HCL.
6. method according to claim 5, it is characterised in that the second metal layer includes two layers
Medium, the two layer medium is followed successively by nickel and gold according to order from top to bottom.
7. method according to claim 6, it is characterised in that described to enter to the first metal layer
Row photoetching, including:
Carry out gluing, exposure, development successively to the first metal layer.
8. method according to claim 7, it is characterised in that described to enter to the second metal layer
Row photoetching, including:
Carry out gluing, exposure, development successively to the second metal layer.
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