CN106951210B - Finite field multiplication device based on cardiac array - Google Patents

Finite field multiplication device based on cardiac array Download PDF

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CN106951210B
CN106951210B CN201710168823.9A CN201710168823A CN106951210B CN 106951210 B CN106951210 B CN 106951210B CN 201710168823 A CN201710168823 A CN 201710168823A CN 106951210 B CN106951210 B CN 106951210B
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易海博
聂哲
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Shenzhen Polytechnic
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Abstract

The invention provides a finite field multiplication device based on a cardiac array, which comprises: the input port is used for inputting operands of the finite field, a first approximate polynomial selected on a subdomain of the finite field, a second approximate polynomial selected on the finite field and a clock signal; a subfield multiplier for invoking a multiplicative cardiac array to perform a multiplication of operands on the subfields; a sub-domain adder for invoking an addition cardiac array to perform addition of operands across the sub-domains; the controller is respectively connected with the input port, the sub-field multiplier and the sub-field adder and is used for analyzing the clock signal, calling the sub-field multiplier and the sub-field adder and executing multiplication of operands on a finite field; and the output port is connected with the controller and used for outputting the operation result of multiplication of the operand on the finite field. The invention can improve multiplication efficiency based on the cardiac array.

Description

Finite field multiplication device based on cardiac array
Technical Field
The present invention relates to a device for multiplying elements of a finite field, and more particularly to a finite field multiplying device.
Background
Finite fields, also known as Galois fields (abbreviated as GF), are fields that contain only a limited number of elements and are widely used in the fields of mathematics and engineering. The finite field calculation comprises operations such as finite field addition, multiplication, inversion, division and the like, and is the basis of fields such as cryptography, signal processing, big data storage and the like.
Finite field multiplication is one of the most important operations in finite field calculation, and the design method thereof is many. In the finite field, GF ((2)n)2) Is a special class of finite field whose subdomain is GF (2)n)；GF((2n)2) Has wide application in cryptography. Therefore, how to increase the finite field GF ((2)n)2) The operation efficiency of multiplication is a problem to be solved at present.
Disclosure of Invention
Therefore, the invention provides a finite field multiplication device based on a cardiac array to improve the operation efficiency.
Specifically, an embodiment of the present invention provides a finite field multiplication apparatus based on a cardiac array, including: an input port for inputting a first operand and a second operand of a finite field, a first approximate polynomial selected on a subdomain of the finite field, a second approximate polynomial selected on the finite field, and a clock signal; a subfield multiplier for invoking a multiplicative cardiac array to perform a multiplication of the first and second operands across the subfield; a sub-domain adder for invoking an additive cardiac array to perform an addition of the first and second operands across the sub-domain; the controller is connected with the input port, the sub-domain multiplier and the sub-domain adder respectively and used for analyzing the clock signal, calling the sub-domain multiplier and the sub-domain adder and executing multiplication of the first operand and the second operand on the finite field; and the output port is connected with the controller and used for outputting the operation result of multiplication of the first operand and the second operand on the finite field.
In one embodiment of the invention, the input port comprises: a first operand input port and a second operand input port for inputting the first operand and the second operand, respectively, a first immediate polynomial input port for inputting the first immediate polynomial, a second immediate polynomial input port for inputting the second immediate polynomial, and a clock input port for inputting the clock signal.
In one embodiment of the invention, the finite field is GF ((2)n)2, the subfield is GF (2)n) Multiplication of the first and second operands over the finite field is (a (x) × b (x)) mod (q (x)), multiplication of the first and second operands over the subdomain is ((a (x) × b (x)) mod (p (x)), and addition of the first and second operands over the subdomain is ((a (x) + b (x)) mod (p (x)), where a (x) and b (x) represent the first and second operands, respectively, p (x) represents the first known polynomial, q (x) represents the second known polynomial, and mod is a modulo operation.
In one embodiment of the present invention, the first and secondTwo operands have respective representations over the finite field: a (x) ═ a1x+a0，b(x)＝b1x+b0The first approximation polynomial has the expression: p (x) ═ xn + pn-1xn-1+pn-2xn-2+...+p1x +1, the second approximation polynomial having the form: q (x) q2x2+q1x+q0Wherein q is2,q1,q0,a1,a0,b1,b0Are all elements on the sub-field, pn-1,pn-2,...,p1Are all elements on the finite field GF (2).
In one embodiment of the invention, the result c (x) of the multiplication of the first and second operands over the finite field has the expression: c (x) ═ c1x+c0Wherein c is1,c0Are elements on the sub-field.
In one embodiment of the invention, the clock signal is a single bit value.
In one embodiment of the invention, the multiplication of the first and second operands on the sub-field comprises the steps of: (1) the first operand and the second operand are represented as
Figure BDA0001250545080000031
And
Figure BDA0001250545080000032
aistored in a cell of a first row of the multiplicative cardiac array, i ═ 0,1jIs an input to the multiplicative cardiac array, j-0, 1. (2) bjEnter a from left to right in sequenceiAfter each cycle, move to the right into ai+1(ii) a (3) In the first row of the multiplicative cardiac array, each cell calculates aibjAnd outputting the result to the cells of the second row; (4) according to
Figure BDA0001250545080000033
Calculating vmjWherein m is 0,1, 2 (n-1); (5) whenever v is(m+j)kThe cells of the second row will be a 1ibjOutput to third row unit ckK is 0,1,. cndot.n-1; and (6) when there is a new input, the cell in the third row adds the value of the input to the existing value as the new value for the cell.
In one embodiment of the invention, the addition of the first and second operands across the sub-field comprises the steps of: (i) the first operand and the second operand are represented as
Figure BDA0001250545080000041
And
Figure BDA0001250545080000042
biis stored in a unit of the additive heart array, i is 0,1jIs an input to the additive cardiac array, j-0, 1.., n-1; and (ii) biCorresponding to entry aiAnd calculate ai+biAnd outputting the result.
In one embodiment of the invention, the cardiac array based finite field multiplication device is an application specific integrated circuit device.
In one embodiment of the invention, the cardiac array based finite field multiplication device is a programmable logic device.
Therefore, the finite field multiplication device based on the cardiac array can improve the multiplication efficiency.
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The following detailed description of embodiments of the invention will be made with reference to the accompanying drawings.
Fig. 1 is a block diagram of a finite field multiplication apparatus based on a cardiac array according to an embodiment of the present invention.
FIG. 2 shows GF (2) in FIG. 1n) The structure of the multiplier is shown schematically.
FIG. 3 shows GF (2) in FIG. 1n) The adder is a schematic structure diagram.
Other aspects and features of the present invention will become apparent from the following detailed description, which proceeds with reference to the accompanying drawings. It is to be understood, however, that the drawings are designed solely for purposes of illustration and not as a definition of the limits of the invention. It should be further understood that the drawings are not necessarily drawn to scale and that, unless otherwise indicated, they are merely intended to conceptually illustrate the structures and procedures described herein.
Detailed Description
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below.
As shown in fig. 1, a finite field multiplication apparatus 10 based on cardiac array according to an embodiment of the present invention includes: controller 11, input port, output port, GF (2)n) Multiplier 13 and GF (2)n) And an adder 15. The controller 11 and the input port, the output port, GF (2)n) Multiplier 13 and GF (2)n) The adders 15 are respectively connected with signals. Wherein, GF (2)n) Multiplier 13 and GF (2)n) The adder 15 serves as a sub-field multiplier and a sub-field adder, which are four in number, for example, but the invention is not limited thereto. The components of the finite field multiplication apparatus 10 based on cardiac array according to the embodiment of the present invention will be described in detail with reference to fig. 1 to 3.
(1) Input port: as shown in fig. 1, the present embodiment has five input ports including 4 data input ports and 1 clock input port. Wherein the input ports a and b are used for inputting the finite field GF ((2)n))2As operand input ports, input ports p and q are respectively used for input subfield GF (2)n) And a finite field GF ((2)n))2The upper selected polynomials p (x) and q (x) serve as polynomial input ports, and input port k serves as a clock input port for inputting clock signal clk.
In accordance with the above, the finite field GF ((2)n))2The operands a (x) and b (x) above have, for example, the following forms:
a(x)＝a1x+a0；
b(x)＝b1x+b0；
finite field GF ((2)n))2Is of the form, for example, of the following:
q(x)＝q2x2+q1x+q0；
subfield GF (2)n) Is of the form, for example, of the following form:
p(x)＝xn+pn-1xn-1+pn-2xn-2+...+p1x+1；
wherein q is2,q1,q0,a1,a0,b1,b0Is the sub-field GF (2)n) Element of (1), pn-1,pn-2,...,p1Is an element of the subfield GF (2) and the clock signal clk is a single bit (bit) value.
(2) Output port: as shown in fig. 1, the output port c is for outputting the finite field GF ((2)n))2The multiplication of (a), (x) and (b), (x) of (a), (x) × b (x)) mod (q (x)) which is a modulo operation, and (c (x)) can be expressed in the form of (c), (x) c (x)) as the operation result output port1x+c0Wherein c is1,c0Is the sub-field GF (2)n) The above elements.
(3) The controller 11: as shown in fig. 1, the controller 11 is connected to the input ports a, b, p, q, k, the output ports c, GF (2)n) Multiplier and GF (2)n) The adders are connected to analyze the clock signal clk and call GF (2)n) Multiplier and GF (2)n) Adder for executing finite field GF ((2)n))2The multiplication of operands a (x) and b (x) above (a), (x) × b (x)) mod (q (x)) when the clock signal clk toggles from high to low and remains low, the controller 11 will notify the other associated components to enter a new clock cycle.
(4)GF(2n) The multiplier 13: GF (2) as shown in FIG. 2n) The multiplier 13 is used to invoke a multiplicative cardiac array, performing the subfield GF (2)n) Multiplication c (x) of operands a (x) and b (x) above (a (x) × b (x)) mod (p (x))n) Operands a (x), b (x) andc (x) for example has the form:
a(x)＝an-1xn-1+an-2xn-2+...+a0；
b(x)＝bn-1xn-1+bn-2xn-2+...+b0；
c(x)＝cn-1xn-1+cn-2xn-2+...+c0。
subfield GF (2)n) The multiplication of the above operands a (x) and b (x) for example comprises the following steps:
(4-1) two operands can be represented as
Figure BDA0001250545080000071
And
Figure BDA0001250545080000072
as shown in FIG. 2, aiIs stored in the cells of the first row of the multiplicative cardiac array, where i is 0, 1. bjIs the input to a multiplicative cardiac array, where j is 0, 1.
(4-2)bjEnter a from left to right in sequenceiAfter each cycle, move to the right into ai+1Wherein i is 0,1, n-1, j is 0, 1.
(4-3) in the first row of the multiplicative cardiac array, each cell calculates aibjAnd outputting the result to a unit d of a second row, wherein i is 0, 1.
(4-4) according to
Figure BDA0001250545080000073
Calculating vmjWherein m is 0,1, 2 (n-1);
(4-5) As shown in FIG. 2, every v(m+j)kThe cells of the second row will be a 1ibjOutput to third row unit ckWherein k is 0,1,.., n-1;
(4-6) when there is a new input, the cell in the third row adds the value of the input to the existing value as the new value for the cell, as shown in FIG. 2.
(4-7) at the end of all calculations, c (x) is GF (2)n) The product of the operands a (x) and b (x).
(5)GF(2n) Adder 15: GF (2) as shown in FIG. 3n) Adder 15 is used to invoke the additive cardiac array, performing subfield GF (2)n) The addition of operands a (x) and b (x) above c (x) ═ (a (x) + b (x)) mod (p (x)); subfield GF (2)n) The operands a (x), b (x) and c (x) above have, for example, the following forms:
a(x)＝an-1xn-1+an-2xn-2+...+a0；
b(x)＝bn-1xn-1+bn-2xn-2+...+b0；
c(x)＝cn-1xn-1+cn-2xn-2+...+c0。
subfield GF (2)n) The addition of operands a (x) and b (x) above comprises the steps of:
(5-1) two operands can be represented as
Figure BDA0001250545080000081
And
Figure BDA0001250545080000082
as shown in FIG. 3, biStored in a unit of an additive cardiac array, where i is 0, 1. a isjIs an input to an additive cardiac array, where j is 0, 1.
(5-2)biCorresponding to entry aiAnd calculate ai+biAnd outputting a result, wherein i is 0, 1.
(5-3) after all the calculations are finished, the result of the calculation is the subfield GF (2)n) The sum of operands a (x) and b (x).
The working process of this embodiment is described below by taking n as 4 as an example:
the controller 11 receives the clock signal clk from the clock input port k, the clock signal clk changes from high level to low level and is kept at low level, and the controller 11 notifies other associated components to enter a new oneA clock cycle. The controller 11 receives input data signals a (x), b (x), p (x), and q (x) from the data input ports a, b, p, q. Wherein a (x) and b (x) are the finite field GF ((2)4)2) The expression "a" (x) is ahx+alAnd b (x) bhx+bl，ah、al、bhAnd blIs the sub-field GF (2)4) An element of (1); p (x) and q (x) are respectively the subfields GF (2)4) And a finite field GF ((2)4)2) May be expressed as p (x) or x4+ x +1 and q (x) x2+ x + e, where e ═ 9 is GF (2)4) Is constant.
The controller 11 executes the finite field GF ((2) according to a (x), b (x), p (x) and q (x)4)2) Respectively calculate ch＝ah·bh+ah·bl+al·bhAnd cl＝e·ah·bh+al·bl. Wherein the operator "·" is the sub-field GF (2)4) Is the subfield GF (2)4) Addition of (2), GF ((2)4)2) C (x) chx+clIs the multiplication result of a (x) and b (x), chAnd clIs the sub-field GF (2)4) The above elements.
The controller 11 is processing the subfield GF (2)4) In the above multiplication or addition operation, two operands to be taken in are transmitted to GF (2)n) Multiplier 13 or GF (2)n) Adder 15 and waits for the result of the feedback to be obtained.
Under GF (2)n) In the multiplier 13, two operands can be represented as
Figure BDA0001250545080000091
And
Figure BDA0001250545080000092
aiis stored in the cells of the first row of the multiplicative cardiac array, where i is 0, 1. bjIs the input to a multiplicative cardiac array, where j is 0, 1. bjIn turn, theFrom left to right into aiAfter each cycle, move to the right into ai+1Wherein i is 0,1, 3, j is 0,1, 3. In the first row of the multiplicative cardiac array, each cell calculates aibjAnd outputting the result to the unit d in the second row, wherein i is 0,1, 3, j is 0, 1. According to
Figure BDA0001250545080000093
Calculating vijWherein i is 0,1, 6, j is 0,1, 3. Whenever v is(i+j)kThe cells of the second row will be a 1ibjOutput to third row unit ck. When there is a new input, the third row of cells adds the value of the input to the existing value as the new value for the cell. After all calculations have been completed, c (x) is the subfield GF (2)4) The product of the above operands a (x) and b (x) (i.e., the multiplication result).
Under GF (2)n) In adder 15, the two operands can be represented as
Figure BDA0001250545080000101
And
Figure BDA0001250545080000102
bistored in a unit of an additive cardiac array, where i is 0, 1. a isjIs an input to an additive cardiac array, where j is 0, 1. biCorresponding to entry aiAnd calculate ai+biAnd outputting a result, wherein i is 0,1, 3. After all calculations have been completed, the result of the calculation is the subfield GF (2)n) The sum of the operands a (x) and b (x) (i.e., the addition result).
GF(2n) Multiplier 13 or GF (2)n) The adder 15 performs the required operations and sends the result to the controller 11, and the controller 11 performs the finite field GF ((2)4)2) After multiplication, the finite field GF ((2)4)2) C (x) chx+clIs the calculation result of (a), (x) × b (x)) mod (q (x)), and the controller 11 outputs the result to the output port c.
Finally, it is worth mentioning that the finite Field multiplication apparatus 10 based on the cardiac Array according to the foregoing embodiment of the present invention may be an Application Specific Integrated Circuit (ASIC) device or a Programmable logic device such as an FPGA (Field Programmable Gate Array) device.
Although the present invention has been described with reference to a preferred embodiment, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the invention as defined by the appended claims.

Claims (8)

1. A cardiac array-based finite field multiplication apparatus, comprising:
an input port for inputting a first operand and a second operand of a finite field, a first approximate polynomial selected on a subdomain of the finite field, a second approximate polynomial selected on the finite field, and a clock signal;
a subfield multiplier for invoking a multiplicative cardiac array to perform a multiplication of the first and second operands across the subfield;
a sub-domain adder for invoking an additive cardiac array to perform an addition of the first and second operands across the sub-domain;
the controller is connected with the input port, the sub-domain multiplier and the sub-domain adder respectively and used for analyzing the clock signal, calling the sub-domain multiplier and the sub-domain adder and executing multiplication of the first operand and the second operand on the finite field; and
an output port connected to the controller for outputting the result of the multiplication of the first and second operands over the finite field;
wherein the finite field is GF ((2)n))2The subfield is GF (2)n) The multiplication of the first operand and the second operand on the finite field is (a (x) × b (x)) mod (q (x)), the multiplication on the subdomains is (e (x) × f (x)) mod (p (x)), and the addition on the subdomains is (e (x) + f (x)) mod (p (x)), wherein a (x) and b (x) respectively represent the first operand and the second operand, and e (x) and f (x) respectively represent the subdomains GF (2)n) P (x) represents the first polynomial, q (x) represents the second polynomial, mod is a modulo operation;
the first and second operands respectively have a representation over the finite field of: a (x) ═ a1x+a0，b(x)＝b1x+b0The first approximation polynomial has the expression: p (x) xn+pn-1xn-1+pn-2xn-2+...+p1x +1, the second approximation polynomial having the form: q (x) q2x2+q1x + e, wherein, a0,a1,b0,b1,q1,q2Are all elements on the sub-field, pn-1,pn-2,...,p1Are all elements on the finite field, and e is a constant on the subdomain.
2. The cardiac array-based finite field multiplication device of claim 1, wherein the input port comprises: a first operand input port and a second operand input port for inputting the first operand and the second operand, respectively, a first immediate polynomial input port for inputting the first immediate polynomial, a second immediate polynomial input port for inputting the second immediate polynomial, and a clock input port for inputting the clock signal.
3. A cardiac array based finite field multiplication apparatus as claimed in claim 1, characterized in thatCharacterized in that the result c (x) of the multiplication of said first and second operands over said finite field has the form: c (x) ═ c1x+c0Wherein c is1,c0Are elements on the sub-field.
4. The cardiac array-based finite field multiplication device of claim 1, wherein the clock signal is a single bit value.
5. The cardiac array-based finite field multiplication device of claim 1, wherein the multiplication on the sub-fields comprises the steps of:
(1) the two operands of the sub-fields are respectively represented as
Figure FDA0002441539940000021
And
Figure FDA0002441539940000022
eistored in a cell of a first row of the multiplicative cardiac array, i ═ 0,1jIs an input to the multiplicative cardiac array, j-0, 1.
(2)fjEnter e from left to right in turniAfter each cycle, move to the right into ei+1；
(3) In the first row of the multiplicative cardiac array, each cell calculates eifjAnd outputting the result to the cells of the second row;
(4) according to
Figure FDA0002441539940000031
Calculating vmjWherein m is 0,1, 2 (n-1);
(5) whenever v is(m+j)kThe cells of the second row will e 1ifjOutput to third row unit gkK is 0,1,. cndot.n-1; and
(6) when there is a new input, the cell in the third row adds the value of the input to the existing value as the new value for the cell.
6. The cardiac array-based finite field multiplication device of claim 1, wherein the addition on the subfields comprises the steps of:
(i) the first operand and the second operand are represented as
Figure FDA0002441539940000032
And
Figure FDA0002441539940000033
fiis stored in a unit of the additive heart array, i is 0,1jIs an input to the additive cardiac array, j-0, 1.., n-1; and
(ii)ficorresponding to entry eiAnd calculate ei+fiAnd outputting the result.
7. The cardiac array-based finite field multiplication device of claim 1, wherein the cardiac array-based finite field multiplication device is an application specific integrated circuit device.
8. The cardiac array-based finite field multiplication device of claim 1, wherein the cardiac array-based finite field multiplication device is a programmable logic device.
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