CN106940682B - Embedded system optimization method based on-chip programmable memory - Google Patents

Embedded system optimization method based on-chip programmable memory Download PDF

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CN106940682B
CN106940682B CN201710132267.XA CN201710132267A CN106940682B CN 106940682 B CN106940682 B CN 106940682B CN 201710132267 A CN201710132267 A CN 201710132267A CN 106940682 B CN106940682 B CN 106940682B
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programmable memory
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张瑜
胡威
刘小明
沈欢
张凯
张鸿
戴文丽
马梦东
唐玉馨
许佳佳
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Wuhan University of Science and Engineering WUSE
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Abstract

The invention discloses an embedded system optimization method based on an on-chip programmable memory, which comprises the steps of firstly analyzing and marking the running time of a storage object, then calculating the scheduling priority of the storage object, then generating a scheduling sequence of the storage object in the on-chip programmable memory based on the scheduling priority, and finally distributing storage space according to the size of the on-chip programmable storage space. The method realizes that the use frequency and the use time of the storage object are taken as parameters, the scheduling sequence of the storage object is constructed, the utilization efficiency of the on-chip programmable memory is improved, the performance of the embedded system is improved, and the energy consumption of the embedded system is reduced.

Description

Embedded system optimization method based on-chip programmable memory
Technical Field
The invention belongs to the technical field of embedded systems, and particularly relates to an embedded system optimization method based on an on-chip programmable memory.
Background
The embedded system is a special computer system which adopts the computer technology to cut software and hardware according to the application requirement, thereby meeting the customization requirement. With the continuous development of embedded systems, performance, power consumption and real-time performance have become the main requirements for embedded system design. In the design of an embedded system, the design of a storage hierarchy is very important; the advantages and disadvantages of the storage level design have great influence on the overall performance, energy consumption and implementation cost of the embedded system. The biggest impact on overall system performance is not on the execution speed of the processor, but on the speed of the memory. There is always a large speed gap between Memory and processor, namely the "Memory Wall" problem. With the increasing computing power of processors, although the access speed of the memory is also increasing, the difference is not reduced, but is increased. The speed gap between processor and storage becomes a major bottleneck affecting further system performance improvements.
Therefore, in the embedded system, the storage subsystem is always the bottleneck for improving the system performance. Furthermore, in embedded systems, the storage subsystem is also a major bottleneck for system power consumption. In embedded systems, the power consumption of the storage subsystem often reaches 50% -70% of the power consumption of the whole system. The development of SoC technology has made it possible to set a speed gap between processor and memory. The on-chip not only can integrate the memory, but also provides a high-performance on-chip bus, so that the speed of the memory can be effectively improved, and the energy consumption is reduced. On a SoC, the memory will occupy more than 50% of the on-chip area. The use of on-chip memory can effectively reduce system power consumption and improve overall performance. Thus, memory is integrated on many embedded processors.
In embedded systems, DRAM and SRAM are the two most commonly used types of memory. SRAM is 10-100 times faster than DRAM, but is also more than 20 times more expensive than DRAM. Thus, in embedded systems, DRAM is typically used as a large capacity memory hierarchy, while smaller SRAM is provided to store the most common data to reduce runtime. Systems with SRAM tend to perform more than 20% better than systems using DRAM alone. This performance gap will grow larger and larger as SRAM speeds will increase by 60% per year and DRAM speeds can only increase by 7% per year. In the multi-level memory hierarchy of the embedded system, the on-chip programmable memory is an SRAM integrated on-chip, and in some cases, a DRAM may be used. The on-chip programmable memory is different from the cache and is controlled by software, and a programmer can realize the control of the on-chip programmable memory through programming or carry out optimization during compiling and running.
Optimization is performed by means of on-chip programmable memories, whose fundamental goal is to allocate program fragments (including code or data) to the address space of the on-chip programmable memory. All these program fragments are called storage objects (MemoryOjbect). Since the size of the on-chip programmable memory is limited, the number of memory objects that can be allocated to the on-chip programmable memory is also limited. The optimization method needs to select the most appropriate memory object from the program according to the size of the on-chip programmable memory to complete the distribution of the on-chip programmable memory. In the conventional allocation method, the frequency of use of the storage objects is usually focused, and the basic judgment basis for allocation is determined according to the magnitude of the frequency of use of the storage objects. However, the usage of the storage object is not only frequency-dependent but also time-dependent, such as the usage time of the storage object.
Disclosure of Invention
The invention aims to provide an embedded system optimization method based on an on-chip programmable memory, which calculates the scheduling priority of a storage object by taking the use frequency, the use time and the like of the storage object as parameters, then constructs the scheduling sequence of the storage object and completes the optimized allocation of the on-chip programmable memory.
The technical scheme adopted by the invention is as follows: an embedded system optimization method based on an on-chip programmable memory comprises the following steps:
step 1: analyzing and marking the running time of the storage object;
each memory object is a segment of a program, which is either code, data, or a mixture of code and data;
for one program P, the set of all storage objects generated after compilation is MO (P) ═ MO (MO)0,MO1,MO2,…,MOn-1) There are n storage objects; for storage object MO in MO (P)iIn particular, the storage object MOiIs denoted as F (MO)i) Represents a storage object MOiThe number of uses during the running of the program P; storage object MOiThe starting time of each use is recorded as Tj(MOi) Indicating that the program P uses the storage object MO for the jth timeiThe starting time of (a);
step 2: calculating the scheduling priority of the storage object;
and step 3: generating a scheduling sequence of the storage object in the on-chip programmable memory;
and 4, step 4: allocation of on-chip programmable memory space.
Compared with the background technology, the invention has the beneficial effects that:
the invention relates to an embedded system optimization method based on an on-chip programmable memory, which mainly has the functions of analyzing and marking the running time of a storage object in a program, calculating the scheduling priority of the storage object by taking the use frequency, the use time and the like of the storage object as parameters, generating a scheduling sequence of the storage object based on the scheduling priority of the storage object, and finally performing the optimized allocation of the on-chip programmable storage space.
(1) High efficiency. The method realizes comprehensive optimization design based on various parameters such as the use frequency, the use time and the like of the storage object, constructs a scheduling sequence of the storage object, improves the utilization efficiency of the on-chip programmable memory and improves the performance of an embedded system;
(2) the power consumption is low. The method realizes the high-efficiency utilization of the on-chip programmable memory, effectively improves the distribution efficiency of the storage object and reduces the power consumption of the embedded system.
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FIG. 1 is a flow chart of an embodiment of the present invention.
Detailed Description
In order to facilitate the understanding and implementation of the present invention for those of ordinary skill in the art, the present invention is further described in detail with reference to the accompanying drawings and examples, it is to be understood that the embodiments described herein are merely illustrative and explanatory of the present invention and are not restrictive thereof.
Referring to fig. 1, the method for optimizing an embedded system based on an on-chip programmable memory provided by the present invention includes the following steps:
firstly, analyzing and marking the running time of a storage object;
the program generates a storage object when compiling, and the storage object is a memory object which can be called into the on-chip programmable memory when the program runs. Each storage object is a segment of a program, which may be code, data, or a mixture of code and data. For one program P, the set of all storage objects generated after compilation is MO (P) ═ MO (MO)0,MO1,MO2,…,MOn-1) There are n memory objects. For storage object MO in MO (P)iIn particular, the storage object MOiIs denoted as F (MO)i) Represents a storage object MOiThe number of uses during the running of the program P; storage object MOiThe starting time of each use is recorded as Tj(MOi) Indicating that the program P uses the storage object MO for the jth timeiThe starting time of (c).
For the program Pro, there are 5 storage objects generated after compilation, and the set of all storage objects is MO (Pro) ═ MO (MO)0,MO1,MO2,…,MO4). The following table 1 shows the storage objects for mo (pro):
TABLE 1
Figure BDA0001240386100000031
Figure BDA0001240386100000041
In table 1, the starting time of each use of a certain memory object by the program Pro is represented by the form (a, b), where a represents the time at which the program Pro uses the memory object for the second time, and b represents the starting time of the use of the memory object by the program P. For example, for a storage object MO0In other words, (2,4) denotes a storage object MO0The starting time when the 2 nd use by the program Pro is 4; for storage ofStorage object MO4In other words, (2,5) denotes a storage object MO4The starting time when the 2 nd use by the program Pro is 5.
Secondly, calculating the scheduling priority of the storage object;
for storage object MO in MO (P)iStoring an object MOiA common program P is used m times, m is more than or equal to 2, and a storage object MO is calculatediThe scheduling priority of (2). Storage object MOiThe method for calculating the scheduling priority comprises the following steps:
Figure BDA0001240386100000042
in the above formula, Pri (MO)i) Representing a storage object MOiThe scheduling priority of (2). Pri (MO)i) The larger the value of (A) is, the storage object MO is representediThe higher the scheduling priority.
The scheduling priorities for the individual memory objects in the program Pro are shown in table 2 below:
TABLE 2
Storing objects Scheduling priority
MO0 0.600
MO1 0.067
MO2 0.036
MO3 0.111
MO4 0.208
Thirdly, generating a scheduling sequence of the storage object in the on-chip programmable memory;
and according to the scheduling priority of the storage objects calculated in the second step, all the storage objects in MO (P) are sorted in a descending order according to the scheduling priority of the storage objects to form a storage object set A (P). All the storage objects in the storage object set A (P) are arranged according to the descending order of the scheduling priority of the storage objects, namely:
A(P)＝(MO′0,MO′1,MO′2,…,MO′n-1)
the sequence formed by all the storage objects in the storage object set A (P) according to the descending arrangement of the scheduling priority of the storage objects is marked as Q (P), and Q (P) is the scheduling sequence of the storage objects in the on-chip programmable memory.
According to table 2, the storage objects of the program Pro are arranged in descending order according to the scheduling priority of the storage objects, and the storage object set a (Pro) ═ MO (MO) is formed0,MO4,MO3,MO1,MO2),Q(Pro)＝{MO0,MO4,MO3,MO1,MO2}。
Fourthly, distributing the on-chip programmable storage space;
for an on-chip programmable memory S that can accommodate r memory objects, the on-chip programmable memory S also has an on-chip programmable storage space of r. The on-chip programmable memory S has an on-chip programmable memory space unit number S0To Sr-1. The storage object set A (P) of the program P allocates on-chip programmable storage space for the storage objects in the storage object set A (P) at the time of operation:
if r is greater than or equal to n, it indicates that the on-chip programmable memory S has an on-chip programmable storage space capable of accommodating all the storage objects in the storage object set a (p). Therefore, if r is greater than or equal to n, all memory objects in the memory object set A (P) are stored in the on-chip programmable memory space. The allocation of on-chip programmable memory space is complete.
If r is smaller than n, it indicates that the on-chip programmable memory S has an on-chip programmable storage space that cannot accommodate all of the storage objects in the storage object set a (p). Therefore, if r is smaller than n, the on-chip programmable memory space is allocated in the following manner:
a) storing the first r memory objects in Q (P) into an on-chip programmable memory space;
b) at a certain time t before the execution of the program P is completed, there are 1 memory objects MO u Has been used by the program P, and no longer needs to be stored in the on-chip programmable memory space unit SkAt this time, 1 storage object is selected from the r +1 storage object in q (p), and this storage object satisfies the condition C1: the starting time with the largest scheduling priority among n-r-1 memory objects starting with the r +1 memory object in q (P) and last used by program P is greater than t. If a storage object MO satisfying the condition is foundvThen the storage object MO meeting the conditionvStore to storage object MO u On-chip programmable memory space unit SkIn (1).
c) During the running of the program P, step b) is repeated until there is no memory object satisfying the condition C1. The allocation of on-chip programmable memory space is complete.
For an on-chip programmable memory S that can accommodate 5 memory objects, the on-chip programmable memory S also has an on-chip programmable memory space of 5. The on-chip programmable memory S has an on-chip programmable memory space unit number S0To S4. The storage object set a (Pro) of the program Pro allocates the on-chip programmable storage space for the storage objects in the storage object set a (Pro) at run-time. Because r is equal to n is equal to 5, MO is added0,MO4,MO3,MO1,MO2All stored in on-chip programmable memory spaceThe allocation of (2) is complete.
For an on-chip programmable memory S that can accommodate 3 memory objects, the on-chip programmable memory S also has an on-chip programmable memory space of 3. The on-chip programmable memory S has an on-chip programmable memory space unit number S0To S2. The storage object set a (Pro) of the program Pro allocates the on-chip programmable storage space for the storage objects in the storage object set a (Pro) at run-time. Since r is 3, n is 5, and r is smaller than n, it indicates that the on-chip programmable memory S has an on-chip programmable storage space that cannot accommodate all the storage objects in the storage object set a (pro). Therefore, the on-chip programmable memory space is allocated in the following way:
a) MO storing the first 3 storage objects in Q (Pro)0,MO4,MO3Respectively stored to on-chip programmable memory space units S0，S1And S2Performing the following steps;
b) at some point before the execution of the program Pro is completed t-7, there are 1 memory objects MO 0 Has been used by the program Pro and no longer needs to be stored in the on-chip programmable memory space unit S0At this time, 1 memory object is selected from the 4 th memory object in q (pro), and this memory object satisfies the condition C1: in MO1And MO2The starting time of the two memory objects having the greatest scheduling priority and being used last by the program Pro is greater than 7. According to tables 1 and 2, the object MO is stored1Has a higher scheduling priority than the storage object MO2And storing the object MO1If the last time the program Pro was used is 12, then the storage object satisfying this condition is found to be the storage object MO1A storage object MO satisfying the condition1Store to storage object MO 0 On-chip programmable memory space unit S0In (1).
c) At some point before the execution of the program Pro is completed, t is 12, there are 1 memory objects MO 1 Has been used by the program Pro and no longer needs to be stored in the on-chip programmable memory space unit S0At this time, from the second of Q (Pro)Starting with 5 memory objects, 1 memory object is selected, and this memory object satisfies the condition C1: in MO2The starting time of this memory object, which has the greatest scheduling priority and which was last used by the program Pro, is greater than 12. According to tables 1 and 2, only the storage object MO is present at this time1Is not stored to the on-chip programmable memory space, and stores an object MO2The last time the starting time of use by the program Pro is 16, then the storage object meeting this condition is found to be the storage object MO2A storage object MO satisfying the condition2Store to storage object MO 0 On-chip programmable memory space unit S0In (1).
d) At some point before the execution of the program Pro is completed, t is 14, there are 1 memory objects MO 4 Has been used by the program Pro and no longer needs to be stored in the on-chip programmable memory space unit S1At this time, the object MO is stored0，MO1，MO4All have been used, store the object MO2And MO3Is storing on-chip programmable memory space unit S0And S2There are no memory objects that need to be allocated to the on-chip programmable memory space. The allocation of on-chip programmable memory space is complete.
It should be understood that parts of the specification not set forth in detail are well within the prior art.
It should be understood that the above description of the preferred embodiments is given for clarity and not for any purpose of limitation, and that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the invention as defined by the appended claims.

Claims (1)

1. An embedded system optimization method based on an on-chip programmable memory is characterized by comprising the following steps:
step 1: analyzing and marking the running time of the storage object;
each memory object is a segment of a program, which is either code, data, or a mixture of code and data;
for one program P, the set of all storage objects generated after compilation is MO (P) ═ MO (MO)0,MO1,MO2,…,MOn-1) There are n storage objects; for storage object MO in MO (P)iIn particular, the storage object MOiIs denoted as F (MO)i) Represents a storage object MOiThe number of uses during the running of the program P; storage object MOiThe starting time of each use is recorded as Tj(MOi) Indicating that the program P uses the storage object MO for the jth timeiThe starting time of (a);
step 2: calculating the scheduling priority of the storage object;
wherein the object MO is storediThe method for calculating the scheduling priority comprises the following steps:
Figure FDA0002428075970000011
Pri(MOi) Representing a storage object MOiM denotes a storage object MOiThe number of times of use of the program P is totally equal to or more than 2; pri (MO)i) The larger the value of (A) is, the storage object MO is representediThe higher the scheduling priority;
and step 3: generating a scheduling sequence of the storage object in the on-chip programmable memory;
according to the dispatching priority of the storage objects, all the storage objects in the MO (P) are arranged in a descending order according to the dispatching priority of the storage objects to form a storage object set A (P); all the storage objects in the storage object set A (P) are arranged according to the descending order of the scheduling priority of the storage objects, namely:
A(P)＝(MO′0,MO′1,MO′2,…,MO′n-1)
a sequence formed by all storage objects in the storage object set A (P) according to the descending arrangement of the scheduling priority of the storage objects is marked as Q (P), wherein Q (P) is the scheduling sequence of the storage objects in the on-chip programmable memory;
and 4, step 4: allocating on-chip programmable memory space;
for the on-chip programmable memory S capable of accommodating r storage objects, the on-chip programmable storage space of the on-chip programmable memory S is also r; the on-chip programmable memory S has an on-chip programmable memory space unit number S0To Sr-1(ii) a The storage object set A (P) of the program P allocates on-chip programmable storage space for the storage objects in the storage object set A (P) at the time of operation:
if r is larger than or equal to n, all storage objects in the storage object set A (P) are stored in the on-chip programmable storage space; completing the distribution of the on-chip programmable storage space;
if r < n, the allocation mode of the on-chip programmable storage space is as follows:
a) storing the first r memory objects in Q (P) into an on-chip programmable memory space;
b) at a certain time t before the execution of the program P is completed, there are 1 memory objects MO u Has been used by the program P, and no longer needs to be stored in the on-chip programmable memory space unit SkAt this time, 1 storage object is selected from the r +1 storage object in q (p), and this storage object satisfies the condition C1: the starting time with the largest scheduling priority among n-r-1 memory objects starting from the (r + 1) th memory object in Q (P) and used by the program P for the last time is greater than t; if a storage object MO satisfying the condition is foundvThen the storage object MO meeting the conditionvStore to storage object MO u On-chip programmable memory space unit SkPerforming the following steps;
c) repeating step b) during the running of the program P until no storage object satisfying the condition C1 exists; the allocation of on-chip programmable memory space is complete.
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