CN106788510B - A kind of receiver - Google Patents
A kind of receiver Download PDFInfo
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- CN106788510B CN106788510B CN201611227157.3A CN201611227157A CN106788510B CN 106788510 B CN106788510 B CN 106788510B CN 201611227157 A CN201611227157 A CN 201611227157A CN 106788510 B CN106788510 B CN 106788510B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/06—Receivers
- H04B1/16—Circuits
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Abstract
This application provides a kind of receivers, comprising: alignment control unit, the road m transmission path, multichannel deposit selection control unit, sign pulse generator and storage unit.Alignment control unit is used to generate the alignment control signal including phase value and deviant.Multichannel deposit selection control unit is used to generate the selection signal of the road m transmission path according to phase value.Any one transmission paths in the transmission path of the road m export the sequence received in the case where the selection signal received is the first numerical value, in the case where the selection signal received is second value, will export after one sampled point of sequence delays received.After sign pulse generator is used to pre-set pulse launch time postponing deviant sampled point, pulse signal is issued.Storage unit is used for after receiving the pulse signal, stores the splicing sequence of the road m transmission path output sequence.Receiver realizes the parallel processing of sequence, therefore can reduce processing delay.
Description
Technical field
This application involves the communications field more particularly to a kind of receivers.
Background technique
With orthogonal frequency division multiplexing (Orthogonal Frequency Division Multiplexing, OFDM) for principle
Channel coding/decoding and modulation-demo-demodulation method be widely used on the various wired and wireless communications fields, OFDM technology is gathered around
There are the advantages such as the availability of frequency spectrum is high, and resistance intersymbol interference is strong, and be easy to implement using modern signal processing, is also gathered around
There is the advantage of low cost and low-power consumption.
The available frequency spectrum of whole system is divided into many subcarriers by OFDM technology, and each subcarrier is according to transmission channel
Quality, different sequence amounts can be carried.Therefore ofdm system after start up, needs to establish a set of hold in local side and terminal
The mechanism of hand and initialization, Lai Jinhang protocol negotiation, channel discovery is trained and parameter exchanges, after completing these stages, ability
Into the sequence traffic intercommunication stage.Local side and terminal are in entire initialization mechanism, therefore, to assure that sequence is transmitted with discrete overloading
The form of wave (Discrete Multi-Tone, DMT) boundary alignment sends and receives, and if there is deviation, will lead to ofdm signal
Reducing in the signal-to-noise ratio of receiving side signal can not even restore.
And existing alignment schemes, after usually the sequence of at least two symbol periods received is all stored, then into
Then row registration process issues follow-up equipment again, therefore has biggish time delay.
Summary of the invention
This application provides a kind of receivers, it is therefore intended that solves the problems, such as that existing sequence alignment method time delay is big.
To achieve the goals above, this application provides following technical schemes:
A kind of receiver, comprising: alignment control unit, the road m transmission path, multichannel deposit selection control unit, symbol arteries and veins
Rush generator and storage unit.The alignment control unit for generating alignment control signal, the control signal include to
The phase value that the multichannel deposit selection control unit is sent, and the deviant sent to the sign pulse generator,
In, the integer part of S/m adds 1 for the deviant, and the complementing part of S/m is the phase value, the S be receive it is serial
Delay skew of the sequence compared with preset reference sequences, the serial sequence received are divided into the road m sequence.The multichannel
Deposit selection control unit is used to generate the selection signal of the road m transmission path, the road the m transmission according to the phase value
The binary system splicing value of the selection signal in path is 2(m-P)- 1, wherein P is the phase value.Appointing in the transmission path of the road m
A transmission paths of anticipating are used for transmission the sequence all the way in the sequence of the road m, any one transmission in the transmission path of the road m
Path is different from the sequence of other transmission paths.Any one transmission paths are first in the selection signal received
In the case where numerical value, the sequence received is exported, in the case where the selection signal received is second value, by the reception
To one sampled point of sequence delays after export.The sign pulse generator is for prolonging pre-set pulse launch time
After slow t sampled point, pulse signal is issued, t is the deviant.The storage unit is for receiving the pulse signal
Afterwards, the splicing sequence of the road the m transmission path output sequence is stored.As it can be seen that receiver carries out sequence using the road m transmission path
Timing adjustment, it is thereby achieved that the parallel processing of sequence, thus realize the registration process in a symbol period, without etc.
It is aligned again at least two symbol periods, therefore can reduce processing delay.Also, because reducing the storage of symbol
Amount, it is therefore not necessary to use the memory of large capacity.Further, because of " fine tuning " in multiplexing path, additionally it is possible to effectively drop
The main clock frequency at low local side or terminal processes end, realization reduce system power dissipation on the basis of not reducing data throughout.
In one implementation, the storage unit includes: first memory, second memory and biased witch.Institute
Biased witch is stated to be used for, after receiving the pulse signal, the selection target from the first memory and second memory
Memory, and by the storage of the splicing sequence of the road the m transmission path output sequence into the target memory.Due to offseting away
The effect of pass, sequence are stored in first memory and second memory in turn, therefore, store sequence in a memory
In the process, stored sequence can first issue follow-up equipment in another memory, thus speed up processing.
In one implementation, further includes: concatenation unit, for the road the m transmission path output sequence to be spelled
It connects, and spliced sequence is issued into the storage unit, the length of spliced sequence is no more than the target memory
Bit wide.
In one implementation, further includes: sequence split cells, for receiving the serial sequence, and by the string
Row sequence average is divided into the road m sequence.
In one implementation, the alignment control unit is also used to: the sequence that the memory is exported is as institute
The serial sequence received is stated, alternatively, obtaining the serial sequence received from the sequence split cells.
In one implementation, the alignment control unit includes: the alignment control for generating alignment control signal
Unit processed is specifically used for, and the sequence and reference sequences received by comparing sequence split cells obtains time delay between the two
S is deviated, by calculating S/m, the integer part of obtained result adds 1 for deviant, and complementing part is phase value.
Detailed description of the invention
In order to illustrate the technical solutions in the embodiments of the present application or in the prior art more clearly, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
Some embodiments of application for those of ordinary skill in the art without creative efforts, can be with
It obtains other drawings based on these drawings.
Fig. 1 is the exemplary diagram of ofdm communication system；
Fig. 2 is a kind of structural schematic diagram of receiver disclosed in the embodiment of the present application；
Fig. 3 is the functional schematic of the sequence split cells in receiver disclosed in the embodiment of the present application；
Fig. 4 is the work flow diagram of the alignment control unit in receiver disclosed in the embodiment of the present application；
Fig. 5 is the signal of alignment control unit the acquisition deviant and phase value in receiver disclosed in the embodiment of the present application
Figure；
Fig. 6 is the functional schematic of the transmission path in receiver disclosed in the embodiment of the present application；
Fig. 7 is the structural schematic diagram of another receiver disclosed in the embodiment of the present application；
Fig. 8 is the functional effect figure of receiver disclosed in the embodiment of the present application.
Specific embodiment
Fig. 1 is an example of ofdm communication system, and in Fig. 1, the communication media between local side and terminal includes copper double
Twisted wire, multiport layout are used to offset not collinear various crosstalks, the technical requirements multiport using vector Vector technology
When with a bundle of twisted pair transmitting-receiving, it is to be ensured that discrete multitone, DMT (Discrete Multi-Tone, DMT) symbol of each port
It is also alignment.In Fig. 1, a sine wave indicates the time domain sequences of a symbol, since wire length postpones different and each office
The different delays at end and terminal inner processing, can make local side or terminal in channel time domain sequential sampling, between multiport
Have delay.
Present applicant proposes a kind of receivers, can be used in terminal or local side shown in Fig. 1.Purpose is, makes
The sequence that receives of different port is aligned with pre-set reference sequences, with realize sequence that different port receives it
Between alignment.
Below in conjunction with attached drawing, the receiver proposed to the application is described in detail.
Fig. 2 show a kind of receiver of the embodiment of the present application proposition, including: sequence split cells, alignment control
Unit, the road m transmission path, multichannel deposit selection control unit, sequence assembly unit, sign pulse generator, biased witch with
And first memory, second memory.
The course of work of receiver shown in Fig. 2 includes:
Serial sequence is equally divided into the road m after receiving sequence (such as sine wave shown in FIG. 1) by sequence split cells
Sequence, and send the road m sequence in the transmission path of the road m.Wherein, sequence corresponds to a transmission paths all the way.That is, m
The sequence of any one transmission paths transmission in the transmission path of road is different from the sequence of other transmission paths.
For example, as shown in figure 3, the sequence that arrives of sequence split cells serial received be [4094,4095,0,1,2,3,
4,5 ... ..4091,4092,4093] (each of sequence numerical value indicates a sampled point, in practical business, one
Sample point sampling N bit data), by it according to putting in order, every four numerical value is one group and is grouped, obtained sequence of packets
Respectively [4094,4095,0,1], [2,3,4,5], [6,7,8,9] ... [4090,4091,4092,4093], each point
First numerical value in group is first via sequence, is sent to first via transmission path, and second numerical value is the second tunnel sequence, quilt
It is sent to the second tunnel transmission path, and so on, the 4th numerical value is the 4th Lu Xulie, is sent to the 4th tunnel transmission path.
It should be noted that the length of the road m sequence can not also other than serial sequence to be equally divided into the road m sequence
Together.For example, the length of the preceding road m-1 sequence is identical, and the length of the road m sequence be less than the preceding road m-1 sequence length (probably due to
The sequence received is long as the sequence of the preceding road m-1 insufficient for the road m sequence).
Alignment control unit is for generating alignment control signal, specifically, executing process as shown in Figure 4, including following
Step:
S401: the sequence and reference sequences received by comparing sequence split cells, the time delay obtained between the two are inclined
Move S.
It illustrates, it is assumed that reference sequences [0,1,2,3,4,5 ... .., 4090,4091,4092,4093,4094,
4095], the sequence received is illustrated in figure 3 [4094,4095,0,1,2,3,4,5 ... ..4091,4092,4093], then when
Prolonging offset S is 2.
It should be noted that reference sequences can be stored in advance in alignment control unit, sequence split cells is received
Sequence alignment control unit can be issued by sequence split cells, can also directly be received and be obtained by alignment control unit, two
Kind mode is as shown with a dotted line in fig. 2.
S402: calculating S/m, and the integer part of obtained result adds 1 for deviant, and complementing part is phase value.
For example, S is 2, and in the case that the quantity m of transmission path is 4, deviant 1, phase value 2.
It should be noted that other than the mode (software calculating) shown in the S402, as shown in figure 5, can also be by hard
Part circuit, the sequence that sequence split cells is received and reference sequences carry out convolutional calculation, obtain deviant and phase value, have
The convolution algorithm of body may refer to the prior art, and which is not described herein again.
S403: phase value is issued into multichannel deposit selection control unit, deviant is issued into sign pulse generator.
Multichannel deposit selection control unit generates the selection signal for the road m transmission path according to the phase value received,
And selection signal is applied to one by one in corresponding transmission path.Specifically, the relationship of m selection signal and phase value are as follows:
{sel_1,sel_2,sel_3,…,sel_m-1,sel_m}bin=2(m-P)-1
Wherein, sel_1, sel_2, sel_3 ..., sel_m-1, sel_m are respectively the choosing on the 1st road to the road m transmission path
Signal is selected, each selection signal is 1bit, the selection signal of these 1bit, (bin indicates that binary system is spelled according to binary system splicing
Connecing) value got up is 2(m-P)- 1, P are the phase value that multichannel deposit selection control unit receives.
Example is connected, in the case that phase value is 2, the binary numeral that the selection signal of four tunnel transmission paths is spliced into is 2(m-P)- 1=3, then the selection signal of four tunnel transmission paths is sel_1=0, sel_2=0, sel_3=1, sel_4=1.
In practical applications, multichannel deposit selection control unit can be looked into from pre-stored table according to phase value
Ask out the selection signal of transmission path.For example, in the case that table 1 is four tunnel transmission paths, phase value and selection signal it is optional
The corresponding relationship selected.In the case that table 2 is seven tunnel transmission paths, the selectable corresponding relationship of phase value and selection signal.
Table 1
Table 2
It include delayer and selector in any transmission path all the way in the transmission path of the road m.Delayer is for passing this
One sampled point of sequence delays on defeated path.In two input terminals of selector, one is used for one sampled point of input delay
Sequence afterwards, another is for inputting not delayed sequence.Selector determines two list entries of output according to selection signal
Which of sequence.
Example is connected, as shown in fig. 6, after four road sequence inputtings, four tunnel transmission path shown in Fig. 3, per transmission path all the way
On delayer to one sampled point of sequence delays on the path.Because of sel_1=0, sel_2=0, so, the first via
The selector of transmission path and the second tunnel transmission path exports sequence not delayed on this path.Again because of sel_3=1,
Sel_4=1, so, the selector of third road transmission path and the 4th tunnel transmission path exports delayed device on this path and prolongs
The sequence to lag.It is equivalent to the 3rd road and the 4th tunnel transmission path in this way, relative to inputting in the 1st road and the 2nd tunnel transmission path
Sequence have the delay of a sampled point, as shown in Fig. 6 left and right side, left side is the sequence of input, and right side is the sequence of output
Column, by taking the 2nd group of output [2,3,0,1] as an example, than the 2nd group input [2,3,4,5] delays two sampled points.Therefore, in sequence
Concatenation unit can be sequentially written in sequence memory according to [0,1,2,3] is such, be achieved that within 4 sampled point offsets
" fine tuning ".
For the road m sequence after transmission path list entries concatenation unit, sequence assembly unit splices the road m sequence, tool
Body, the length of splicing according to pre-set length subject to, pre-set length is arranged according to the bit wide of subsequent memory,
Rule is that pre-set length is not more than the bit wide of memory.
Connect example, it is assumed that the bit wide of first memory and second memory is 8 sampled point * 16=128bit, then sequence is spelled
The sequence of tetra- tunnel transmission path of order Yuan Jiang output is spliced: the 1st group of four circuit-switched datas [4092,4093,4094,4095]+
2nd group of four numbers [0,1,2,3] are spliced into serial data 4092,4093,4094,4095,0,1,2,3.3rd group of four numbers
Serial data 4,5,6,7,8,9,10,11 is spliced into according to [4,5,6,7]+the 4 groups of four circuit-switched datas [8,9,10,11].With such
It pushes away, obtains serial data [4092,4093,4094,4095,0,1,2,3,4,5 ... .., 4090,4091].As can be seen that after splicing
Data compared with reference sequences, be advanced by a sampled point.
Optionally, because spliced sequence will be stored in memory, it further include depositing in receiver shown in Fig. 2
Reservoir writes timing and generates control unit, for generating the control signal for memory.When sequence assembly unit and memory are write
The working principle that sequence generates control unit may refer to the prior art, and which is not described herein again.
Sign pulse generates unit and is used to emit periodical pulse signal, will be pre-set after receiving deviant
After pulse launch time postpones t sampled point, pulse signal is issued, t is deviant.
Example is connected, sign pulse generates unit and provides that every 250 microsecond sends an arteries and veins according to the character rate agreement of OFDM
Signal is rushed, the deviant of alignment control unit output is 1, the time delay that then symbol impulse generating unit sends sign pulse
One sampled point.
After biased witch receives pulse signal, the sequence received is stored in target memory.The target is deposited
Reservoir is one in first memory and second memory.After biased witch receives pulse signal, in first memory
With selection target memory in second memory.
Example is connected, because of one sampled point of time delay that sign pulse is sent, biased witch receives pulse letter
After number, by 0,1,2,3 storage into first memory, after biased witch receives pulse signal again, by 4,5,6,7,8,9,
10,11 storages are into second memory.
And so on, it is 0,1,2,3,4,5,6,7,8,9 that the sequence assembly stored in first memory and memory, which gets up,
10,11……..As it can be seen that the sequence received is realized with reference sequences and is aligned.
Due to the effect of biased witch, sequence is stored in first memory and second memory in turn.The present embodiment
The purpose that middle setting first memory and second memory store in turn is, during a memory stores sequence,
Stored sequence can first issue follow-up equipment in another memory, thus speed up processing.
Certainly, a memory also can be set in receiver, as shown in fig. 7, include a memory in receiver, because
This, is not necessarily to biased witch.In Fig. 7, spliced sequence is directly entered in memory, and memory connects according to the pulse received
After receiving pulse signal, the sequence received is stored in target memory.
Other than not the having to of memory, the difference of receiver shown in Fig. 7 and receiver shown in Fig. 2 is also resided in:
In first symbol period, the phase value and deviant of alignment control unit output are 0, i.e. receiver does not dock
The sequence received carries out registration process, and alignment control unit obtains the sequence that sequence split cells receives from memory, and
It is compared with reference sequences, obtains deviant and phase value, since second symbol period, the sequence received is carried out
Registration process.The advantages of alignment control unit obtains sequence from memory is, in subsequent symbol period, alignment control unit
The effect of alignment control can be verified according to the sequence obtained from memory, and constantly the sequence that receives of corrected received device with
The offset of reference sequences so far.
Fig. 2 and receiver shown in Fig. 7 for sequence alignment effect as shown in figure 8, where it is assumed that receiver receives
Original series be [4094,4095,0,1,2,3,4,5 ... ..4091,4092,4093], here with two symbol sebolic addressing DMT
For symbol 0 and DMT symbol 1, each symbol sebolic addressing is compared with reference sequences, and there are two the deviations of sampled point.Such as
Preceding described, the calculated phase value of alignment control unit is 2, deviant 1, then after the registration process of receiver, sequence
Become [0,1,2,3,4,5 ... .., 4090,4091,4092,4093,4094,4095].Specifically, receiver first carries out phase
Value adjustment, as shown in figure 8, after adjustment, DMT symbol 0 and DMT symbol 1 become [4092,4093,4094,4095,
0,1,2,3,4,5 ... ..4091], then carry out deviant adjustment, in Fig. 7 by taking first symbol sebolic addressing as an example, after adjustment, sequence
Become [0,1,2,3,4,5 ... .., 4090,4091,4092,4093,4094,4095].It should be noted that as shown in figure 8,
The 4092 of previous sequence, 4093,4094,4095 are actually dropped, and the 4092 of the latter sequence, 4093,4094,4095 by simultaneously
Enter in previous sequence.
Because receiver described herein carries out " fine tuning " to sequence using the road m transmission path, it is thereby achieved that sequence
Parallel processing, so as to realize the registration process in a symbol period, without wait at least two symbol periods again
It is aligned, therefore can reduce processing delay.Also, because reducing the amount of storage of symbol, it is therefore not necessary to use large capacity
Memory.
Further, because of " fine tuning " in multiplexing path, additionally it is possible to be effectively reduced local side or terminal processes end when
Clock dominant frequency, realization reduce system power dissipation on the basis of not reducing data throughout.
Each embodiment in this specification is described in a progressive manner, the highlights of each of the examples are with it is other
The difference of embodiment, same or similar part may refer to each other between each embodiment.
Claims (6)
1. a kind of receiver characterized by comprising
Alignment control unit, the road m transmission path, multichannel deposit selection control unit, sign pulse generator and storage unit；
The alignment control unit includes that selection control is deposited to the multichannel for generating alignment control signal, the control signal
The phase value that unit processed is sent, and the deviant sent to the sign pulse generator, wherein the integer part of S/m adds 1
For the deviant, the complementing part of S/m is the phase value, and dividend S is the serial sequence received and pre- in the S/m
If the delay skew compared of reference sequences, the serial sequence received is divided into the road m sequence；
The multichannel deposit selection control unit is used to generate the selection signal of the road m transmission path according to the phase value,
The binary system splicing value of the selection signal of the road m transmission path is 2(m-P)- 1, wherein P is the phase value；
Any one transmission paths in the transmission path of the road m are used for transmission the sequence all the way in the sequence of the road m, the m
Any one transmission paths in the transmission path of road are different from the sequence of other transmission paths；Any one transmission road
Diameter exports the sequence received, is in the selection signal received in the case where the selection signal received is the first numerical value
In the case where second value, it will be exported after described one sampled point of the sequence delays received；
After the sign pulse generator is used to pre-set pulse launch time postponing t sampled point, pulse letter is issued
Number, t is the deviant；
The storage unit is used for after receiving the pulse signal, stores the splicing of the road the m transmission path output sequence
Sequence.
2. receiver according to claim 1, which is characterized in that the storage unit includes:
First memory, second memory and biased witch；
The biased witch is used for, and after receiving the pulse signal, is selected from the first memory and second memory
Target memory is selected, and by the storage of the splicing sequence of the road the m transmission path output sequence into the target memory.
3. receiver according to claim 2, which is characterized in that further include:
Spliced sequence for splicing the road the m transmission path output sequence, and is issued institute by sequence assembly unit
Storage unit is stated, the length of spliced sequence is not more than the bit wide of the target memory.
4. receiver according to any one of claims 1 to 3, which is characterized in that further include:
Sequence split cells is equally divided into the road m sequence for receiving the serial sequence, and by the serial sequence.
5. receiver according to claim 4, which is characterized in that the alignment control unit is also used to:
The serial sequence that the sequence that the memory exports is received as described in, alternatively, being obtained from the sequence split cells
To the serial sequence received.
6. receiver according to claim 4, which is characterized in that the alignment control unit is for generating alignment control letter
Number include:
The alignment control unit is specifically used for, and the sequence and reference sequences received by comparing sequence split cells obtains
Delay skew S between the two, by calculating S/m, the integer part of obtained result adds 1 for deviant, and complementing part is phase
Place value.
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| CN201611227157.3A CN106788510B (en) | 2016-12-27 | 2016-12-27 | A kind of receiver |
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| US20020114416A1 (en) * | 2000-06-02 | 2002-08-22 | Enam Syed K. | Phase alignment of data to clock |
| CN1842057A (en) * | 2005-04-01 | 2006-10-04 | 华为技术有限公司 | Signal disconnection and combination method and apparatus |
| CN102497231A (en) * | 2011-12-09 | 2012-06-13 | 中国科学院长春光学精密机械与物理研究所 | Application method of optical channel binding technology in high-speed optical fiber communication |
| CN104158822A (en) * | 2014-08-29 | 2014-11-19 | 中国航空无线电电子研究所 | Point-to-point transmission system of optical fiber links based on dual-channel binding and transmission method |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20020114416A1 (en) * | 2000-06-02 | 2002-08-22 | Enam Syed K. | Phase alignment of data to clock |
| CN1842057A (en) * | 2005-04-01 | 2006-10-04 | 华为技术有限公司 | Signal disconnection and combination method and apparatus |
| CN102497231A (en) * | 2011-12-09 | 2012-06-13 | 中国科学院长春光学精密机械与物理研究所 | Application method of optical channel binding technology in high-speed optical fiber communication |
| CN104158822A (en) * | 2014-08-29 | 2014-11-19 | 中国航空无线电电子研究所 | Point-to-point transmission system of optical fiber links based on dual-channel binding and transmission method |
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