CN106683171B - GPU multithreading texture mapping SystemC modeling structure - Google Patents

Abstract

The invention belongs to the field of computer graphics, and particularly relates to a GPU multi-thread texture mapping SystemC modeling structure, which comprises the following components: the texture parameter processing system comprises a texture parameter obtaining and Level calculating unit (1), a texel address calculating unit (2), a data assembling and task distributing unit (3), a texel data extracting and format converting unit (4), a texel filtering and texel data normalizing unit (5) and a texture mapping state and control parameter unit (6). The invention can avoid complicated circuit signal design, quickly evaluate the architecture of a large-scale hardware system, is suitable for early system-level design and development of circuits, and provides effective reference for the realization of similar products and functions.

Description

GPU multithreading texture mapping SystemC modeling structure

Technical Field

The invention belongs to the field of computer graphics, and particularly relates to a GPU multi-thread texture mapping SystemC modeling structure.

Background

Texture mapping is the attachment of various texture images to a computer-generated 3D graphical surface to enhance the realism of the graph. Texture mapping belongs to a pixel processing stage and is used for accelerating texture operation of computation density and storage access density, and one main operation is to find out the address (namely a texel address) of a storage space where a texel corresponding to a screen space pixel (x, y, z) in a texture space is located, then filter the selected texel color, and replace the pixel color in the screen space with the value, thereby completing the texture mapping. That is, the pixel coordinates of the screen space are converted into the parameter space (u, v) and then the parameter space is converted into the texture image space, which is characterized by large calculation amount and real-time requirement.

Simulation speed is very important for software/hardware coordinated design and Co-verification (Co-verification) of the system. To improve efficiency, effective hardware/software system simulation must be enabled at an early stage of the design process. In order to overcome the limitation that the modeling speed is slow in the conventional RTL level, and in view of the fact that SystemC supports hardware/software collaborative design, the structure of a complex system consisting of hardware and software can be described, and the description of the hardware, the software and the interface in a C + + environment is supported. The various levels of abstraction are modeled herein using the Transaction Level Models (TLMs) of SystemC 2.0. The most basic structural unit of the SystemC is a module (module), which may contain other modules or processes (processes) and methods (methods), and by adding timing details therein, various system level abstractions of the functional module, the communication module, the software module and the hardware module can be realized, and the concepts of data type description, clock and delay of the introduced ports and signals can be used to evaluate the performance of the system and explore the structure of the system.

Disclosure of Invention

The purpose of the invention is:

the GPU multithreading texture mapping SystemC modeling structure is used for accelerating the texture operation with intensive computation and intensive storage and access, realizes the parallel execution of the texture operation of 4 fragments and the operation of a plurality of components in each fragment, and can avoid the complicated circuit signal design and quickly evaluate the architecture of a large-scale hardware system.

The solution of the invention is:

a GPU multi-threaded texture mapping SystemC modeling structure, comprising:

the texture parameter processing system comprises a texture parameter obtaining and Level calculating unit (1), a texel address calculating unit (2), a data assembling and task distributing unit (3), a texel data extracting and format converting unit (4), a texel filtering and texel data normalizing unit (5) and a texture mapping state and control parameter unit (6);

texture parameter acquisition and Level calculation unit (1) output interface is connected with input interface of texel address calculation unit (2), texture parameter acquisition and Level calculation unit (1) reads texture image resolution parameters width, height, depth and load _ bias parameters of texture mapping type mapType and filter mode filterMode, basevell and baseLevel layers from texture mapping state and control parameter unit (6) according to texture unit ID information of texture Quad request input by unified chromosome array (USA), substitutes texture request Quad _ mask and coordinate variables s, t and r input by unified chromosome array into Level calculation flow to obtain Level layer value of resident texture, reads width, height and depth of Level layer texture resolution parameters from texture state and control parameter unit (6), and reads texture layer resolution value of resident texture layer and Level layer image resolution parameter from texture mapping state and control parameter unit (6), height, depth, texture mapping type mapType, texture filtering mode and texture Quad request coordinate variables s, t and r input by the unified chromosome array are input to a texel address calculation unit (2);

the texel address calculating unit (2) firstly calculates the texture coordinate of a specified Level layer according to texture parameter obtaining and texture Quad request coordinate variables s, t and r input by the uniform chromosome array and width, height and depth of the Level layer texture image resolution parameter input by the Level calculating unit (1) to obtain a Level layer texel coordinate address (i0, j0, k0), (i1, j1 and k 1); secondly, the texel address calculating unit (2) brings texel coordinate addresses (i0, j0, k0), (i1, j1, k1) into a coordinate adjusting algorithm of the wrap mode to the Level layer to obtain texture coordinate addresses (i0, j0, k0), (i1, j1, k1) after each small component wrap is adjusted; thirdly, the texel address calculating unit (2) performs texel sampling processing on the texture coordinates according to the input texture filtering mode filterMode and the texture mapping type mapType, and generates 1 to n texel coordinates; processing a plurality of texel coordinates according to a wrap mode to a coordinate adjustment algorithm of a Level layer, and finally outputting a final texel sampling request containing texel sampling coordinates to a data assembling and task distributing unit (3);

the data assembling and task distributing unit (3) is used for always allowing the unit to send a texel sampling request to the texture storage L1 TCache according to the ready state of the current external texture storage if the ready state is 1; otherwise, the whole texture pipeline is stopped; meanwhile, a texel sampling request is transmitted to an external texture memory through an interface of the external texture memory to carry out request addressing processing, a request completion identifier is set, a data assembling and task distributing unit (3) continuously detects the completion identifier state returned by the external texture memory through an internal process, if the returned data is effective, the request results processed by the external texture memory are sequenced according to the sequence of the requests, and the request results are output to a texel data extracting and format converting unit (4);

the texel data extraction and format conversion unit (4) reads a current texture request from the texture mapping state and control parameter unit (6) to store a format internnalformat in the texture Cache, extracts R, G, B, A, Lum, Int and Depth in the texture format from a request result obtained by the texel data extraction and format conversion unit (4) according to a storage format returned by an external texture memory, converts different internal formats into color data in an RGBA format, and outputs the result to the texel filtering operation and texel data normalization unit (5);

a texel filtering operation and texel data normalization unit (5), when the texture filtering mode is an adjacent sampling mode, which means that the filtering operation is not required to be executed, the texture request of the type is transmitted in a filtering module; otherwise, according to the texture filtering mode filterMode, performing linear, bilinear, or trilinear interpolation calculation on a plurality of texture sampling values to obtain a filtered texel value, performing texel data normalization on a result, and finally outputting the result to an external uniform dyeing array through an interface function between the result and the uniform dyeing array.

The invention has the advantages that:

the invention uses SystemC to accurately model the transaction-level cycle, and uses C + + language to describe the software, so that the hardware and software modeling of the system design can be realized by C + + language; the design method based on SystemC supports the designer to model on different levels, reduces the code amount and the workload, and provides higher working efficiency; the texture operation of 4 fragments and the parallel execution of the operation of a plurality of components in each fragment are realized, the complex circuit signal design can be avoided, the architecture of a large-scale hardware system can be evaluated quickly, the method is suitable for the early system-level design development of the circuit, and effective reference is provided for the realization of similar products and functions.

Drawings

FIG. 1 is a schematic block diagram of a GPU multithreading texture mapping SystemC modeling structure in the present invention;

FIG. 2 is a block diagram of a transaction-level modeling implementation of the texture mapping unit of the present invention;

FIG. 3 is a schematic diagram illustrating the graphical representations of FIGS. 2 and 3;

FIG. 4 is a schematic view of a level calculation flow;

note that:

1. the Quad is incomplete: the finger quad contains less than 4 fragments and can be known by the effective digit of quad _ mask;

2. enable mipmap: the minification filter is set to use mipmap, which corresponds to the corresponding filtering mode: near _ mipmap _ near, linear _ mipmap _ near, near _ mipmap _ linear, and linear _ mipmap _ linear;

FIG. 5 is a schematic diagram illustrating the calculation of Level texel coordinates in texture Nearest mode;

FIG. 6 is a schematic diagram illustrating the calculation of Level texel coordinates in the texture Linear mode;

FIG. 7 is a schematic diagram illustrating adjustment of Level layer texel coordinates I in the wrap mode.

FIG. 8 is a texel filtering flow diagram.

Detailed Description

The technical solution of the present invention will be clearly and completely described below with reference to the accompanying drawings and the specific embodiments. It is obvious that the described embodiments are only a part of the embodiments of the present invention, rather than the whole embodiments, and that all other embodiments, which can be derived by a person skilled in the art without inventive step based on the embodiments of the present invention, belong to the scope of protection of the present invention.

The invention provides a GPU multithreading texture mapping SystemC modeling structure, as shown in figure 1, comprising:

the texture parameter processing system comprises a texture parameter obtaining and Level calculating unit (1), a texel address calculating unit (2), a data assembling and task distributing unit (3), a texel data extracting and format converting unit (4), a texel filtering and texel data normalizing unit (5) and a texture mapping state and control parameter unit (6);

the texture parameter obtaining and Level calculating unit (1) output interface is connected with the input interface of the texel address calculating unit (2), the texture parameter obtaining and Level calculating unit (1) reads the texture mapping type mapptype and the texture image resolution parameters width, height, depth and load _ bias of the filtering mode filterMode, baseleve and baseLevel layers from the texture mapping state and control parameter unit (6) according to the texture unit ID information of the texture Quad request input by the unified chromosome array (USA), and substitutes the texture Quad request Quad _ mask input by the unified chromosome array and the coordinate variables s, t and r into the Level calculating flow shown in the figure 4, mainly comprising: texture coordinate preprocessing, scalar calculation, lambda calculation and mipmap layer Level calculation to obtain a Level layer value of a resident texture, reading the width, height and depth of a Level layer texture image resolution parameter from a texture mapping state and control parameter unit (6), and inputting the Level layer value of the resident texture, the width, height and depth of the Level layer texture image resolution parameter, a texture mapping type mapType, a texture filtering mode fileterMode and a texture Quad request coordinate variable s, t and r input by a unified chromosome array to a texel address calculation unit (2);

the texel address calculating unit (2) firstly calculates the texture coordinate of a specified Level layer according to texture parameter obtaining and texture Quad request coordinate variables s, t and r input by the uniform chromosome array input by the Level calculating unit (1) and the width, height and depth of the Level layer texture image resolution parameter, and the specific algorithm process is shown in fig. 5 and fig. 6, so as to obtain the Level layer texel coordinate address (i0, j0, k0), (i1, j1, k 1); secondly, the texel address calculating unit (2) brings texel coordinate addresses (i0, j0, k0), (i1, j1, k1) into a coordinate adjusting algorithm of a wrap mode to a Level layer as shown in fig. 7 to obtain texture coordinate addresses (i0, j0, k0), (i1, j1, k1) after each small component wrap adjustment processing; thirdly, the texel address calculating unit (2) performs texel sampling processing on the texture coordinates according to the input texture filtering mode filterMode and the texture mapping type mapType (the texel sampling rule refers to the texel filtering mode of opengl2.0 in table 1), and generates 1 to n texel coordinates; processing a plurality of texel coordinates by a coordinate adjustment algorithm of a Level layer according to the above-mentioned wrap mode shown in FIG. 7, and finally outputting a final texel sampling request containing texel sampling coordinates to a data assembling and task allocating unit (3);

TABLE 1

Note:

when the magnification filtering and reduction filter is set to the nearest mode, the texture mapping operation uses only the images of basevelel; both near _ mipmap _ near and linear _ mipmap _ near use d mipmap layer data, the values of d, k coming from the texture mapping state and control parameter unit; near _ mipmap _ linear and linear _ mipmap _ linear need to acquire texture values of 2 adjacent mipmap layers, for example, 2D, near _ mipmap _ linear needs to read 1 texel value from each of 2 mipmap layers, perform one linear interpolation between 2 layers, and linear _ mipmap _ linear needs to read 4 texel values from each of 2 mipmap layers, and perform 1 linear interpolation on the results between 2 layers after performing the bilinear interpolation.

The data assembling and task distributing unit (3) is used for always allowing the unit to send a texel sampling request to a texture storage L1 TCache according to the ready state of a current external texture memory (texture L1Cache) if the ready state is 1; otherwise, the whole texture pipeline is stopped; meanwhile, a texel sampling request is transmitted to an external texture memory through an interface of the external texture memory (texture L1Cache) to carry out request addressing processing, a request completion identifier is set, a data assembling and task distributing unit (3) continuously detects the completion identifier state returned by the external texture memory through an internal process, if the returned data is effective, the request results processed by the external texture memory (texture L1Cache) are sequenced according to the sequence of the requests, and the request results are output to a texel data extracting and format converting unit (4);

the texel data extraction and format conversion unit (4) reads a current texture request from the texture mapping state and control parameter unit (6) to store a format internnalformat (refer to an internal texture format supported by OpenGl2.0) in the texture Cache, extracts R, G, B, A, Lum, Int and Depth in the texture format from a request result obtained by the texel data extraction and format conversion unit (4) according to a storage format (shown in a table 2) returned by an external texture memory (texture L1Cache), converts different internal formats into color data in an RGBA format according to the table 3, and outputs the result to the texel filtering operation and texel data normalization unit (5);

table 2 texel data format output by Cache

TABLE 3 conversion rules for various colors to RGBA

A texel filtering operation and texel data normalization unit (5), when the texture filtering mode is an adjacent sampling mode, which means that the filtering operation is not required to be executed, the texture request of the type is transmitted in a filtering module; otherwise, a filtered texel value is obtained by performing linear, bilinear or trilinear interpolation calculation on a plurality of texture sampling values according to a texture filtering mode filterMode, and texel data normalization is performed on a result, namely, the module is input into an RGBA format, texel data with 8 bits of each component is input, the width of each component of the texel data after normalization operation is 32 bits, the value range is [0, 1], and finally, the result is output to an external unified dyeing array through an interface function between the result and the unified dyeing array.

Examples

The technical solution of the present invention is further described in detail with reference to the accompanying drawings and specific embodiments.

As shown in fig. 1, a GPU multithreading texture mapping SystemC Modeling structure adopts a SystemC language and a Transaction Level Modeling (TLM) method, wherein each functional module in the model realizes communication through a function of a Transaction Level interface, rather than through connection of hardware signals, each module internally includes a respective independent and parallel execution process, each process has only one common event trigger, i.e., clock rising edge, and performs periodic and accurate hardware Modeling on a texture mapping unit; each process may call a function in the transaction-level interface of the respective module to pass information to each other.

The mapping unit comprises a texture parameter obtaining and Level calculating unit (1), a texel address calculating unit (2), a texture storage access data assembling and task distributing unit (3), a texel data extracting and format converting unit (4), a texel filtering operation, a texel data normalization unit (5) and a texture mapping state and control parameter unit (6).

As shown in fig. 3, the texture parameter obtaining and Level calculating unit (1) is configured to obtain relevant texture parameters from (6) the texture mapping state and control parameter unit according to the "texture unit ID" of the QUAD input by the USA texture request, determine the texture mapping type (maptype), then calculate the Level value, determine the filtering mode (filtermode) of the texture, and the like. As shown in fig. 2, the model design is implemented by using "Level computing process" (Level _ computer _ Thread) and pipeline _0, where the USA request identification information (USA _ access _ request) is implemented by calling a USA _ access _ tau _ export interface function, and when the "Level computing process" detects that USA _ access _ request is valid, the pointer data _ pointer _ Level _ computer points to the data head address of the USA input request, so as to provide necessary data information for the "Level computing process", and the "Level computing process" mainly completes the algorithm functions: texture coordinate preprocessing (computer _ texture _ coordinate), scalar calculation (computer _ scalar), lambda calculation (computer _ lambda), miplevel calculation (computer _ level _ and _ alpha) and the like, and the final operation result is input into pipeline _0 to realize pipeline operation and is transmitted to a next-level texel address calculation unit (2);

as shown in fig. 4, the texel address calculating unit (2) is configured to calculate a texture coordinate of a specified Level according to (1) a texture parameter obtaining unit, a texture mapping type (maptype) and a filtering mode (filtermode) input by the Level calculating unit; further processing the normalized texture coordinates beyond the range of [0, 1] according to wrap mode; generating 1 to n texel coordinates at a specified filter mode; the texel coordinates are then processed according to wrap mode. As shown in fig. 2, the modeling design is implemented by using a "texel address calculation process" (address _ computer _ Thread) and a pipeline _1, wherein when the "texel address calculation process" detects that the pipeline _0[ n-1] is not empty, a data pointer of the pipeline _0[ n-1] is transferred to a texel address calculation pointer (data _ pointer _ address _ computer), so as to provide necessary data information for the "texel address calculation process", and the "texel address calculation process" mainly completes the algorithm functions mainly: coordinate wrap mode processing (wrap _ mode _ adjust), filtering system calculation (computer _ whd _ parameter), texel address sampling calculation (computer _ level _ coordinate) and the like, and inputting the final operation result into pipeline _1 to realize pipeline operation and transmitting the pipeline operation to a next-level texture storage access data assembling and task distributing unit (3);

the texture store access data assembly and task allocation unit (3), as shown in fig. 2, is used to always allow this unit to send texel sampling requests (one quad multiple texel coordinates) to the texture memory through the cache _ read _ port when the ready state of the texture memory (L1 texture cache) is 1. Otherwise, the whole texture pipeline is stopped; meanwhile, the returned result effective condition of the cache _ return _ export interface function is continuously detected through a process through an interface function of a texture memory (L1 texture cache), if the returned data are effective, the results are sequenced according to the sequence of the requests, and the results are assigned to a data pointer data _ pointer _ format _ convert of a next stage through a data pointer data _ pointer to be sent to a texel data extraction and format conversion unit (4);

and the texel data extraction and format conversion unit (4) is used for extracting the value of each component of the texel from the 32-bit texel data acquired from the cache according to the internal format internnalformat of the texture, and converting different internal formats into color data in an RGBA format. As shown in fig. 2, the modeling design is implemented by using a "texel address calculation process" (format _ convert _ Thread) and a pipeline _2, wherein when the "texel format conversion process" detects that a variable cache _ return _ request returned by a cache _ return _ export interface function is valid, the data of a data pointer data _ pointer _ format _ convert is read, so as to provide necessary data information for the "texel format conversion process", and the "texel format conversion process" mainly completes algorithm functions mainly including: texture register state parameter data, texel format RGBA conversion (format _ convert) calculation and the like are read through texture _ parameter _ read _ port, and the final operation result is input into pipeline _3 to realize that the pipeline operation is transmitted to the next texel filtering operation and texel data normalization (5);

as shown in fig. 5, the texel filtering operation, the texel data normalization unit (5), when the filtering mode (filter mode) of the texture is the adjacent sampling mode (nearest), means that no filtering operation needs to be performed, and this type of texture request is "passthrough" at the filtering module. Otherwise, obtaining a filtered texel value by performing linear, bilinear, or trilinear interpolation calculation on a plurality of texture sampling values according to a filtering mode, performing texel data normalization on a result, namely inputting the result into an RGBA format, wherein each component is texel data with 8 bits, the width of each component of the texel data after normalization operation is 32 bits, and the value range is as follows: between [0, 1 ]. As shown in fig. 2, the modeling design is implemented by using a "texel filtering process" (data _ filter _ Thread) and a pipeline _3, wherein, as shown in fig. 8, when the "texel filtering process" detects that the pipeline _3[ n-1] is not empty, a data pointer of the pipeline _3[ n-1] is read to provide necessary data information for the "texel filtering process", and the "texel filtering process" mainly completes the algorithm functions mainly including: texel value filtering, normalization calculation and the like are carried out according to different texture mapping types (maptype) and filtering modes (filtermode), and the final result is output to the USA through an interface function between the unified coloring array (USA).

Finally, it should be noted that the above examples are only used to illustrate the technical solutions of the present invention, and not to limit the same; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those skilled in the art; the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.

Claims (1)

1. A GPU multi-threaded texture mapping SystemC modeling structure, comprising:

the texture parameter processing system comprises a texture parameter obtaining and Level calculating unit (1), a texel address calculating unit (2), a data assembling and task distributing unit (3), a texel data extracting and format converting unit (4), a texel filtering and texel data normalizing unit (5) and a texture mapping state and control parameter unit (6);

texture parameter acquisition and Level calculation unit (1) output interface is connected with input interface of texel address calculation unit (2), texture parameter acquisition and Level calculation unit (1) reads texture image resolution parameters width, height, depth and load _ bias parameters of texture mapping type mapType and filter mode filterMode, basevell and baseLevel layers from texture mapping state and control parameter unit (6) according to texture unit ID information of texture Quad request input by unified chromosome array (USA), substitutes texture request Quad _ mask and coordinate variables s, t and r input by unified chromosome array into Level calculation flow to obtain Level layer value of resident texture, reads width, height and depth of Level layer texture resolution parameters from texture state and control parameter unit (6), and reads texture layer resolution value of resident texture layer and Level layer image resolution parameter from texture mapping state and control parameter unit (6), height, depth, texture mapping type mapType, texture filtering mode and texture Quad request coordinate variables s, t and r input by the unified chromosome array are input to a texel address calculation unit (2);

the texel address calculating unit (2) firstly calculates the texture coordinate of a specified Level layer according to texture parameter obtaining and texture Quad request coordinate variables s, t and r input by the uniform chromosome array and width, height and depth of the Level layer texture image resolution parameter input by the Level calculating unit (1) to obtain a Level layer texel coordinate address (i0, j0, k0), (i1, j1 and k 1); secondly, the texel address calculating unit (2) brings texel coordinate addresses (i0, j0, k0), (i1, j1, k1) into a coordinate adjusting algorithm of the wrap mode to the Level layer to obtain texture coordinate addresses (i0, j0, k0), (i1, j1, k1) after each small component wrap is adjusted; thirdly, the texel address calculating unit (2) performs texel sampling processing on the texture coordinates according to the input texture filtering mode filterMode and the texture mapping type mapType, and generates 1 to n texel coordinates; processing a plurality of texel coordinates according to a wrap mode to a coordinate adjustment algorithm of a Level layer, and finally outputting a final texel sampling request containing texel sampling coordinates to a data assembling and task distributing unit (3);

the data assembling and task distributing unit (3) is used for always allowing the unit to send a texel sampling request to the texture storage L1 TCache according to the ready state of the current external texture storage if the ready state is 1; otherwise, the whole texture pipeline is stopped; meanwhile, a texel sampling request is transmitted to an external texture memory through an interface of the external texture memory to carry out request addressing processing, a request completion identifier is set, a data assembling and task distributing unit (3) continuously detects the completion identifier state returned by the external texture memory through an internal process, if the returned data is effective, the request results processed by the external texture memory are sequenced according to the sequence of the requests, and the request results are output to a texel data extracting and format converting unit (4);

the texel data extraction and format conversion unit (4) reads a current texture request from the texture mapping state and control parameter unit (6) to store a format internnalformat in the texture Cache, extracts R, G, B, A, Lum, Int and Depth in the texture format from a request result obtained by the texel data extraction and format conversion unit (4) according to a storage format returned by an external texture memory, converts different internal formats into color data in an RGBA format, and outputs the result to the texel filtering operation and texel data normalization unit (5);

a texel filtering operation and texel data normalization unit (5), when the texture filtering mode is an adjacent sampling mode, which means that the filtering operation is not required to be executed, the texture request of the type is transmitted in a filtering module; otherwise, according to the texture filtering mode filterMode, performing linear, bilinear, or trilinear interpolation calculation on a plurality of texture sampling values to obtain a filtered texel value, performing texel data normalization on a result, and finally outputting the result to an external uniform dyeing array through an interface function between the result and the uniform dyeing array.

Images