CN106649166B - A kind of universal used group of data processing system based on unified interface - Google Patents
A kind of universal used group of data processing system based on unified interface Download PDFInfo
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- CN106649166B CN106649166B CN201611252762.6A CN201611252762A CN106649166B CN 106649166 B CN106649166 B CN 106649166B CN 201611252762 A CN201611252762 A CN 201611252762A CN 106649166 B CN106649166 B CN 106649166B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q1/00—Details of selecting apparatus or arrangements
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- H04Q1/028—Subscriber network interface devices
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/382—Information transfer, e.g. on bus using universal interface adapter
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
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Abstract
The universal used group of data processing system based on unified interface that the invention discloses a kind of, it is characterized in that, the data processing system includes pulse acquisition circuit, communication interface circuit, main control chip group, data processing unit and power panel, and wherein pulse acquisition circuit is for acquiring the positive and negative channel pulse output of used group；Communication interface circuit realizes the used group of data acquisition that used group is exported with bus communication mode；Required compensating parameter, main control chip group are master and slave processor when used group of precision of platinum resistance temperature measuring circuit survey calculation, extend a plurality of types of communication interfaces by main control chip group, carry out protocol conversion in software；The data that data processing unit receives the transmission of main control chip group are realized and are handled.According to the universal used group of data collection system that the present invention realizes, a variety of used group of test interfaces are integrated, the used group data of multiplex roles are unified for Ethernet output, compatible multiple kinds meet the used group testing requirement of polymorphic type.
Description
Technical field
The invention belongs to used group testing equipment fields, more particularly, to a kind of universal used group based on unified interface
Data processing system is suitable for direct pulse output, universal synchronous exports, asynchronous serial port exports, CAN bus exports, 1553B is total
The data acquisition and processing of most of used group such as line output.
Background technique
Tank-type mixture (hereinafter referred to as " used group ") is the core component of missile control system, is fastened after the used upper bullet of group with screw
In the instrument room of guided missile, the flight attitude and the speed of service of directly sensitive body, therefore the precision of used group and stability are direct
Influence the flight precision of guided missile.
Used group tester is the important component of used group test macro.The effect of tester is to receive used group data, right
Used group data are resolved and calculate used group precision parameter, so the Stability and veracity of ground test parameter is to influence used group
The key of final guidance precision.
Since model is various, used group of data output form of company's production shows diversified development trend, and existing
Used group test equipment also relies on a kind of test equipment based on isa bus, and the test equipment is by inserting in industry control for test board
In machine isa bus card slot, calculated to complete test and the data of 12 road pulse signals.But the equipment has following defect:
(1) test equipment is developed the nineties, can be only done the used group of data acquisition of output of pulse signal, and for it
Used group of data of his form output board that needs to transfer converts the data into pulse signal and is acquired；
(2) it cannot achieve the temperature data acquisition of used group plus table and gyro；
(3) it cannot achieve the monitoring to used group of power supply system；
(4) acquisition software can only be run under WIN98 operating system, can not be upgraded；
(5) volume is big, non-portable cabinet.
The disadvantages described above of former test equipment causes the used group test of company to need continuous brand-new switching board, at high cost, and utilizes
Rate is poor, and accuracy decline after conversion influences measuring accuracy.
Summary of the invention
Aiming at the above defects or improvement requirements of the prior art, the present invention provides a kind of used group of number based on unified interface
According to processing system, by the way that data processing unit, measurement and control unit, power supply and power supply monitoring unit are integrated in integration together
In cabinet, thus solve that pulse test equipment interoperability is poor, insufficiency, technical problem inconvenient to carry.
To achieve the above object, according to one aspect of the present invention, it provides a kind of universal used based on unified interface
Group data processing system, which is characterized in that the data processing system includes pulse acquisition circuit, communication interface circuit, master control core
Piece group, data processing unit,
The wherein pulse acquisition circuit, by signal processing circuit to pulse signal carry out pretreatment be transmitted in it is described
CPLD circuit carries out used group Multichannel Acceleration meter and the positive and negative channel pulse of multichannel gyroscope counts；
The communication interface circuit is realized between the main control chip group with the used group data of bus form input and output；
The platinum resistance temperature Acquisition Circuit is by measuring the used group of Multichannel Acceleration meter and multichannel gyroscope and being used to
Required compensating parameter when the temperature of group ontology is to calculate used group precision.
The main control chip group is master and slave processor, integrates a variety of test interfaces, realizes the used group data of the multiple type
Interface, multiple kinds unification；
The data that the data processing unit receives the main control chip group transmission are realized and are handled；
Wherein, it is transmitted using the used group data of SPI communication transmitting using asynchronous serial port UART between the master and slave processor
Control command and status information, the tasks synchronization between double-core is controlled using external interrupt, to realize that diversiform data is adopted
Coordination between collection processing.
Further, the primary processor is communicated with the data processing unit, and completion interface is uniformly controlled, agreement is unified
Task schedule between control, power supply control, Power Supply Monitoring and multi-interface data acquisition；It is described to complete polymorphic type from processor
The extension of used group data acquisition interface and the used group of data acquisition of multiplex roles.
Further, the coordination of the used group data acquisition of the polymorphic type are as follows: described in the slave processor of main control chip group is completed
Used group of data are filled into each field of transmission format protocol according to scheduled format by the used group data acquisition of polymorphic type, primary processor
On, realize communications protocol formatting conversion, after be transmitted to the data processing unit, the data processing unit will be acquired
To used group of data parsed by message format, calculated, handle a used group data.
Further, the master and slave processor is respectively STM32 family chip.
Further, wherein outside realizing Ethernet interface using the FMSC bus extension of STM32 on the STM32 chip
Portion's industry ethernet controller.
Further, platinum resistance temperature measuring circuit described in every road includes concatenated constant pressure source trilinear method bridge circuit, signal
Conditioning circuit and A/D converter circuit.
Further, the platinum resistance temperature Acquisition Circuit uses constant pressure source trilinear method measurement method.
Further, the signal processing circuit includes concatenated bleeder circuit, Schmidt trigger and level translator.
Further, the data processing system further includes electric source monitoring circuit, using concatenated solid-state relay and every
From amplifier, realize that multichannel is not used to the voltage acquisition monitoring of group secondary power supply altogether.
In general, through the invention it is contemplated above technical scheme is compared with the prior art, can obtain down and show
Beneficial effect:
(1) a variety of used group of test interfaces are integrated for the first time, the used group data of multiplex roles are unified for Ethernet output, compatibility is a variety of
Communications protocol, a set of data acquisition system can meet the used group testing requirement of company's overwhelming majority；
(2) pulse data is completed using programmable logic device and acquires function, compared to former pulse collection systematic sampling range,
Sampling precision improves 10 times or more, has both the function that the sampling time can match, the acquisition of positive and negative channel data saves；
(3) test macro is controlled using double-core, the division of labor, cooperation between double-core, with the high spy of task-aware, execution efficiency
Point, integration USB 2.0 and 10M/100M adaptive ethernet have big data bulk transfer ability, are provided simultaneously with using Ethernet
The function of online upgrading STM32 program；
(4) 9 road platinum resistance temperature Acquisition Circuits are integrated, using constant pressure source trilinear method measuring circuit to used group of inside platinum resistance
Temperature acquisition is carried out, acquisition precision is better than 0.1 DEG C, is much higher than technical requirement；
(5) used group power supply, consumption current monitoring circuit are integrated, voltage, electric current is realized for the first time while monitoring, realize
The safe power supply of used set product；
(6) database storage techniques are used in test equipment for the first time, are stored compared to ordinary file, data base read-write speed
Faster, safety is higher, and memory capacity is bigger, realizes test data for the first time using database by minimum sampling period (10ms
Or every frame) sequential storage, when data exception, at the time of abnormal data can be positioned occurring, the traceability of abnormal data is realized,
And member's pulse collection equipment can only be in backstage record second data；
(7) it is designed, is integrated automatic with power-off and power supply monitoring system, 1553B bus coupling using Portable integral
Clutch and data processing and data acquire, and greatly reduce equipment cost and volume.
Detailed description of the invention
Fig. 1 is the universal used group of data collection system overall structure block schematic illustration realized according to the present invention；
Fig. 2 is the module group composed structure signal of the signal conditioning circuit in the data collection system realized according to the present invention
Figure；
Fig. 3 is that the system for the platinum resistance temperature measuring circuit realized according to the present invention forms connection schematic diagram；
Fig. 4 is the concrete composition structural schematic diagram for the platinum resistance temperature measuring circuit realized according to the present invention；
Fig. 5 is the control planning schematic diagram for the double-core circuit realized according to the present invention；
Fig. 6 is the STM32 double-core control circuit work in the universal used group of data collection system realized according to the present invention
Make flow diagram.
Specific embodiment
In order to make the objectives, technical solutions, and advantages of the present invention clearer, with reference to the accompanying drawings and embodiments, right
The present invention is further elaborated.It should be appreciated that the specific embodiments described herein are merely illustrative of the present invention, and
It is not used in the restriction present invention.As long as in addition, technical characteristic involved in the various embodiments of the present invention described below
Not constituting a conflict with each other can be combined with each other.
A kind of scheme that the present invention takes are as follows: used group of universal data collecting system based on unified interface.Core circuit is adopted
With double-core STM32 control circuit, peripheral interface circuit includes pulse acquisition circuit, synchronous serial communication interface circuit, 1553B total
Line communication interface circuit, platinum resistance temperature measuring circuit, RS422 bus communication interface circuit, CAN bus communication interface circuit,
CPLD circuit, high speed USB serial bus communication interfaces circuit, Ethernet ethernet communication control circuit, used group power supply and prison
Slowdown monitoring circuit, voltage detecting circuit, data processing unit.
Double-core STM32 control circuit realizes the unification of a variety of data-interfaces, multiple kinds to single interface, Dan Xieyi.
Two panels STM32 points are main (Master), from (Slave) processor, realize different functions respectively, primary processor is mainly completed to connect
Task schedule between mouth unification, agreement unification, system power supply control, Power Supply Monitoring and multi-interface data acquisition；From processing
Device mainly completes the extension of used group data acquisition interface, enables the data acquisition session for adapting to multiplex roles.Master and slave processor
Between using the used group data of SPI communication transmitting, control command and status information are transmitted using UART, the tasks synchronization between double-core
It is controlled using 4 tunnels external interrupt Ext [3:0], realizes coordination between each data acquisition session, uniformly.
Pulse acquisition circuit is made of pulse shaper and CPLD programmable logic device internal calculator, and it is defeated to be used to group pulse
Enter CPLD after entering pulse shaper, CPLD carries out the positive and negative channel pulse meter of used group Multichannel Acceleration meter and multichannel gyroscope
Number, CPLD and STM32 are attached using FSMC bus and pass through the counted number of pulses that FSMC bus reads CPLD.
Synchronous communication control circuit is extended by the FSMC bus of STM32, and synchronous communication controller is PEF20525,
Two-way full duplex synchronous serial communication is realized by PEF20525, and communication baud rate is programmable, maximum rate 20Mbps.
1553B bus communication interface circuit is extended by the FSMC bus of STM32, communication controller for 8357
HT-61843GB-1, the communication interface integrate in used group test equipment for the first time, communication baud rate 4Mbps.
Platinum resistance temperature measuring circuit uses constant pressure source three-wire system mensuration, can effectively avoid using this method because of conducting wire heat
Grass carrys out measurement error, and to reduce the spontaneous heat affecting temperature measurement accuracy of product platinum resistance, measurement electric current is no more than 0.4mA,
Wherein electric bridge is built using high-precision, Low Drift Temperature resistance, further decreases measurement error, and Surveying Actual Precision is better than 0.1 DEG C；
The Communication Control that RS422 bus communication interface circuit and CAN bus communication interface circuit use STM32 to carry
Device connects transceiving driver and constitutes, and realizes and acquires with used group of data of the output of RS422 bus or CAN bus output.
High speed USB serial bus communication interfaces circuit connects external PHY using the USB_OTG HS interface of STM32
USB3300, USB interface is the backup interface of the data transmission of Ethernet, for the bulk transfer of big data, by actually testing
Card, USB_OTG high-speed interface the maximum data transmission rate have reached 430Mbps, are much higher than STM32 Ethernet interface highest
The limitation of 100Mbps can be used for the non real-time bulk transfer of big data.
Ethernet ethernet communication control circuit is expanded using the FSMC bus connection ethernet controller of STM32
Exhibition, ethernet communication controller are DM9000A, are mainly used for the used group data of real-time Transmission, pass through transplanting LwIP agreement on software
Stack realizes the function of Ethernet data transmission.
By switching circuit and relay circuit, realization is manual/auto to be switched used group electric source monitoring circuit with electric control, and
Maximum current is 20A, using ACS754LCB current sensor, can the used group consumption curent change of real-time monitoring, when electric current is more than pre-
If alarming when value, the safe power supply to used group is realized.
Wherein the voltage detecting circuit in observation circuit uses solid-state relay JGC-3032 and isolated amplifier
ISO124U realizes that the voltage acquisition of group secondary power supply is not used on 5 tunnels altogether, used group internal electric source situation is monitored in real time, using operation
Amplifier OPA2277 forms add circuit, and negative voltage is raised to positive voltage, realizes that the AD of pair ± 35V voltage wide-voltage range is adopted
Collection.
Data processing unit 12 is built using AIM-203 (Min_ATX) mainboard for grinding China, and the mainboard is small in size, power consumption
It is low, and industrial rich interface can flexibly realize used group pulse output acquisition, go forward side by side by writing software in data processing unit
The corresponding calculation processing of row, data storage etc..
Data acquisition system software is divided into data processing unit data processing software, double-core ARM control software, CPLD
Programmable logic software；All softwares are designed by module, and maintainable good, extended capability and upgrading ability are strong, are used to group
Data use database purchase, management for the first time, and compared to having using document storage mode, read or write speed is fast, memory capacity is big, peace
The features such as Quan Xinggao.
Fig. 1 is a kind of system block diagram of pulse collection system of one embodiment of the invention, as shown in Figure 1, including pulse
Acquisition Circuit 1, synchronous serial communication interface circuit 2,1553B bus communication interface circuit 3, platinum resistance temperature measuring circuit 4,
RS422 bus communication interface circuit 5, CAN bus communication interface circuit 6, CPLD circuit 7, main control chip group 8, high speed USB string
Row bus communication interface circuit 9, Ethernet ethernet communication control circuit 10, electric source monitoring circuit 11, data processing unit
12, power panel 13.
As shown in Fig. 2, used group pulse acquisition is made of two parts, a part is physical circuit, i.e., at pulse collection signal
Circuit is managed, another part is CPLD internal pulses logical circuit of counter circuit.
Pulse signal is reduced the pulse signal of used group of input through bleeder circuit by pulse collection signal processing circuit by 12V
To 5V or so, and after carrying out shaping, filtering to pulse signal by Schmitt trigger, 5V is converted using level translator
It captures on pin to be input to the programmable timer external input for extending to device CPLD and STM32 after 3.3V, both can be used
The timer of STM32 processor acquires, and can be also acquired using CPLD, reduce conceptual design risk.In this system number
It uses CPLD to be acquired used group of input pulse signal according in acquisition scheme, compares and use STM32 timer acquisition pulse number
For,
CPLD internal pulses logical circuit of counter electricity is programmed using Verilog programmable logic language, CPLD internal logic
Circuit includes 4 modules, is frequency division module, counting module, output selecting module and the enabled module of output respectively.CPLD with
The data interaction of STM32 is completed by the FSMC bus of STM32, the sample frequency that frequency division module is mainly written according to FSMC
Register completes system time frequency dividing.Counting module is subsynchronous to solve according to pulse signal progress 2 of the system clock to input
Asynchronous input interface cross clock domain stationary problem, and pulse is judged whether there is according to the rising edge of system clock and is come in, if there is arteries and veins
It rushes in, completes addition work, automatic clear after data are overflowed, when output enable signal is effective, CPLD is according to sample frequency
Timing output pulse signal triggers the external interrupt of STM32, and STM32 reads CPLD's by FSMC bus in external interrupt
Counted number of pulses is read in data procedures, and CPLD is decoded using the address date of FSMC, after address signal is effective,
The pulse data in different channels is put on the data line of FSMC according to different address signals, completes entire step-by-step counting function
Energy.
Input pulse signal is synchronized by clock synchronization mode using the pulse acquisition circuit that Verilog is realized,
Solve the synchronous technological difficulties of asynchronous input interface cross clock domain, latch is with according to sampling parameter configurable clock generator frequency division coefficient
And interrupt output frequency, realize sample frequency can Configuration Online and interrupt output High-Accuracy Frequency it is controllable.Pass through test
Verifying, the sampling precision of the pulse acquisition circuit can reach 10-6, and sample range can achieve 6.5MHz, compared to former pulse collection
Equipment, sampling precision improve an order of magnitude, and sample range expands 10 times.
Synchronous serial communication interface circuit 2 is extended using synchronous serial communication controller PEF20525, Communication Control
Device PEF20525 is connect with STM32 using FSMC bus parallel, and STM32 is controlled by FSMC bus configuration synchronous serial communication
Device PEF20525, realize communication frequency can Configuration Online, highest communication baud rate is up to 20Mbps, due to synchronous serial communication
Data-signal is synchronized by clock, there is higher reliability than asynchronous serial communication, while using difference RS422 electricity
Flat transmission mode is, it can be achieved that remote, high reliability transport；
1553B bus communication interface circuit by 8357 1553B controller HT- 61843GB-1 and 1553B be isolated become
Depressor HT-DB337/4A composition, is attached between HT-61843GB- 1 and STM32 using FSMC bus.HT-61843GB-1
Bus control unit communication speed is 4Mbps, for the 1Mbps communication baud rate common compared to external chip inlet, traffic rate
Improve 4 times.The communication controller supports binary channels, the bus links structure of dual redundant, realizes the highly reliable of used group data
Property transmission.
As shown in figure 3, platinum resistance temperature Acquisition Circuit uses constant pressure source trilinear method measurement method, since optical fiber is used to have in group
9 tunnel platinum resistance need to measure, and the temperature for measuring used group Multichannel Acceleration meter and multichannel gyroscope and used group ontology is used to calculate
Required compensating parameter, is integrated with the mutually independent platinum resistance Acquisition Circuit in 10 tunnels, wherein all the way in the present system when group precision
For supervisory control and data acquisition system temperature.Platinum resistance temperature measuring circuit is made of 3 parts, is constant pressure source trilinear method electric bridge respectively
Circuit, signal conditioning circuit, ADS1258 high-precision AD conversion circuit.Wherein ADS1258 is connected to the SPI of STM32 (Slave)
On interface, ADS1258 sampling time sequence is controlled by SPI interface.Platinum resistance temperature acquisition specific hardware structure electricity as shown in Figure 4
Lu Zhong, R1, R2, R3, R4 constitute bridge circuit in electric bridge, and wherein Rw1~Rw3 is the lead wire circuit that electric bridge connects platinum resistance, when
When bridge balance, Vin1 is equal with Vin2, and when bridge balance is broken, the difference between V1 and V2 is as shown in Equation 1
In bridge circuit, resistance R1~R3 selects the resistance of high-precision, Low Drift Temperature, and the resistance value of R1 and R2 should be at same batch
Select the consistent resistance of drift bearing in product, since resistance R4 is with temperature change, enable R4=R0+ △ R, conductor resistance due to
The influence of thermoelectrical potential, resistance Rw have a small variation, since conducting wire 1,2,3 is isometric, it is believed that Rw1=Rw2=Rw3=
R+ △ r, according to the conducting wire of 2 meters long of AFR-250 0.2, then r is about 0.2 Ω, and bringing R4, Rw1, Rw2, Rw3 into formula 1 can
?
Formula 2 is divided for two parts as shown in formula 3, formula 4:
First part:
Second part:
Arranging to first part's formula 3 can obtain
As shown in Equation 5, molecular moiety is without Δ r, denominator first item (R1+R0+ΔR+r)×(R2+R3+ r) it is 108 magnitudes,
Denominator Section 2 (R0+ΔR+r+R1+R2+R3+ r) × Δ r is 103Magnitude, denominator Section 3 Δ r210-2Magnitude, denominator second
Item differs 10 with first item5A order of magnitude, Section 3 is smaller, therefore denominator the 2nd, Section 3 can be ignored.
In the case where reference voltage is 2.5V, VGND is as shown in Equation 6, by R1=R2=10K, R3=500 Ω, Rw1=
Rw2=Rw3Bring into formula 6 can obtain and both sides simultaneously divided by VrefIt can obtain
Therefore, Section 2 can be ignored, and analyze difference such as 8 institute of formula it is found that between V1 and V2 according to 2~formula of formula 7
Show.Rt=R0+ △ R is enabled, then it is as shown in Equation 9 to obtain platinum resistance resistance value Rt to the further deformation of formula 8.
Since the lead resistance of conducting wire is very small, about 0.2 Ω, therefore the influence of conductor resistance can be ignored, then formula (9)
It can be rewritten as
This programme platinum resistance design scheme actual measurement range is -40 DEG C~100 DEG C, at this time the corresponding resistance value point of platinum resistance
Not Wei range be about the Ω of 400 Ω~700, can be obtained according to formula 8 at this time, take VrefFor 2.5V, then when temperature is -40 DEG C, (resistance is
About 400 Ω) when Vin1- Vin2 obtain minimum value；Vin1- Vin2 when (resistance is about 700 Ω) when temperature is 100 DEG C
Obtain maximum value.
Bring the value in formula (11) into formula (9) respectively, (10) can show that 5 are after value remains into decimal point
692.24877, as long as therefore connect platinum resistance conductor length it is consistent, error caused by conductor resistance can be ignored.
According to the calculated result of formula (11) and formula (12), the voltage difference minimum value at electric bridge both ends is -22.8929mV, maximum
Value is 44.5021mV, convenient for signal acquisition, to carry out being sent into AD conversion chip after the voltage difference at electric bridge both ends is amplified 20 times
It is acquired, signal amplification circuit is as shown in Figure 4, and signal amplification circuit is divided into 2 grades, and the first order forms ratio in the same direction by U1, U2
Example amplifying circuit, thus input impedance is very high, due to using symmetrical connection type, thus can offset the temperature drift of operational amplifier
Phenomenon；Second level U3 connects into Differential Input mode, and the single-ended signal that differential signal is converted into exports.
Temperature collection circuit passes through actual verification, obtains the measurement accuracy better than 0.1 DEG C, this exists with theoretical calculation
Part variation, these differences are mainly caused by the error and temperature drift of bridge circuit precision resistance, platinum resistance from heat affecting, but
0.1 DEG C of measurement accuracy is considerably beyond 0.7 DEG C of measurement accuracy technical requirements required by this system.
Universal asynchronous RS422, RS232 serial communication circuit (5) and CAN bus communicating circuit (6) are included using STM32
Communication interface connect corresponding transceiving driver and be extended, realization principle is simpler, and details are not described herein.
As shown in figure 5, STM32 Dual-Core Communication control circuit is the core of data acquisition system, two panels STM32 points are master
(Master), from (Slave) processor, different functions is realized respectively, and primary processor mainly completes interface unification, agreement system
One, the task schedule between system power supply control, Power Supply Monitoring and multi-interface data acquisition；Used group is mainly completed from processor
The extension of data acquisition interface and the used group of data acquisition of multiplex roles, two panels STM32 can be made entirely by way of sharing out the work and help one another
Data collection system operational efficiency is high, data acquisition is more reliable and more stable, also can solve STM32 because pin multiplexing leads to part
Not the case where function is not available.The double-core control system of data acquisition system is passed using SPI transmission data, UART asynchronous serial port
Defeated control command, GPIO are responsible for the tasks synchronization between double-core.Used group of data between main control chip group are passed by SPI
It send, wherein STM32 decides transmitting terminal from the SPI interface of processor, and the SPI interface of primary processor is done from receiving end, the communication of SPI
Baud rate is 42Mbps, is transmitted using DMA transmission mode.
In actual use, the master (Master) of main control chip group, workflow such as Fig. 6 from (Slave) processor
It is shown.After system electrification, master chip starts two tasks after initializing external interface, and a task is that system power supply monitoring is appointed
Business, the other is test instruction monitor task, wherein system power supply monitor task is a periodical execution task, test instruction
Monitor task is a preemptive type task, in test instruction monitor task, once the test for receiving upper computer software sending refers to
Order will just test instruction is forwarded to from processor, wherein test instruction include data collection type, corresponding physical interface and
The information such as sampling parameter；One is returned after instructing the test interface of initialization corresponding data acquisition tasks according to test from processor
Status information, host computer chooses whether to continue to test according to status information, if status information is correct, host computer sends starting and surveys
Examination instruction is tested in instruction monitor task to start by external interrupt starting from processor after monitoring test starting command and be tested
Task；Primary processor is sent to by SPI from processor by collected used group of data, primary processor carries out the data received
It formats and data processing unit is sent to by Ethernet after converting；Once test instruction monitoring unit detects that stopping test referring to
It enables, is triggered by external interrupt from processor stop data acquisition immediately.
Primary processor is to complete the formatting conversion of multiple kinds there are also a key task, i.e., presses used group of data
Unified format is transmitted to data processing unit by Ethernet, and Ethernet data transport protocol is as shown in table 1.
Table 1
Used group of data are filled into each field of transmission format protocol according to scheduled format after receiving used group data,
The process that description protocol is converted so that CAN bus protocol conversion is same protocol format as an example herein, CAN message format and data
Transformat definition structure body such as table 2
It is shown.
Table 2
After control and testing board Master receives the message of CAN bus, all data in CAN bus message structure are distributed
Data field into transport protocol, the FrameType in transport protocol indicate type of message (such as CAN, RS422,1553B
Deng), wherein CAN message type is indicated with 0x90, in conversion unit of protocol, states a direction Tanslate_Msg's first
Pointer * m_Tanslate_Msg, and be its dynamic assigning memory, protocol conversion process is as follows, wherein transport protocol frame head, verification
It is not write with calculating and postamble omission.
More specifically, since the included USB interface of STM32 only supports low speed and Full-Speed mode, but collection inside STM32
At the controller of hi-speed USB interface, it is necessary to which the USB high-speed mode that could be used STM32 using external PHY is adopted in notebook data
In collecting system, the hi-speed USB interface of STM32 is extended as external PHY using USB3300, USB interface is as the standby of Ethernet
With interface for used group data transmission, tested through actual transmissions, transmission speed can reach 430Mbps, have more than Ethernet
High transmission rate is suitble to the bulk transfer of big data.
More specifically, on STM32 realize Ethernet interface generally can be used two schemes realization, scheme first is that with
STM32 included RMII interface or MII interface connects external PHY and realizes Ethernet interface, and scheme is second is that with FMSC bus extension
External ethernet bus control unit.Ethernet interface circuit is total using FMSC bus extension Ethernet in data acquisition system
Lane controller DM9000A, DM9000A are integrated with ethernet controller and PHY, and use is more convenient, simply；Pass through shifting on software
It plants LwIP protocol stack and realizes that the data between control and testing board and data processing unit are transmitted.
More specifically, it is used to group power supply and observation circuit is made of manual switch circuit and relay circuit, wherein switchs
S1 is single-pole double-throw switch (SPDT), manually controls still software control for switching, switch S2 to S5, relay K1-K4 control 4 respectively
The turn-on and turn-off of road+BB voltage.+ BB the voltage come out from switch and relay is passed by sealing in an ACS754LCB electric current
Sensor, the output of ACS754LCB are connected to AD acquisition interface in dual core processor circuit (9), supervise to the electric current of 4 tunnel+BB
It surveys.
More specifically, voltage detecting circuit, five road input voltages pass through solid-state after partial pressure, by anode and negative terminal simultaneously
Relay is sequentially switched to the input terminal of add circuit, and input of the output of add circuit as ISO124 isolated amplifier,
It by isolated amplifier, realizes and the ground of measured voltage is converted into AD locality, the output end of ISO124 is connected to double-core processing
AD acquisition interface in device circuit (9) realizes that 5 tunnels are not total to ground voltage acquisition.
As it will be easily appreciated by one skilled in the art that the foregoing is merely illustrative of the preferred embodiments of the present invention, not to
The limitation present invention, any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should all include
Within protection scope of the present invention.
Claims (9)
1. a kind of universal used group of data processing system based on unified interface, which is characterized in that the data processing system includes
Pulse acquisition circuit (1), communication interface circuit (2,3,5,6), main control chip group (8), data processing unit (12),
The wherein pulse acquisition circuit (1) carries out pretreatment to pulse signal by signal processing circuit and is transmitted in CPLD electricity
Road (7) carries out used group Multichannel Acceleration meter and the positive and negative channel pulse of multichannel gyroscope counts；
The communication interface circuit (2,3,5,6) is realized used with bus form input and output between the main control chip group (8)
Group data；
Platinum resistance temperature Acquisition Circuit (4) is by measuring the used group of Multichannel Acceleration meter and multichannel gyroscope and used group ontology
Temperature to calculate used group precision when required compensating parameter；
The main control chip group (8) is master and slave processor, integrates a variety of test interfaces, realize the used group data of polymorphic type interface,
The unification of multiple kinds；
The data that the data processing unit (12) receives main control chip group (8) transmission are realized and are handled；
Wherein, it is transmitted and is controlled using asynchronous serial port UART using the used group data of SPI communication transmitting between the master and slave processor
Order and status information, the tasks synchronization between double-core are controlled using external interrupt, to realize that the used group data of polymorphic type are adopted
Coordination between collection processing.
2. the universal used group of data processing system based on unified interface as described in claim 1, which is characterized in that the master
Processor is communicated with the data processing unit (12), and interface is uniformly controlled, agreement is uniformly controlled, power supply controls, power supply for completion
Task schedule between monitoring and multi-interface data acquisition；It is described to be connect from the used group data acquisition of the processor completion polymorphic type
The extension of mouth and the used group of data acquisition of multiplex roles.
3. the universal used group of data processing system based on unified interface as claimed in claim 2, which is characterized in that described more
The coordination of the used group data acquisition of type are as follows: the slave processor of main control chip group completes the used group data acquisition of the polymorphic type, main place
Used group of data are filled into each field of transmission format protocol by reason device according to scheduled format, realize the formatting of communications protocol
Conversion, after be transmitted to the data processing unit (12), the data processing unit (12) presses the collected used group of data of institute
Message format is parsed, is calculated, handling used group data.
4. the universal used group of data processing system based on unified interface as claimed in claim 3, which is characterized in that described
Master and slave processor is respectively STM32 family chip.
5. the universal used group of data processing system based on unified interface as claimed in claim 4, which is characterized in that wherein institute
It states and realizes that Ethernet interface uses the FMSC bus extension external ethernet bus control unit of STM32 on STM32 family chip.
6. the universal used group of data processing system based on unified interface as claimed in claim 5, which is characterized in that every road institute
Stating platinum resistance temperature Acquisition Circuit (4) includes concatenated constant pressure source trilinear method bridge circuit, signal conditioning circuit and A/D converter circuit.
7. the universal used group of data processing system based on unified interface as claimed in claim 6, which is characterized in that the platinum
Resistance temperature Acquisition Circuit uses constant pressure source trilinear method measurement method.
8. the universal used group of data processing system based on unified interface as claimed in claim 7, which is characterized in that the letter
Number processing circuit includes concatenated bleeder circuit, Schmidt trigger and level translator.
9. the universal used group of data processing system based on unified interface as claimed in claim 8, which is characterized in that the number
Further include electric source monitoring circuit (11) according to processing system, using concatenated solid-state relay and isolated amplifier, realizes multichannel not
It is used to the voltage acquisition monitoring of group secondary power supply altogether.
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| CN108760074A (en) * | 2018-07-16 | 2018-11-06 | 深圳大学 | A kind of temperature collecting device of neutron detector |
| CN108924027A (en) * | 2018-09-19 | 2018-11-30 | 武汉库迪智能技术有限公司 | A kind of EtherCAT main station controller based on ARM kernel |
| CN109408456B (en) * | 2018-12-07 | 2023-08-29 | 中国地质大学（武汉） | S905D chip and STM32 chip based cooperative hardware circuit |
| CN109726155A (en) * | 2018-12-11 | 2019-05-07 | 四川九洲空管科技有限责任公司 | A kind of multi-bus interface system of airborne answering machine |
| CN109684251A (en) * | 2019-01-11 | 2019-04-26 | 杭州万高科技股份有限公司 | A kind of processing method of chip I/O data and a kind of chip |
| CN111177061A (en) * | 2019-12-31 | 2020-05-19 | 深圳市显控科技股份有限公司 | PLC extension module communication method, PLC and computer readable storage medium |
| CN113268100B (en) * | 2021-04-29 | 2022-04-22 | 中科慧远视觉技术(北京)有限公司 | Single-port multi-level input-output circuit and method |
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| CN115599722B (en) * | 2022-12-15 | 2023-03-17 | 深圳市欧瑞博科技股份有限公司 | Method and device for realizing accurate transmission of serial port data based on kernel of operating system |
| CN117074825B (en) * | 2023-08-17 | 2024-03-29 | 昆山迈致治具科技有限公司 | Integrated function test system and method |
| CN117033278B (en) * | 2023-10-08 | 2024-04-12 | 华能资本服务有限公司 | Data transmission method and system for multiple types of interfaces |
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| SU1686327A1 (en) * | 1989-02-08 | 1991-10-23 | Ереванский политехнический институт им.К.Маркса | Inertia-type testing rig for the brakes and clutches friction materials |
| CN100498230C (en) * | 2007-05-30 | 2009-06-10 | 中国人民解放军国防科学技术大学 | Aircraft posture testing system based on micro inertial measurement unit |
| PL210632B1 (en) * | 2011-02-02 | 2012-02-29 | Politechnika Świętokrzyska | System for measuring physical quantities during inertial tests |
| CN203012128U (en) * | 2012-11-21 | 2013-06-19 | 浙江国际海运职业技术学院 | Marine radar signal conversion device |
| CN103389092B (en) * | 2013-08-13 | 2016-03-02 | 湖南航天机电设备与特种材料研究所 | A kind of kite balloon airship attitude measuring and measuring method |
| CN106153072B (en) * | 2016-06-17 | 2019-07-12 | 北京航天时代激光导航技术有限责任公司 | A kind of test method and test macro of used group of ontology response frequency |
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