CN106649019A - Test method for overall automatic PCIE communication quality based on serial port - Google Patents
Test method for overall automatic PCIE communication quality based on serial port Download PDFInfo
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- CN106649019A CN106649019A CN201710018356.1A CN201710018356A CN106649019A CN 106649019 A CN106649019 A CN 106649019A CN 201710018356 A CN201710018356 A CN 201710018356A CN 106649019 A CN106649019 A CN 106649019A
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- Prior art keywords
- pcie
- test
- communication quality
- serial ports
- measured
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Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
- G06F11/221—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test buses, lines or interfaces, e.g. stuck-at or open line faults
Abstract
The invention discloses a test method for overall automatic PCIE (Peripheral Component Interface Express) communication quality based on a serial port. The test method comprises the following steps: on the basis of a speed for initializing a PCIE slot position bus in a POST process of a server, comparing the initialized information in the POST process with a preset PCIE standard bus speed by utilizing a redirecting function of the serial port, thereby judging the communication quality at a PCIE source end. According to the method disclosed by the invention, only a serial port line and a network cable can be used for connecting a Client test end, so as to test the communication quality of all the PCIE slot positions in the startup and shutdown processes of a to-be-tested machine through an automatic serial port information traversal test under the condition of the tested machine without a system, a peripheral and special settings, so that the stability of the PCIE slot positions of the system is improved and the test efficiency and the product competiveness can be improved.
Description
Technical field
The present invention relates to server system architecture Design technical field, and in particular to a kind of whole machine based on serial ports is certainly
Dynamicization PCIE communication quality method of testings.
Background technology
High-end server unit supports that PCIE grooves position is more and more, PCIE grooves position speed during original server switching on and shutting down
Degree stability is tested by running special test program under Linux system.Due to the Validity Test in the set time
Number of times is subject to the environmental structure time, the system set-up time, the available machine time, enters system time, operation program time tripartite under system
Face rings.
How PCIE grooves positions all to whole machine carry out effective, automatic, batch, efficient test within the set time, with
PCIE groove bit walk quality during evaluation and test switching on and shutting down, is the problem paid special attention in current System Architecture Design.
The content of the invention
The technical problem to be solved in the present invention is：The present invention is directed to problem above, there is provided a kind of whole machine based on serial ports is certainly
Dynamicization PCIE communication quality method of testings.
The technical solution adopted in the present invention is：
A kind of whole machine based on serial ports automates PCIE communication quality method of testings, and the method for testing is based on server POST mistakes
The speed that PCIE groove BITBUS networks are initialized in journey is foundation, using serial ports redirection function, by initialization information during POST
With setting PCIE STD bus velocity contrasts, to judge the communication quality of PCIE sources.
Restarting in test process is to be based on server B MC, server automated by ipmi orders control, is surveyed using VI
Examination software specifies the port numbers of Serial Port Transmission to generate test data with the BMC IP address of board to be measured, in specified board and string
The detection test of PCIE grooves bit rate is carried out on slogan, board to be measured is evaluated and tested by the Serial Port Information traversal test for automating and is opened
All PCIE grooves bit walk quality in shutdown process.
Collocation on PCIE grooves position meets the outer plug-in card of the PCIE 3.0 of groove bit length.
The HCA cards of the preferred PCIE 3.0 of the outer plug-in card.
The method of testing step is as follows：
1）The HCA cards of PCIE 3.0 are plugged on all PCIE grooves positions of server to be measured, server to be measured is led to Client ends
Cross Serial Port Line and netting twine interconnection；
2）Client ends are got out, Windows systems are installed at Client ends, labview program execution environments and VI tests are soft
Part bag and ipmi instruments " ipmitool.exe " copy C to:Under Windows；
3）VI test software bags are installed at Client ends, Client ends are restarted after installation；
4）Cmd command windows are opened at Client ends, the connection at client ends and BMC ends is checked by ping bmcip address commands
The general character；
5）VI test softwares are run at Client ends, in correspondence hurdle detection environment configuration information is filled in；
6）" beginning " program being hit in Client end points and starting automatic running, operation result is recorded at VI test softwares interface
Under Result hurdles, detection includes 3：1st, BMC connectivity check, 2, mainboard start check, 3, PCIE communication qualities check.
Step 4）In fill in detection environment configuration information content include：
1) it is input into board IP address to be measured on BMCIP hurdles；
2) awaiting board card title is filled on project name hurdle；
3) com port hurdle selects the serial port being connected with board to be measured recognized under Client end systems；
4) the PCIE STD bus speed for needing detection is inserted in Key hurdles.
Server to be measured is as follows with the connected mode at Client ends：The serial ports of server to be measured is by Serial Port Line and Client
End connection, the BMC network interfaces of server to be measured are connected by netting twine with Client ends.
The method of testing checks global test result by VI test softwares total counter and PASS hurdles, if tale
Device number=PASS hurdles counts, tests PASS, if total counter number ＞ PASS hurdles counts, tests FAIL.
If test FAIL, the position that specifically reports an error is checked by log daily records batch.
All PCIE grooves position link speed data during all switching on and shutting down of board to be measured are preserved in whole test process.
Beneficial effects of the present invention are：
The inventive method, only can connect Client test leads by Serial Port Line and netting twine, realize tested machine without system without
On the premise of peripheral hardware is without special setting, board switching on and shutting down process to be measured is evaluated and tested by the Serial Port Information traversal test for automating
In all PCIE grooves bit walk quality, promote system PCIE groove position stability, improve testing efficiency and product competitiveness.
With high-end 8 road server（Support 24 PCIE grooves positions）, hardware environment is in place, former as a example by 12 hour testing time
PCIE grooves bit walk quality is to run special test program under Linux system to be surveyed during the server switching on and shutting down of beginning
Examination, operating system is installed entirely to be needed 1.5 hours, to be started shooting carry out Programmable detection into system and is restarted to next time and at least need 5 minutes, and 12 is little
When at most 126 tests of operation；After using the whole machine automation PCIE communication quality method of testings based on serial ports, without the need for installing behaviour
Make system, start detection POST self-inspections information to next time is restarted only to be needed 2.5 minutes, can run within 12 hours 288 tests；From experiment
Data see that present invention testing efficiency under the equal time at least improves 2.3 times, greatly improves testing efficiency.
Description of the drawings
Fig. 1 is PXE server network environments configuration figure；
Fig. 2 is method of testing flow chart.
Specific embodiment
According to Figure of description, with reference to specific embodiment, the present invention is further described：
Embodiment 1：
A kind of whole machine based on serial ports automates PCIE communication quality method of testings, and the method for testing is based on server POST mistakes
It is foundation that PCIE groove BITBUS network speed is initialized in journey, using serial ports redirection function, by initialization information during POST with
The PCIE STD bus velocity contrasts of setting, to judge the communication quality of PCIE sources.
Embodiment 2
On the basis of embodiment 1, entirely restarting for test is, based on server B MC, to be taken by ipmi orders control to the present embodiment
Business device automation, specifies the port numbers of Serial Port Transmission to generate test number with the BMC IP address of board to be measured using VI test softwares
According to, the detection test of PCIE grooves bit rate is carried out on specified board and serial port, surveyed by the Serial Port Information traversal for automating
All PCIE grooves bit walk quality during trying to evaluate and test board switching on and shutting down to be measured.
Embodiment 3
On the basis of embodiment 2, the present embodiment is using PCIe 3.0 and the backward compatible characteristic of old edition PCIe infrastructure, PCIE grooves
The outer plug-in card of any PCIE 3.0 for meeting groove bit length of arranging in pairs or groups on position can realize PCIE groove BITBUS network velocity tests.
Embodiment 4
On the basis of embodiment 3, the present embodiment recommends the HCA cards of the PCIE 3.0 higher to PCIE signal quality requirement
Embodiment 5
As shown in Fig. 2 on the basis of embodiment 3, method of testing step is as follows described in the present embodiment：
1）The HCA cards of PCIE 3.0 are plugged on all PCIE grooves positions of server to be measured, server to be measured is led to Client ends
Cross Serial Port Line and netting twine interconnection；
2）Client ends are got out, Client ends must be Windows systems, labview program execution environments and VI are tested
Software kit and ipmi instruments " ipmitool.exe " copy C to:Under Windows；
3）VI test software bags are installed at Client ends, and Client ends are restarted after installation；
4）Cmd command windows are opened at Client ends, and by ping bmcip address commands the UNICOM at client ends and BMC ends is checked
Property, citing：Current server B MCIP to be measured is 192.168.0.104, and by command Window ping is performed
192.168.0.104, network link；
5）VI test softwares are run at Client ends, and in correspondence hurdle detection environment configuration information is filled in；By filling in call parameter,
Testing results, it is ensured that the port connection that Infiniband is externally interconnected is normal；
6）Client end points hits " beginning " program and starts automatic running, and operation result records the Result at VI test softwares interface
Under hurdle, detection includes 3：1st, BMC connectivity checks, 2, mainboard start check, 3, PCIE Check（PCIE communication qualities are examined
Look into）.
Infiniband architecture is concurrently to link " Convertion cable " technology more than a kind of support, every kind of in this technology
Link can reach the speed of service of 2.5 Gbps.This framework speed when a link was 500 MB/ seconds, four
Speed was 2 GB/ seconds when link, and speed can reach 6 GB/second when 12 links.
Embodiment 6
In the basis of embodiment 5, the present embodiment step 4）In fill in detection environment configuration information content include：
1) it is input into board IP address to be measured on BMCIP hurdles：192.168.0.104；
2) awaiting board card title, such as YZCA-00589-101 are filled in project name hurdle；
3) com port hurdle selects the serial port being connected with board to be measured recognized under Client end systems, such as COM3；
4) the PCIE STD bus speed for needing detection is inserted in Key hurdles.
Embodiment 7
As shown in figure 1, on the basis of embodiment 5, the present embodiment server to be measured is as follows with the connected mode at Client ends：It is to be measured
The serial ports of server, is connected by Serial Port Line with Client ends, and the BMC network interfaces of server to be measured are connected by netting twine with Client ends
Connect.After system connection is finished, it is ensured that board to be measured and Client ends connecting path are normal, can be with the equipment manager of client
Normal identification serial ports connection.
Embodiment 8
On the basis of embodiment 6 or 7, method of testing described in the present embodiment is checked by VI test softwares total counter and PASS hurdles
Global test result, if total counter number=PASS hurdles counts, tests PASS, if total counter number ＞ PASS
Hurdle counts, test FAIL.
Embodiment 9
On the basis of embodiment 8, if the present embodiment test FAIL, by log daily records batch the position that specifically reports an error is checked.
Example：
Skt[0], D[2]:F[2] Link up as x08 Gen3!
Skt[0], D[2]:F[1] Link Down!
Parsing：
Skt[n]:Represent corresponding PCIE grooves position under n-th CPU grooves position；
D[n]:F[n]:Be PCIE grooves position device ID and No. FunctionID, with reference to CPU grooves position position, can navigate to
Specific PCIE grooves position；
Link up as x08 Gen3!：It is PASS shown here as Gen3 if test is PCIE GEN3 grooves position, shows
Gen2 and Gen1 are FAIL；It is PASS shown here as Gen2 if test is PCIE Gen2 grooves position, shows Gen3 and Gen1
It is FAIL；Whether there is Gen2 and Gen1, Link up as x08 Gen2 in incomplete；
Link Down!：The groove position is fitted without PCIE device
Embodiment 10
On the basis of embodiment 9, the whole test process of the present embodiment preserves all PCIE during all switching on and shutting down of board to be measured
Groove position link speed data, are easy to the analysis in later stage.
Embodiment is merely to illustrate the present invention, and not limitation of the present invention, about the ordinary skill of technical field
Personnel, without departing from the spirit and scope of the present invention, can also make a variety of changes and modification, therefore all equivalents
Technical scheme fall within scope of the invention, the scope of patent protection of the present invention should be defined by the claims.
Claims (10)
1. a kind of whole machine based on serial ports automates PCIE communication quality method of testings, it is characterised in that the method for testing base
The speed that PCIE groove BITBUS networks are initialized during server POST is foundation, using serial ports redirection function, by POST mistakes
Initialization information and the PCIE STD bus velocity contrasts for setting in journey, to judge the communication quality of PCIE sources.
2. a kind of whole machine based on serial ports according to claim 1 automates PCIE communication quality method of testings, its feature
It is that restarting in test process is to be based on server B MC, it is server automated by ipmi orders control, tested using VI
Software specifies the port numbers of Serial Port Transmission to generate test data with the BMC IP address of board to be measured, in specified board and serial ports
The detection test of PCIE grooves bit rate is carried out on number, board switch to be measured is evaluated and tested by the Serial Port Information traversal test for automating
All PCIE grooves bit walk quality during machine.
3. a kind of whole machine based on serial ports according to claim 2 automates PCIE communication quality method of testings, its feature
It is that collocation on PCIE grooves position meets the outer plug-in card of the PCIE 3.0 of groove bit length.
4. a kind of whole machine based on serial ports according to claim 3 automates PCIE communication quality method of testings, its feature
It is that the outer plug-in card adopts the HCA cards of PCIE 3.0.
5. a kind of whole machine based on serial ports according to claim 4 automates PCIE communication quality method of testings, its feature
It is that the method for testing step is as follows：
1）The HCA cards of PCIE 3.0 are plugged on all PCIE grooves positions of server to be measured, server to be measured is led to Client ends
Cross Serial Port Line and netting twine interconnection；
2）Client ends are got out, Windows systems are installed at Client ends, labview program execution environments and VI tests are soft
Part bag and ipmi instruments " ipmitool.exe " copy C to:Under Windows；
3）VI test software bags are installed at Client ends, Client ends are restarted after installation；
4）Cmd command windows are opened at Client ends, the connection at client ends and BMC ends is checked by ping bmcip address commands
The general character；
5）VI test softwares are run at Client ends, in correspondence hurdle detection environment configuration information is filled in；
6）" beginning " program being hit in Client end points and starting automatic running, operation result is recorded at VI test softwares interface
Under Result hurdles, detection includes 3：BMC connectivity is checked, mainboard start is checked, PCIE communication qualities are checked.
6. a kind of whole machine based on serial ports according to claim 5 automates PCIE communication quality method of testings, its feature
It is, step 4）In fill in detection environment configuration information content include：
1) it is input into board IP address to be measured on BMCIP hurdles；
2) awaiting board card title is filled on project name hurdle；
3) com port hurdle selects the serial port being connected with board to be measured recognized under Client end systems；
4) the PCIE STD bus speed for needing detection is inserted in Key hurdles.
7. a kind of whole machine based on serial ports according to claim 5 automates PCIE communication quality method of testings, its feature
It is that server to be measured is as follows with the connected mode at Client ends：The serial ports of server to be measured is by Serial Port Line and Client ends
Connection, the BMC network interfaces of server to be measured are connected by netting twine with Client ends.
8. a kind of whole machine based on serial ports according to claim 6 or 7 automates PCIE communication quality method of testings, and it is special
Levy and be, the method for testing checks global test result by VI test softwares total counter and PASS hurdles, if tale
Device number=PASS hurdles counts, tests PASS, if total counter number ＞ PASS hurdles counts, tests FAIL.
9. a kind of whole machine based on serial ports according to claim 8 automates PCIE communication quality method of testings, its feature
It is, if test FAIL, the position that specifically reports an error to be checked by log daily records batch.
10. a kind of whole machine based on serial ports according to claim 9 automates PCIE communication quality method of testings, its feature
It is that all PCIE grooves position link speed data during all switching on and shutting down of board to be measured are preserved in whole test process.
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| CN201710018356.1A CN106649019B (en) | 2017-01-11 | 2017-01-11 | A kind of complete machine automation PCIE communication quality test method based on serial ports |
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| CN201710018356.1A CN106649019B (en) | 2017-01-11 | 2017-01-11 | A kind of complete machine automation PCIE communication quality test method based on serial ports |
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| CN107168840A (en) * | 2017-05-19 | 2017-09-15 | 郑州云海信息技术有限公司 | A kind of server UIDLED lamp function test methods for possessing foolproof function |
| CN108733505A (en) * | 2018-06-29 | 2018-11-02 | 北京广利核系统工程有限公司 | Board information calibration method in place and device |
| CN109428778A (en) * | 2017-08-24 | 2019-03-05 | 龙芯中科技术有限公司 | Mainboard network connectivty test method and device |
| CN111949554A (en) * | 2020-09-04 | 2020-11-17 | 苏州浪潮智能科技有限公司 | External plug-in card testing method and system |
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| CN111949554B (en) * | 2020-09-04 | 2022-08-12 | 苏州浪潮智能科技有限公司 | External plug-in card testing method and system |
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