CN106571692A - Wireless electric power receiving device and demodulation method therefor - Google Patents
Wireless electric power receiving device and demodulation method therefor Download PDFInfo
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- CN106571692A CN106571692A CN201510650147.XA CN201510650147A CN106571692A CN 106571692 A CN106571692 A CN 106571692A CN 201510650147 A CN201510650147 A CN 201510650147A CN 106571692 A CN106571692 A CN 106571692A
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Abstract
The invention puts forward a wireless electric power receiving device and a demodulation method therefor. The demodulation method comprises the following steps: a first electric power signal is received via a receiving wire coil at a first communication stage, the first electric power signal is converted into a first pulse width modulation signal, first pulse width of the first pulse width modulation signal is calculated, a second electric power signal is received via the receiving wire coil at a second communication stage, the second electric power signal is converted into a second pulse width modulation signal, second pulse width of the second pulse width modulation signal is calculated, the pulses of the second pulse width modulation signal is counted, and a count value is generated; whether frequency of the first electric power signal equals frequency of the second electric power signal is determined according to the first pulse width and the second pulse width, and therefore a determining signal is generated; whether the count value equals a preset quantity is determined; if the count value equals a default number, a corresponding level is output according to the determining signal, and a demodulation signal is generated.
Description
Technical field
The present invention is, with regard to a kind of wireless charging technology, to be especially applicable to wireless charging technology
In wireless receiving device and its demodulation method.
Background technology
Wireless charging technology, is also called contactless charging, passes because needing not rely on electric wire
Power transmission power and avoid may electric shock danger, it is not required that supply socket is without there is a plurality of electricity
The problem of the mutual winding of line, in using safety and convenience is above improved, many products on the market
Widely employing wireless charging technique.
Wireless charging technology is that charger is by line transmitting electric power through electromagnetic induction principle
Electric power signal is sent to the mode of circle coupling the electronic equipment of electricity consumption, comprising wireless in charger
Power transmission device, and wireless receiving device is included in the electronic equipment of electricity consumption, through wireless power transmission dress
The receiving coil that transmit coil is matched with the transmit coil put and wireless receiving device is closely pasted
Close to transmit electric power.Furthermore, during electric power is transmitted, wireless receiving device system is via solution
Unit is adjusted to be demodulated to enter between wireless power transmission device from the signal of wireless power transmission device
Row communication protocol sets, and wireless receiving device can be according to the need for electricity of electronic equipment transmission one
Packet (Packet) adjusts the electric power size for receiving to wireless receiving device.
However, the demodulating unit that used of wireless receiving device comprising amplifier, phase discriminator,
Low pass filter, voltage-controlled oscillator (VCO) (voltage-controlled oscillator；) and voltage VCO
Follower (Follower)；Amplifier to the electric power signal from transmit coil to put
Greatly, the output of amplified electric power signal with voltage-controlled oscillator (VCO) is sent to phase discriminator to produce phase
Position error voltage, phase error voltage need to be filtered via low pass filter, and voltage follow
Device produces demodulated signal according to the phase error voltage after filtering, causes late-class circuit to produce aforementioned
Packet.Therefore, known demodulation process is complicated and circuit composition is complicated, and then causes electricity
Road difficult design and improve production cost.
The content of the invention
In view of this, the present invention proposes a kind of wireless receiving device and its demodulation method.
In one embodiment, a kind of wireless receiving device comprising receiving coil, demodulating unit and
Control unit；Control unit couples demodulating unit, and control unit receives a demodulated signal to produce
Power controlling signal.Demodulating unit includes zero-crossing circuit for detecting, pulse-scaling circuit, pulse
Width circuit for detecting and decoding circuit.Zero-crossing circuit for detecting is according to zero-crossing o'clock by the first electric power
Signal is converted to one first pulse width modulating signal, and is believed the second electric power according to zero-crossing o'clock
Number be converted to one second pulse width modulating signal；Pulse-scaling circuit is according to a frequency signal meter
The quantity of multiple pulses of several second pulse width modulating signals is producing a count value；Pulse width
Degree circuit for detecting calculates the first pulse width of the first pulse width modulating signal according to frequency signal
Degree, and the second pulse width of the second pulse width modulating signal is calculated according to frequency signal；Translate
Code circuit judges that the frequency of the second electric power signal is according to the first pulse width and the second pulse width
The no frequency for being same as the first electric power signal to produce a judgement signal, when count value it is silent equal to one
When recognizing quantity, decoding circuit is according to judging the corresponding logic level of signal output to produce a demodulation
Signal.
In one embodiment, one kind is suitable to the demodulation method of wireless receiving device comprising via one
Receiving coil receives one first electric power signal, the first electric power signal of conversion in the first communication stage
The first pulse of one of one first pulse width modulating signal, the first pulse width modulating signal of calculating
Width, receive one second electric power signal, conversion the in one second communication stage via receiving coil
Two electric power signals are one second pulse width modulating signal, calculate the second pulse width modulating signal
One of the second pulse width, count the second pulse width modulating signal multiple pulses quantity with
Produce a count value, the first electric power signal is judged according to the first pulse width and the second pulse width
Frequency whether be same as the frequency of the second electric power signal to produce a judgement signal, judge to count
Whether value is equal to a predetermined number, if count value is equal to default amount, according to judging signal output
Corresponding logic level is producing a demodulated signal.
In sum, in one of the wireless receiving device embodiment of the present invention, the second demodulation
The electric power signal of receiving coil reception is converted to pulse signal by unit, the second demodulating unit by
The pulse width of detection pulse signal judges whether the frequency of electric power signal is modulating frequency, and the
Two demodulating units produce demodulated signal according to testing result correspondence, so just simplify demodulation process
And the degree of difficulty of circuit design is reduced, and then reduce circuit cost.
Description of the drawings
Fig. 1 is the functional block diagram according to one of the wireless charging system of present invention embodiment.
Fig. 2 is the functional block diagram of one of second demodulating unit of Fig. 1 embodiment.
Fig. 3 for Fig. 2 zero-crossing circuit for detecting generation the first pulse width modulating signal and
The oscillogram of the second pulse width modulating signal.
Fig. 4 is the functional block diagram of the first embodiment of the pulse width circuit for detecting of Fig. 2.
Fig. 5 is the functional block diagram of one of the decoding circuit of Fig. 2 embodiment.
Fig. 6 is the function according to one of the frequency detector and multiplexer of present invention embodiment
Block diagram.
Fig. 7 is the functional block diagram of the second embodiment of the pulse width circuit for detecting of Fig. 2.
Fig. 8 is the flow chart according to one of the demodulation method of present invention embodiment.
Specific embodiment
Fig. 1 is the functional block diagram according to one of the wireless charging system of present invention embodiment,
Fig. 1 is refer to, wireless charging system includes wireless power transmission device 10 and wireless receiving device 20,
Wireless power transmission device 10 and wireless receiving device 20 are further detailed individually below.
Wireless power transmission device 10 is single comprising driver element 11, the control of transmitting coil 12, first
Unit 13, the demodulating unit 15 of frequency modulation unit 14 and first are (for the wireless power transmission device 10 of difference and nothing
The demodulating unit of line current-collecting device 20, the demodulating unit of wireless power transmission device 10 is referred to as first
Demodulating unit 15, the demodulating unit of wireless receiving device 20 is referred to as the second demodulating unit 22；
Also, to distinguish the control unit of wireless power transmission device 10 and wireless receiving device 20, wirelessly
The control unit of power transmission device 10 is referred to as the first control unit 13, the control of wireless receiving device 20
Unit processed is referred to as the second control unit 25).Driver element 11 produces pulse signal and puts on transmitting
Coil 12 is launched electric power signal E to wireless receiving device 20 with ordering about transmitting coil 12；The
One demodulating unit 15 can receive the packet comprising power controlling signal S4 via transmitting coil 12
P, the first demodulating unit 15 is demodulated to obtain power controlling signal S4 to packet P；Control
Circuit processed 13 controls frequency modulation unit 14 and produces different FM signals according to power controlling signal S4
S3 uses the corresponding arteries and veins of generation changing the switching frequency of driver element 11 or the dutycycle of switch
Rush signal and send the electric power signal E with different frequency to order about transmitting coil 12, and then change
The electric power size that wireless receiving device 20 is received.
Wireless receiving device 20 includes receiving coil 21, the second demodulating unit 22, rectification list
Unit 23, charhing unit 24, the second control unit 25 and AM unit 26.The coupling of receiving coil 21
Connect the second demodulating unit 22 and AM unit 26, the second demodulating unit 22 and the second control unit
25 are sequentially serially connected between receiving coil 21 and AM unit 26, and rectification unit 23 is coupled to and connects
Between take-up circle 21 and charhing unit 24.Receiving coil 21 receive from transmitting coil 12 it
Electric power signal E, and packet P is sent to wireless power transmission device 10, packet P is except bag
Also comprising peak power restriction, modulation levels and wireless receiving device outside S4 containing power controlling signal
The information such as 20 identifier (Identification Number)；Second demodulating unit 22 is to electric power
Signal E is demodulated and produces demodulated signal S2 to carry out communication protocols with wireless power transmission device 10
View setting, the second control unit 25 controls AM unit 26 according to demodulated signal S2 and changes coupling
The frequency or dutycycle of the switch of AM unit 26 are connected to, are used and is ordered about receiving coil 21 and send
Packet P with correspondence power controlling signal S4；Rectification unit 23 turns electric power signal E
Direct current signal is changed to, causes charhing unit 24 to be charged according to direct current signal.
Furthermore, the mistake communicated between wireless power transmission device 10 and wireless receiving device 20
Journey can divide into out of phase (Phase), with wireless charging alliance (Wireless Power
Consortium；WPC) as a example by the Qi standards formulated, communication process includes three phase places, point
(Ping) phase place, certification and setting phase place (Identification＆ Wei not transmitted
Configuration phase) and electric power transmission phase place (Power transfer phase).
In phase place is transmitted, transmitting coil 12 sends at set intervals electric power signal E
(for example, less than or equal to 500ms) is confirming whether it nearby has wireless receiving device 20 to deposit
If the inspection of wireless power transmission device 10 detects wireless receiving device 20, communication process is then by transmitting
Phase transition to certification and setting phase place, wireless power transmission device 10 are received from wireless receiving device
The 20 packet P for being sent, and communication process is then passed by certification with setting phase transition to electric power
Phase place, wireless power transmission device 10 is sent to start to send electric power signal to wireless receiving device 20
E。
Fig. 2 is the functional block diagram of one of second demodulating unit 22 of Fig. 1 embodiment, please
With reference to Fig. 2, the second demodulating unit 22 comprising zero-crossing circuit for detecting 221, filter circuit 222,
Pulse-scaling circuit 223, pulse width circuit for detecting 224 and decoding circuit 225.Zero-crossing is detectd
Slowdown monitoring circuit 221, filter circuit 222 and pulse width circuit for detecting 224 are sequentially serially connected with reception line
Between circle 21 and decoding circuit 225, pulse-scaling circuit 223 is then coupled to filter circuit 222
And between pulse width circuit for detecting 224, and in filter circuit 222 and decoding circuit 225 it
Between.
By taking aforementioned Qi standards as an example, below wireless power transmission device 10 is received into Denso with wireless
Put the communication process between 20 to divide into two stages to illustrate, the first communication stage included and transmits
Phase place, the second communication stage includes certification and setting phase place and electric power transmission phase place, receiving coil
21 can respectively receive different electric power signals in the first communication stage and the second communication stage, receive
Coil 21 receives the first electric power signal E1 in the first communication stage, and connects in the second communication stage
Receive the second electric power signal E2.First electric power signal E1 and the second electric power signal E2 are string ripple letter
Number and belong to analog signal.
As shown in Fig. 2 the input of zero-crossing circuit for detecting 221 is electrically connected with receiving coil
21, to receive the first electric power signal E1 and the second electric power signal E2, zero-crossing circuit for detecting 221
First electric power signal E1 and the second electric power signal E2 is simulated into numeral conversion, the first pulse
Bandwidth modulation signals P1 and the second pulse width modulating signal P2 systems are data signal, zero-crossing
First electric power signal E1 is converted to the first pulse width modulating signal P1 by circuit for detecting 221,
And the second electric power signal E2 is converted to into the second pulse width modulating signal P2；In detail, zero
Hand over and get over circuit for detecting 221 using 0 volt (V) as zero-crossing point, and with fixed frequency to first
Electric power signal E1 and the second electric power signal E2 are sampled, and zero-crossing circuit for detecting 221 judges
Signal after sampling is greater than 0V, equal to 0V or less than 0V sequentially producing a plurality of numerals
Signal is producing the first pulse width modulating signal P1 and the second pulse width modulating signal P2.
For example, if the first electric power signal E1 that is sampled to of zero-crossing circuit for detecting 221
For 0.8V (being more than 0V), then zero-crossing circuit for detecting 221 exports logical one (i.e. high electricity
Position) the first pulse width modulating signal P1, if zero-crossing circuit for detecting 221 be sampled to the
One electric power signal E1 is -0.4V (being less than or equal to 0V), then zero-crossing circuit for detecting 221 is defeated
Go out the first pulse width modulating signal P1 of logical zero (i.e. electronegative potential).In the same manner, the second arteries and veins
Rush bandwidth modulation signals P2 also can analogize according to the second electric power signal E2 according to aforementioned conversion regime,
Repeat no more in this.
Fig. 3 believes for the first pulse width modulation of the generation of zero-crossing circuit for detecting 221 of Fig. 2
The oscillogram of number P1 and the second pulse width modulating signal P2, as shown in figure 3, the first pulse
Bandwidth modulation signals P1 and the second pulse width modulating signal P2 is comprising high potential and electronegative potential
Believe for data signal, also, the first pulse width modulating signal P1 and the second pulse width modulation
Number P2 includes multiple pulses, for example, in interval T1, the first pulse width modulation letter
The number of pulses of number P1 is 2, and the number of pulses of the second pulse width modulating signal P2 is 2.5.
Please referring again to Fig. 2, the input of filter circuit 222 is electrically connected with zero-crossing detecting
The output end of circuit 221, filter circuit 222 receives the first pulse width signal P1 and the second arteries and veins
Rush width signal P2, filter circuit 222 is by the first pulse width signal P1 and the second pulse width
Degree signal P2 in noise filtering and export filtering after the first pulse width signal P1 and second
Pulse width signal P2.Filter circuit 222 can be realized by multiple resistance and electric capacity.
The input of pulse width circuit for detecting 224 is electrically connected with the output of filter circuit 222
End, pulse width circuit for detecting 224 accept filter respectively after the first pulse width modulating signal
P1 and the second pulse width modulating signal P2, pulse width circuit for detecting 224 calculates the first pulse
The pulse width of bandwidth modulation signals P1 and the second pulse width modulating signal P2, and it is defeated respectively
Go out the first pulse width W1 and the second pulse width W2.First pulse width W1 system is to make
It is, than base value, to use the frequency for judging the second electric power signal E2 with the second pulse width W2 ratio
Whether the frequency of first electric power signal E1 is same as, and for example Fig. 3 systems are with the second pulse width W2
Differ as a example by the first pulse width W1, use and represent the second electric power signal Jing after frequency modulation
The frequency of E2 is differed in the frequency of the first electric power signal E1, if the frequency of the second electric power signal E2
Rate is essentially the same as the frequency of the first electric power signal E1, then the first pulse width W1 is same as
Second pulse width W2.
Base this, two inputs of decoding circuit 225 receive respectively the first pulse width W1 and
Second pulse width W2, and according to the first pulse width W1 and the second pulse width W2 sentencing
Whether the frequency of disconnected second electric power signal E2 is same as the frequency of the first electric power signal E1；Again
Person, pulse-scaling circuit 223 is received and produced from a front stage circuits (not shown) such as frequency
Frequency signal CLK, the first pulse width modulating signal P1 of device (clock generator) and
Second pulse width modulating signal P2, pulse-scaling circuit 223 is counted according to frequency signal CLK
The quantity of the pulse of the second pulse width modulating signal P2 simultaneously exports the count value for representing number of pulses
N, when count value N is equal to default amount, decoding circuit 225 is defeated according to aforementioned judged result
Go out corresponding logic level to produce demodulated signal S2.
So that the second pulse width modulating signal P2 includes 256 pulses as an example, it is assumed that acquiescence
Quantity is 256, and decoding circuit 225 is receiving 256 of the second pulse width modulating signal P2
Corresponding demodulated signal S2 is exported after pulse.Consequently, it is possible to from the second of receiving coil 21
Electric power signal E2 is demodulated and completed.
In the present embodiment, the first pulse width W1 and the second pulse width W2 can be flat
Equal pulse width or total pulse widths, typical pulse width can be with average frequency cycle (clock
Cycle) digital value of number is representing, and total pulse widths can be with the digital value of sum frequency periodicity
To represent.Pulse width circuit for detecting 224 calculates the multiple of the first pulse width modulating signal P1
Average frequency periodicity or sum frequency periodicity between pulse is producing the first pulse width W1
Digital value, and pulse width circuit for detecting 224 calculate the second pulse width modulating signal P2 it
Average frequency periodicity or sum frequency periodicity between multiple pulses is producing the second pulse width
The digital value of W2, for example, by taking the first pulse width modulating signal P1 as an example, if first
The rising edge of first pulse of pulse width modulating signal P1 is intermarginal with the decline of the 6th pulse
Every 20 frequency cycles, the then rising of first pulse of the first pulse width modulating signal P1
Edge is spaced 2 frequency cycles, the output average pulse of pulse width circuit for detecting 224 with falling edge
Width is 2 the first pulse width W1.
Fig. 4 is the function block of the first embodiment of the pulse width circuit for detecting 224 of Fig. 2
Figure, refer to Fig. 4, and pulse width circuit for detecting 224 includes demultiplexer (de-
Multiplexer) 2247, two counters, 2241,2242, two dividers 2245,2246
And two buffers 2243,2244 are (for convenience of description, two 2241,2242 points of counters
Not Cheng Zhiwei the first counter 2241 and the second counter 2242, two dividers 2245,
2246 are referred to as the first divider 2245 and the second divider 2246, two buffers
2243rd, 2244 are referred to as the first buffer 2243 and the second buffer 2244), Xie Duoren
Business device 2247, the first counter 2241, the first divider 2245 and the first buffer 2243 according to
Sequence is serially connected between filter circuit 222 and decoding circuit 225, and demultiplexer 2247,
Two counters 2242, the second divider 2247 and the second buffer 2244 are also sequentially serially connected with filter
Between wave circuit 222 and decoding circuit 225.
In this, the control end of demultiplexer 2247 receive from wireless power transmission device 10 it
Phase signal (not shown), to communicate the stage by the first pulse width in first according to phase signal
Modulated signal P1 selects output to the first counter 2241, and the first counter 2241 receives first
Pulse width modulating signal P1 and frequency signal CLK, the first counter 2241 is believed according to frequency
Number CLK counts in the first pulse width modulating signal P1 the rising of the pulse of first plus total quantity
Sum frequency periodicity between edge (rising edge) and falling edge (falling edge), to produce
Raw first frequency number of cycles CC1 is simultaneously sent to the first divider 2245, the first divider
2245 is divided by first frequency number of cycles CC1 and first plus total quantity represent average arteries and veins to produce
The first pulse width W1 of width is rushed, and is stored in the first buffer 2243.
In the same manner, demultiplexer 2247 will in the second communication stage according to Such phase signal
Second pulse width modulating signal P2 selects output to the second counter 2242, the second counter
2242 receive the second pulse width modulating signal P2 and frequency signal CLK, the second counter
2242 according in frequency signal CLK the second pulse width modulating signal P2 of counting second plus sum
Total frequency between the rising edge (rising edge) and falling edge (falling edge) of the pulse of amount
Rate periodicity, to produce second frequency number of cycles CC2 and be sent to the second divider 2246,
Second divider 2246 is by second frequency number of cycles CC2 is with second plus total quantity is divided by with defeated
Go out to represent the second pulse width W2 of typical pulse width, and be stored in the second buffer 2244
In.
On the implementation, pulse-scaling circuit 223 according to frequency signal CLK more to count
The quantity of multiple pulses of the first pulse width modulating signal P1 producing count value N, the first meter
The number counter 2242 of device 2241 and second can be counted respectively according to count value N of different phase
First plus total quantity pulse and second plus total quantity pulse, and designer can according to circuit into
This designed, designed first plus total quantity and second plus total quantity, first adds total quantity and the second totalling
Quantity may be less than or equal to predetermined number, and so that aforementioned predetermined number is for 256 as an example, first adds
Total quantity and second plus total quantity may be less than or equal to 256, such as 16,32 or 64；Also,
Second plus total quantity can differ in first plus total quantity.
Fig. 5 is the functional block diagram of one of the decoding circuit 225 of Fig. 2 embodiment, be refer to
Fig. 5, decoding circuit 225 includes arithmetic element 2251, comparator 2252 and processor 2253
Sequentially it is serially connected between the control unit 25 of pulse width circuit for detecting 224 and second, and in pulse
Between the control unit 25 of counting circuit 223 and second, two inputs point of arithmetic element 2251
Not the first pulse width W1 and the are not received from the first buffer 2243 and the second buffer 2244
Two pulse widths W2, to calculate the difference of the first pulse width W1 and the second pulse width W2
D (that is, difference D is W1-W2 or W2-W1).Arithmetic element 2251 can with adder,
Subtracter or ALU (Arithmetic Logic Unit；ALU) realizing.
One input of comparator 2252 receives preset difference value D1, and comparator 2252
Another input receive arithmetic element 2251 produce difference D.Comparator 2252 will be default
Difference D1 is compared to each other with difference D and according to this output one judges signal S1, when difference D is more than
During preset difference value D1, represent the frequency of the second electric power signal E2 with the first electric power signal E1's
Frequency is differed, and comparator 2252 is output as the judgement signal S1 of logical one；When difference D
During less than or equal to preset difference value D1, the frequency and the first electric power of the second electric power signal E2 is represented
The frequency of signal E1 is identical, and comparator 2252 exports the judgement signal S1 of logical zero.
Three receiving terminals of processor 2253 receive respectively predetermined number, count value N and sentence
Break signal S1, processor 2253 first judges that pulse-scaling circuit 223 is produced in the second communication stage
Count value N whether be equal to predetermined number, when count value N that the second communication stage produced is equal to
During predetermined number, processor 2253 exports corresponding logic level to produce according to judging signal S1
Raw demodulated signal S2.For example, if predetermined number be 256, in second communication the stage when it
Count value N be 256 when, processor 2253 according to judge signal S1 output demodulated signal S2,
Demodulated signal S2 of high potential is output as if judging signal S1 for high potential, if judging signal
S1 is demodulated signal S2 that electronegative potential then exports electronegative potential.On the implementation, processor 2253 can
Realized with multiple comparators and multiplexer；Or, processor 2253 also can be microcontroller
(Microcontroller Unit；MCU), and by firmware control.
In certain embodiments, preset difference value D1 systems can according to wireless receiving device 20 with
The operating frequency of wireless power transmission device 10 setting in certification with setting phase place is determining.Refer to
Fig. 6, wireless receiving device 20 further include frequency detector (Frequency detector) 27 and
Multiplexer 28 is sequentially concatenated；The output end of multiplexer 28 is electrically connected at comparator 2252
The input of preset difference value D1 is received, frequency detector 27 detects the work of the first electric power signal E1
Working frequency simultaneously corresponds to output difference selection signal S5 to multiplexer 28, with four kinds of operating frequencies
As a example by, multiplexer 28 can be 4 pairs of 1 multiplexers (4-to-1multiplexer), multitask
Four inputs of device 28 receive respectively the first difference D2, the second difference D3, the 3rd difference
D4 and the 4th difference D5, the control end of multiplexer 28 is electrically connected with frequency detector 27
Output end, to receive difference selection signal S5, multiplexer 28 is according to difference selection signal S5
By one of the first difference D2, the second difference D3, the 3rd difference D4 and the 4th difference D5 person
Correspondence exports to produce preset difference value D1.
Fig. 7 is the function block of the second embodiment of the pulse width circuit for detecting 224 of Fig. 2
Figure, refer to Fig. 7, be that pulse width circuit for detecting 224 is included with the Main Differences of Fig. 4
One counter 2248 (for convenience of description, referred to as the 3rd counter 2248), also, solve
Multiplexer 2249 is electrically connected between the 3rd counter 2248 and the first buffer 2243,
And be connected between the 3rd counter 2248 and the second buffer 2244.In the present embodiment,
First pulse width W1 and the second pulse width W2 can be to represent total with sum frequency periodicity
Pulse width, that is to say, that the 3rd counter 2248 receives the first pulse in the first communication stage
After bandwidth modulation signals P1, the 3rd counter 2248 counts the first arteries and veins according to frequency signal CLK
Rush the rising edge (rising edge) of bandwidth modulation signals P1 plus total quantity pulse and decline
Sum frequency periodicity between edge (falling edge) is used as the first pulse width W1, citing
For, it is assumed that the rising edge of each pulse is spaced with falling edge in the first pulse width modulating signal P1
2 frequency cycles, and add total quantity to be 16, then the 3rd counter 2248 exports the first of 32
Pulse width W1.The control end receiving phase signal of demultiplexer 2249, demultiplexer
First pulse width W1 is selected output to the first buffer 2243 by 2249 according to phase signal.
In the same manner, the 3rd counter 2248 connects in certification with setting phase place and electric power transmission phase place
After receiving the second pulse width modulating signal P2, the 3rd counter 2248 is according to frequency signal CLK
Count the rising edge (rising of the second pulse width modulating signal P1 plus total quantity pulse
Edge the sum frequency periodicity) and between falling edge (falling edge) is producing the second pulse width
Degree W2.Demultiplexer 2249 selects the second pulse width W2 according to phase signal to export
To the second buffer 2244.
On the implementation, the 3rd counter 2248 can be according to count value N in the first communication stage
To count the first pulse width modulating signal P1 plus total quantity pulse, and the 3rd counter
2248 can count the second pulse width modulating signal P2 according to count value N in the second communication stage
Plus total quantity pulse, and designer can design plus total quantity according to circuit cost, add up
Quantity may be less than or equal to predetermined number, so that aforementioned predetermined number is for 256 as an example, plus sum
Amount can be 256,128 or 16.
The first caching is separately stored in the first pulse width W1 and the second pulse width W2
After the buffer 2244 of device 2243 and second, decoding circuit 225 is equal to present count in count value N
Demodulated signal S2 is produced according to the first pulse width W1, the second pulse width W2 during amount.
In certain embodiments, the second demodulating unit 22 more (can scheme not comprising filter circuit
Show), by the noise filtering in demodulated signal S2, filter circuit can be moved by counter and noise
Sequentially concatenate to realize except device；Counter receives demodulated signal S2, and counts demodulated signal S2
In each pulse pulse width to produce a count value, and noise removal device is according to aforementioned count value
Whether the pulse width of each pulse of demodulated signal S2 is judged less than a predetermined width, when demodulation letter
When the pulse width of the pulse of number S2 is less than acquiescence width, noise removal device is removed it and exported
Filtered demodulated signal S2.For example, if predetermined width is 20, and demodulated signal S2
In a pulse pulse width be 15, then noise removal device aforementioned pulse is judged as into noise arteries and veins
Punching, noise removal device exports filtered demodulated signal S2 after noise pulse is removed.
Fig. 8 is the flow chart according to one of the demodulation method of present invention embodiment, is please joined simultaneously
According to Fig. 2 and Fig. 8, in the first communication stage, receiving coil 21 receives the first electric power signal E1
(step S01), zero-crossing circuit for detecting 221 changes the first electric power signal E1 into the first pulse
Bandwidth modulation signals P1 (step S02), pulse width circuit for detecting 224 calculates the first pulse width
First pulse width W1 (step S03) of degree modulated signal P1；In the second communication stage,
Receiving coil 21 receives the second electric power signal E2 (step S04), zero-crossing circuit for detecting 221
The second electric power signal is changed into the second pulse width modulating signal P2 (step S05), pulse width
Circuit for detecting 224 calculates the second pulse width W2 (step of the second pulse width modulating signal P2
Rapid S06)；Furthermore, pulse-scaling circuit 223 count the second pulse width modulating signal P2 it
, to produce count value N (step S07), decoding circuit 225 is according to first for the quantity of multiple pulses
Pulse width W1 and the second pulse width W2 judge the frequency of the first electric power signal E1 whether phase
The frequency for being same as the second electric power signal E2 judges signal S1 (step S08) to produce, and decodes
Circuit 225 judges whether count value N is equal to predetermined number, if count value N is equal to acquiescence number
Amount, according to judging the signal S1 corresponding logic levels of output to produce demodulated signal S2 step
S09)。
In step S03, the first counter 2241 counts the first pulse width modulating signal
The first of P1 adds average frequency number of cycles of the pulse of total quantity between rising edge and falling edge
To produce the first pulse width W1；Also, in step S06, the second counter 2242 is counted
The second of several second pulse width modulating signal P2 adds the pulse of total quantity in rising edge and falling edge
Between average frequency number of cycles producing the second pulse width W2.
Or, in step S03 and step S06, can be by 2248 points of the 3rd counter
Not Lei Jia the first pulse width modulating signal P1 and the second pulse width modulating signal P2 it is identical
Plus total quantity frequency cycle number of the pulse between rising edge and falling edge producing respectively
First pulse width W1 and the second pulse width W2.
In certain embodiments, step S08 is included, by the detecting of frequency detector 27 the
The frequency of one electric power signal E1, multiplexer 28 is according to the frequency of the first electric power signal E1 correspondence
Produce acquiescence difference D1.Also, arithmetic element 2251 calculates the first pulse width W1 and the
Difference D of two pulse widths W2, after the generation preset difference value D1 of multiplexer 28 is produced,
Comparator 2252 judges whether difference D is more than preset difference value D1 to judge the first electric power signal E1
Frequency whether be same as the frequency of the second electric power signal E2.If difference D is more than preset difference value
D1, the frequency for representing the first electric power signal E1 is differed in the frequency of the second electric power signal E2,
If difference D is less than or equal to preset difference value D1, the frequency essence of the first electric power signal E1 is represented
On be same as the frequency of the second electric power signal E2.
In sum, in one of the wireless receiving device embodiment of the present invention, the second demodulation
The electric power signal that receiving coil is received is converted to pulse signal by unit, the second demodulating unit by
The pulse width of detection pulse signal judges whether the frequency of electric power signal is modulating frequency, and the
Two demodulating units produce demodulated signal according to testing result correspondence, so just simplify demodulation process
And the degree of difficulty of circuit design is reduced, and then reduce circuit cost.
Although the present invention is not limited to the present invention with embodiment right its disclosed above, appoint
What those of ordinary skill in the art, in the spirit and scope without departing from the present invention
It is interior, when can make a little change and retouching, therefore the protection domain of the present invention attached patent after regarding
Application range the person of defining be defined.
Description of reference numerals
10 wireless power transmission devices
11 driver elements
12 transmitting coils
13 first control units
14 frequency modulation units
15 first demodulating units
20 wireless receiving devices
21 receiving coils
22 second demodulating units
221 zero-crossing circuit for detecting
222 filter circuits
223 pulse-scaling circuits
224 pulse width circuit for detecting
2241 first counters
2242 second counters
2243 first buffers
2244 second buffers
2245 first dividers
2246 second dividers
2247 demultiplexers
2248 the 3rd counters
2249 demultiplexers
225 decoding circuits
2251 arithmetic elements
2252 comparators
2253 processors
23 rectification units
24 charhing units
25 second control units
26 AM units
27 frequency detectors
28 multiplexers
CC1 first frequency number of cycles
CC2 second frequency number of cycles
CLK frequency signals
D differences
D1 preset difference values
The differences of D2 first
The differences of D3 second
The differences of D4 the 3rd
The differences of D5 the 4th
E electric power signals
The electric power signals of E1 first
The electric power signals of E2 second
S1 judges signal
S2 demodulated signals
S3 FM signals
S4 power controlling signals
S5 difference selection signals
T1 is interval
N count values
P packets
The pulse width modulating signals of P1 first
The pulse width modulating signals of P2 second
V1 phase error voltages
The pulse widths of W1 first
The pulse widths of W2 second
Step S01 receives the first electric power signal via receiving coil
Step S02 changes the first electric power signal into the first pulse width modulating signal
Step S03 calculates the first pulse width of the first pulse width modulating signal
Step S04 receives the second electric power signal via receiving coil
Step S05 changes the second electric power signal into the second pulse width modulating signal
Step S06 calculates the second pulse width of the second pulse width modulating signal
Step S07 count the second pulse width modulating signal multiple pulses quantity with
Produce count value
Step S08 judges the first electric power according to the first pulse width and the second pulse width
Whether the frequency of signal is same as the frequency of the second electric power signal to produce judgement signal
Step S09 judges whether count value is equal to predetermined number, if count value is equal to writing from memory
Quantity is recognized, according to judging the corresponding logic level of signal output to produce demodulated signal
Claims (10)
1. a kind of wireless receiving device, is suitable to wireless charging system, and the wireless receiving device is included：
One receiving coil, the first communication stage that was used to receives one first electric power signal, and this connects
Take-up circle receives one second electric power signal in the second communication stage；
One demodulating unit, couples the receiving coil, and the demodulating unit is included：
One zero-crossing circuit for detecting, to according to a zero-crossing point by first electric power signal
Be converted to one first pulse width modulating signal, and it is according to the zero-crossing point that this is second electric
Force signal is converted to one second pulse width modulating signal；
One pulse-scaling circuit, to count second pulse width according to a frequency signal
The quantity of multiple pulses of modulated signal is producing a count value；
One pulse width circuit for detecting, to calculate first pulse according to the frequency signal
One first pulse width of bandwidth modulation signals, and according to the frequency signal calculate this second
One second pulse width of pulse width modulating signal；And
One decoding circuit, to be sentenced with second pulse width according to first pulse width
Whether the frequency of disconnected second electric power signal is same as the frequency of first electric power signal to produce
Raw one judges signal, when the count value is equal to a default amount, the decoding circuit according to
The corresponding logic level of judgement signal output is producing a demodulated signal；And
One control unit, couples the demodulating unit, to receive the demodulated signal to produce electric power
Control signal.
2. wireless receiving device as claimed in claim 1, wherein the pulse width circuit for detecting bag
Containing a counter, the counter according to the frequency signal to add up first pulse width
Frequency cycle number of modulated signal plus total quantity the pulse between rising edge and falling edge
Mesh to produce first pulse width, and the counter according to the frequency signal add up this
Two pulse width modulating signals should plus total quantity pulse between rising edge and falling edge
Frequency cycle number producing second pulse width；Wherein, total quantity should be added to be less than
Or equal to the predetermined number.
3. wireless receiving device as claimed in claim 1, wherein the pulse width circuit for detecting bag
Contain：
One first counter, to be added up first pulse width modulation letter according to the frequency signal
Number first plus total quantity first frequency cycle of the pulse between rising edge and falling edge
Number；
One first divider, to by the first frequency number of cycles with this first plus total quantity phase
Divided by produce first pulse width, this first plus total quantity be less than or equal to the present count
Amount；
One second counter, to be added up second pulse width modulation letter according to the frequency signal
Number second plus total quantity second frequency cycle of the pulse between rising edge and falling edge
Number；And
One second divider, to by the second frequency number of cycles with this second plus total quantity phase
Divided by produce second pulse width, this second plus total quantity be less than or equal to the present count
Amount；
Wherein, this second plus total quantity be not equal to this first plus total quantity.
4. wireless receiving device as claimed in claim 2 or claim 3, wherein pulse width detecting electricity
Road further includes one first buffer and one second buffer, and first buffer is to store
First pulse width, to store second pulse width, this is translated second buffer
Code circuit is included：
One arithmetic element, to from first buffer and second buffer read respectively this
One pulse width and second pulse width are calculating a difference；
One comparator, to compare the difference with a preset difference value to produce the judgement signal；And
One processor, to judge whether the count value is equal to the predetermined number, if the count value
Equal to the predetermined number, the processor is according to the corresponding logic level of judgement signal output
To produce the demodulated signal.
5. wireless receiving device as claimed in claim 4, further includes more than a frequency detector and one
Task device, the frequency detector detects the frequency of first electric power signal, the multiplexer
The acquiescence difference is produced according to the frequency of first electric power signal correspondence.
6. wireless receiving device as claimed in claim 1, further includes a filter circuit, to incite somebody to action
The signal produced after first electric power signal and the second electric power signal conversion is filtered respectively
Ripple is producing first pulse width modulating signal and second pulse width modulating signal.
7. a kind of demodulation method, is suitable to a wireless receiving device, comprising：
One first electric power signal is received via a receiving coil in the first communication stage；
First electric power signal is changed into one first pulse width modulating signal；
Calculate the first pulse width of first pulse width modulating signal；
One second electric power signal is received via the receiving coil in one second communication stage；
Second electric power signal is changed into one second pulse width modulating signal；
Calculate the second pulse width of second pulse width modulating signal；
The quantity of multiple pulses of second pulse width modulating signal is counted to produce a counting
Value；
The frequency of first electric power signal is judged according to first pulse width and second pulse width
Whether rate is same as the frequency of second electric power signal to produce a judgement signal；And
Judge whether the count value is equal to a predetermined number, if the count value is equal to the present count
Amount, according to the corresponding logic level of judgement signal output producing a demodulated signal.
8. demodulation method as claimed in claim 8, wherein, adjust first pulse width is calculated
In the step of first pulse width of signal processed, the first pulse width modulation letter is counted
Number first plus total quantity average frequency cycle of the pulse between rising edge and falling edge
Number is producing first pulse width；Calculating second pulse width modulating signal
In the step of second pulse width, the second of second pulse width modulating signal is counted
Plus average frequency number of cycles of the pulse of total quantity between rising edge and falling edge is producing
Raw second pulse width.
9. demodulation method as claimed in claim 8, wherein, adjust first pulse width is calculated
In the step of first pulse width of signal processed, add up the first pulse width modulation letter
Number plus total quantity frequency cycle number of the pulse between rising edge and falling edge producing
Raw first pulse width；In second arteries and veins for calculating second pulse width modulating signal
In the step of rushing width, being somebody's turn to do for second pulse width modulating signal that adds up adds total quantity
Frequency cycle number of the pulse between rising edge and falling edge is producing the second pulse width
Degree；Wherein, total quantity should be added to be less than or equal to the predetermined number.
10. demodulation method as claimed in claim 8, wherein according to first pulse width and this
Two pulse widths judge whether the frequency of first electric power signal is same as the second electric power letter
Number frequency the step of include：
Detect the frequency of first electric power signal；And
One is produced according to the frequency of first electric power signal correspondence give tacit consent to difference；
Calculate a difference of first pulse width and second pulse width；And
Judge that whether the difference is with the frequency for judging first electric power signal more than the preset difference value
The no frequency for being same as second electric power signal.
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