CN106484492A - The method and system of configuration interface - Google Patents
The method and system of configuration interface Download PDFInfo
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- CN106484492A CN106484492A CN201510539428.8A CN201510539428A CN106484492A CN 106484492 A CN106484492 A CN 106484492A CN 201510539428 A CN201510539428 A CN 201510539428A CN 106484492 A CN106484492 A CN 106484492A
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Abstract
Embodiments provide a kind of method and system of configuration interface, the method includes：Interconnect at a high speed from ancillary equipment and PCIe tree, determine that there is the PCIe device that single root node input/output virtualizes SR-IOV ability, this PCIe device includes at least two physical function PF, each PF at least one virtual functions attached VF；According to the demand to VF number for the system business, change the allocation proportion of this at least two PF VF attached respectively by the passage that the PCIe chip in this PCIe device provides.In the embodiment of the present invention, the attached VF number of PF be have modified so that VF number meets the demand of system business by the passage that PCIe chip provides.So, the VF number of each PF is satisfied by business demand, can reduce idle VF, it is to avoid the wasting of resources, improves systematic function.
Description
Technical field
The present embodiments relate to computer equipment field, and the side more particularly, to configuration interface
Method and system.
Background technology
Input and output (Input/Output, I/O) virtualization that virtual machine proposes requires initially completely using soft
Part realizing, but, because the restriction of software is it is impossible to give play to Hardware I/O performance.Ancillary equipment is high
The single root node I/O of speed interconnection (Peripheral Component Interconnect Express, PCIe)
The appearance of Intel Virtualization Technology (Single Root I/O Virtualization, SRIOV) standard technique so that
Hardware supported I/O virtualization, improves I/O virtualizing performance.
SRIOV standard is based on PCIe standard, by physical function (Physical Function, PF)
On expand several virtual functions (Virtual Function, VF) supply upper system image (System
Image, SI) use, each SI can use one or more VF.In order to save hardware resource, SR-IOV
Standard specifies the public configuration space of PF and its attached VF only defined in PF, and that is, VF must depend on
Could work to certain PF.
Some projects may need an I/O card to provide multiple systems business function, such as Ethernet simultaneously
With storage disk array (Redundant Arrays of Independent Disks, RAID), and provide void
Planization.This is accomplished by using multiple PF, and each PF provides several VF simultaneously.Present hardware chip
The PF quantity that can provide, and the attached VF quantity of each PF is fixing, can not adjust PF
Attached VF quantity.This just proposes restriction to upper strata, such as using ether under certain application scenarios
The SI of net function is more, but provides the PF corresponding VF limited amount of ethernet feature, and SI is only
Serial can use VF, affect systematic function.Meanwhile, the VF of the corresponding PF of RAID is idle, causes
The wasting of resources.
Content of the invention
The embodiment of the present invention provides a kind of method and system of configuration interface, can be in PF and VF total quantity
In the case of fixation, the attached VF quantity of adjustment PF, thus improving systematic function, economize on resources.
A kind of first aspect, there is provided method of configuration interface, including：Interconnect at a high speed PCIe from ancillary equipment
Determine in tree that there is the PCIe device that single root node input/output virtualizes SR-IOV ability, this PCIe
Equipment includes at least two physical function PF, each PF at least one virtual functions attached VF；According to being
The demand to VF number for the system business, the passage modification being provided by the PCIe chip in this PCIe device
The allocation proportion of this at least two PF VF attached respectively.
In conjunction with a first aspect, in the first possible implementation of first aspect, this is according to system industry
The demand to VF number for the business, changes this extremely by the passage that the PCIe chip in this PCIe device provides
The allocation proportion of few two PF VF attached respectively, including：VF sum when this system traffic demand
Less than the VF sum in this PCIe device, the VF number of the first business demand in this system business is big
When the VF number distributed, this at least two PF is changed by this passage that this PCIe chip provides
In the attached VF number of the corresponding PF of this first business and change in this at least two PF part or complete
The respectively attached VF number of other PF of portion is so that the constant situation of the VF sum in this PCIe device
VF number in lower this each PF of guarantee is satisfied by corresponding business demand.
In conjunction with the first possible implementation of first aspect, in the possible reality of the second of first aspect
In existing mode, this first industry in this at least two PF should be changed by this passage that this PCIe chip provides
It is engaged in the attached VF number of corresponding PF, including：The corresponding PF of this first business is changed by this passage
In initial VF value and total VF value so that this initial VF value and the corresponding VF number of total VF value are full
This first business of foot.
In conjunction with the possible implementation of the second of first aspect, in the third possible reality of first aspect
In existing mode, the method also includes：Amended initial VF value and total VF value are stored in this PCIe
In the nonvolatile memory that chip provides.
In conjunction with the third possible implementation of first aspect, in the 4th kind of possible reality of first aspect
In existing mode, the method also includes：When system goes up electricity again, read from this nonvolatile memory
This amended initial VF value and total VF value are simultaneously joined according to this amended initial VF value and total VF value
Put this allocation proportion.
The first any one to the 4th kind of possible implementation in conjunction with first aspect or first aspect
Possible implementation, in the 5th kind of possible implementation of first aspect, should be high from ancillary equipment
Determine that there is the PCIe that single root node input/output virtualizes SR-IOV ability in speed interconnection PCIe tree
Equipment, including：Scan this PCIe tree, find in configuration space and there is posting of this SR-IOV ability
The PCIe device of storage group is this PCIe device.
The first any one to the 5th kind of possible implementation in conjunction with first aspect or first aspect
Possible implementation, in the 6th kind of possible implementation of first aspect, the method also includes：
According to this amended allocation proportion, carry out validity checking and affiliated VF number changes
The VF reference value of PF is modified.
The first any one to the 6th kind of possible implementation in conjunction with first aspect or first aspect
Possible implementation, in the 7th kind of possible implementation of first aspect, this passage carries for PCIe
Internal channel or PCIe out-band channel.
A kind of second aspect, there is provided system, interconnects PCIe device at a high speed including processor and ancillary equipment,
This PCIe device includes PCIe chip, and wherein, this processor, for determining there is list from PCIe tree
Individual root node input/output virtualizes the PCIe device of SR-IOV ability, and this PCIe device is included at least
Two physical function PF, each PF at least one virtual functions attached VF；This processor, for basis
The demand to VF number for this system business, by this PCIe chip provide passage change this at least two
The allocation proportion of PF VF attached respectively.
In conjunction with second aspect, in the first possible implementation of second aspect, this processor, tool
Body is used for the VF sum in the VF sum of this system traffic demand is less than this PCIe device, this system
When the VF number of the first business demand in business is more than distributed VF number, by this PCIe core
This passage that piece provides changes the attached VF number of the corresponding PF of this first business in this at least two PF
And change part or all of other PF VF number attached respectively in this at least two PF so that
Ensure in the case that VF sum in this PCIe device is constant that VF number in this each PF is satisfied by right
The business demand answered.
In conjunction with the first possible implementation of second aspect, in the possible reality of the second of second aspect
In existing mode, this processor, first in the corresponding PF of this first business specifically for being changed by this passage
Beginning VF value and total VF value so that this initial VF value and the corresponding VF number of total VF value meet this
One business.
In conjunction with the possible implementation of the second of second aspect, in the third possible reality of second aspect
In existing mode, this system also includes nonvolatile memory, and wherein, this PCIe chip, for changing
Initial VF value afterwards and total VF value are stored in this nonvolatile memory.
In conjunction with the third possible implementation of second aspect, in the 4th kind of possible reality of second aspect
In existing mode, this processor, it is additionally operable to when system goes up electricity again, read from this nonvolatile memory
Take this amended initial VF value and total VF value and according to this amended initial VF value and total VF value
Configure this allocation proportion.
The first any one to the 4th kind of possible implementation in conjunction with second aspect or second aspect
Possible implementation, in the 5th kind of possible implementation of second aspect, this processor, specifically
For scanning this PCIe tree, configuration space finds the depositor group with this SR-IOV ability
PCIe device is this PCIe device.
The first any one to the 5th kind of possible implementation in conjunction with second aspect or second aspect
Possible implementation, in the 6th kind of possible implementation of second aspect, this PCIe chip, use
According to this amended allocation proportion, carrying out validity checking and affiliated VF number change
The VF reference value of PF modify.
The first any one to the 6th kind of possible implementation in conjunction with second aspect or second aspect
Possible implementation, in the 7th kind of possible implementation of second aspect, this passage carries for PCIe
Internal channel or PCIe out-band channel.
In the embodiment of the present invention, the attached VF number of PF be have modified by the passage that PCIe chip provides,
VF number is made to meet the demand of system business.So, the VF number of each PF is satisfied by business needs
Ask, idle VF can be reduced, it is to avoid the wasting of resources, improve systematic function.
Brief description
In order to be illustrated more clearly that the technical scheme of the embodiment of the present invention, below will be to embodiment or existing skill
Art description in required use accompanying drawing be briefly described it should be apparent that, drawings in the following description
It is only some embodiments of the present invention, for those of ordinary skill in the art, do not paying creation
Property work on the premise of, other accompanying drawings can also be obtained according to these accompanying drawings.
Fig. 1 is the indicative flowchart of the method for configuration interface of one embodiment of the invention.
Fig. 2 is the schematic configuration diagram of the system of one embodiment of the invention.
Fig. 3 is the indicative flowchart of the process of configuration interface of one embodiment of the invention.
Specific embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out
Clearly and completely describe it is clear that described embodiment is a part of embodiment of the present invention, and not
It is whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art are not making wound
The every other embodiment being obtained on the premise of the property made work, all should belong to the scope of protection of the invention.
Fig. 1 is the indicative flowchart of the method for configuration interface of one embodiment of the invention.Shown in Fig. 1
Method can be executed by system, this system can be computer system.Method shown in Fig. 1 includes：
110, interconnecting at a high speed determination PCIe tree from ancillary equipment, to have single root node input/output virtual
Change the PCIe device of SR-IOV ability, PCIe device includes at least two physical function PF, each PF
Attached at least one virtual functions VF；
120, according to the demand to VF number for the system business, carried by the PCIe chip in PCIe device
For the respectively attached VF of passage modification at least two PF allocation proportion.
In the embodiment of the present invention, the attached VF number of PF be have modified by the passage that PCIe chip provides,
VF number is made to meet the demand of system business.So, the VF number of each PF is satisfied by business needs
Ask, idle VF can be reduced, it is to avoid the wasting of resources, improve systematic function.
It should be understood that step 110 and step 120 can be by the computing devices in system.
SR-IOV standard specifies the public configuration space of PF and its attached VF only defined in PF, that is,
VF must be attached to certain PF and could work.Reason is the agreement regulation according to PCIe, each PF
Oneself independent 4KB configuration space must be had.But, for save space, each PF achieves
Independent 4KB configuration space, and VF only achieves sub-fraction, so VF must be attached to certain
Under PF.When system accesses the configuration space registers of VF, if VF does not independently realize this posted
Storage, it has to the register value with reference to oneself ownership PF, and returns.
PCIe device includes at least two PF, and the number of system business can be corresponding at least two industry
Business, that is, this PCIe device can provide corresponding at least two business functions.Each business function is to VF
Number has demand.VF number affiliated by PF in current PCIe device is fixing.For example,
One SR-IOV card provides two PF, and the attached VF quantity of each PF is fixed, all for 64.?
, simultaneously and under the application scenarios deposited, a PF is used as Ethernet, and a PF uses for Ethernet and storage service
Store.When the SI that upper strata uses ethernet feature is more than 64, the SI of ethernet feature can only serial
Using VF, cause hydraulic performance decline.
The allocation proportion that at least two PF that PCIe device includes distinguish attached VF can be each
The distribution of the VF number affiliated by PF.Modification allocation proportion, can change every at least two PF
The attached VF number of individual PF is it is also possible to change the attached VF number of part PF at least two PF.
Specifically, for example, system includes two PF, attached 8 VF of each PF.After modifying,
One PF distributes 12 VF, and another PF distributes 4 VF.In other words, when PCIe device bag
When including two PF, meet PCIe total VF number constant in the case of it is necessary to simultaneously change two PF
The attached number of VF.Again for example, system includes three PF, attached 8 VF of each PF.Entering
After row modification, a PF can be with attached 12, and a PF can be with attached 4, and a PF can be attached
Belong to 8.Or, a PF can be with attached 12, and a PF can be with attached 6, and a PF can
With attached 6.That is, when changing allocation proportion, when PCIe device includes at least three PF
When, meet PCIe total VF number constant in the case of, the VF of at least three PF can be changed simultaneously
Attached number is it is also possible to the attached number of the VF of minimal modification two of which PF.In a word, amended PF
Affiliated VF number meets corresponding business.
Alternatively, as another embodiment, the passage that this PCIe chip provides can be logical in PCIe band
Road or PCIe out-band channel.
Alternatively, as another embodiment, in step 110, the processor in system can scan PCIe
Tree, the PCIe device finding the depositor group with SR-IOV ability in configuration space is PCIe
Equipment.
Specifically, scan PCIe tree upon power-up of the system, PCIe tree includes some PCIe device.Read
The configuration space taking each PCIe device searches the depositor group with SR-IOV ability.If certain PCIe
Equipment includes the depositor group that this has SR-IOV ability, and this PCIe device also has SR-IOV ability.
Alternatively, as another embodiment, in the step 120, the processor in system can work as system
The VF sum of business demand needs less than the VF sum in PCIe device, the first business in system business
When the VF number asked is more than distributed VF number, changed at least by the passage that PCIe chip provides
In two PF the attached VF number of the corresponding PF of the first business and modification at least two PF in part or
All other PF VF number attached respectively is so that the constant situation of the VF sum in PCIe device
VF number in lower each PF of guarantee is satisfied by corresponding business demand.
Specifically, system includes at least two business, and the VF sum of this at least two service needed is little
VF sum in PCIe device.So, after modifying, can VF in PCIe device
So that the attached VF number of each PF is satisfied by corresponding business demand in the case that sum is constant.
It should be understood that the VF number that the first business is distribution in system business is unsatisfactory for the business of demand.Should
First business is one of business, when being unsatisfactory for business demand for the VF number that other distribute
With the method using the embodiment of the present invention.
Citing as mentioned in the above can show, it is attached that the embodiment of the present invention must change the corresponding PF of the first business
The VF number belonging to is so that the VF number of the first traffic assignments disclosure satisfy that demand.And it is possible to modification
The VF number affiliated by part or all of PF of other business of the first business is removed in system business.When
When PCIe device includes two PF, in this two PF, the attached VF number of only one of which PF is less than right
The business demand answered, and there is idle condition in the attached VF number of another PF.Now, two PF
Attached VF number is required to change.When PCIe device includes at least three PF, in this three PF
At least one attached VF number of PF is less than corresponding business demand, and at least one in other PF
There is idle condition in the attached number of individual PF.In modification it is necessary to modification is unsatisfactory for the PF of business demand
Attached VF number, and change the VF number of whole PF in other PF or part PF.
Alternatively, as another embodiment, in the attached VF number of the modification corresponding PF of the first business,
Processor can change initial VF value and total VF value in the corresponding PF of the first business by passage, makes
Obtain initial VF value and the corresponding VF number of total VF value meets the first business.
It should be understood that the processor in system can be changed initially by the passage that PCIe chip provides with software
VF value (InitialVFs) and total VF value (TotalVFs).Specifically, InitialVFs and TotalVFs
It is two values of depositor.This two values are used for controlling the attached VF number of PF.In current technology,
The attribute of InitialVFs and TotalVFs is read-only (Read Only, RO), and software cannot change these
Value, that is, software cannot change the attached VF number of PF.
For example, if system includes two PF, attached 8 VF of each PF.When modifying, by one
The VF number of individual PF is revised as 12, will InitialVFs and TotalVFs under this PF value modification
For 12.The VF number of another PF is revised as 4, will InitialVFs and TotalVFs under this PF
Value be revised as 4.
Alternatively, as another embodiment, the method shown in Fig. 1 also includes：
130, amended initial VF value and total VF value are stored in the non-volatile of PCIe chip offer
In memorizer；
140, when system goes up electricity again, read amended initial VF value and total VF value and basis is repaiied
Initial VF value after changing and total VF value configuration allocation proportion.
Specifically, step 130 can be executed by the chip in system, and step 140 can be by system
Computing device.
Nonvolatile memory can be EEPROM (Electrically Erasable
Programmable Read-Only Memory, EEPROM).
Alternatively, as another embodiment, for the modification of the processor in coupled system, PCIe chip
Validity checking can be carried out and affiliated VF number changes according to amended allocation proportion
The VF reference value of PF modify.
It should be understood that VF reference value is used for indicating the VF number in PF, this VF reference value is existing PCIe
The parameter value that equipment has existed.
Fig. 2 is the schematic configuration diagram of the system of one embodiment of the invention.System shown in Fig. 2 includes locating
Reason device 210 and ancillary equipment interconnect at a high speed PCIe device 220, and PCIe device 220 includes PCIe chip
230, wherein,
Processor 210 determines there is single root node input/output virtualization SR-IOV energy from PCIe tree
The PCIe device of power, PCIe device includes at least two physical function PF, each PF attached at least
Individual virtual functions VF；
Processor 210 demand to VF number according to system business, the passage being provided by PCIe chip
Change the allocation proportion of at least two PF VF attached respectively.
In the embodiment of the present invention, the attached VF number of PF be have modified by the passage that PCIe chip provides,
VF number is made to meet the demand of system business.So, the VF number of each PF is satisfied by business needs
Ask, idle VF can be reduced, it is to avoid the wasting of resources, improve systematic function.
Alternatively, as another embodiment, processor 210 can work as the VF sum of system traffic demand
Less than the VF sum in PCIe device, the VF number of the first business demand in system business is more than institute
During the VF number of distribution, the first business at least two PF is changed by the passage that PCIe chip provides
In the attached VF number of corresponding PF and modification at least two PF, partly or entirely other PF are attached respectively
The VF number belonging to is so that ensure in each PF in the case that the VF sum in PCIe device is constant
VF number is satisfied by corresponding business demand.
Alternatively, as another embodiment, processor 210 can be corresponded to by passage modification the first business
PF in initial VF value and total VF value so that initial VF value and the corresponding VF number of total VF value
Meet the first business.
Alternatively, as another embodiment, the system shown in Fig. 2 can also include nonvolatile memory
240, wherein, amended initial VF value and total VF value can be stored in non-by PCIe chip 230
In volatile memory 240.
Alternatively, as another embodiment, when processor 210 can also be worked as system and gone up electricity again, from non-
Amended initial VF value and total VF value is read and according to amended initial VF in volatile memory
Value and total VF value configure allocation proportion.
Alternatively, as another embodiment, processor 210 can scan PCIe tree, in configuration space
The PCIe device finding the depositor group with SR-IOV ability is PCIe device.
Alternatively, as another embodiment, PCIe chip 230 can according to amended allocation proportion,
Carry out validity checking and the VF reference value of the PF that affiliated VF number changes is modified.
Alternatively, as another embodiment, passage is PCIe in-band channel or PCIe out-band channel.
Fig. 3 is the indicative flowchart of the process of configuration interface of one embodiment of the invention.This process can
To include：
301, system electrification.
302, system scans PCIe tree, determines the PCIe device with SR-IOV ability.
Specifically, scan PCIe tree upon power-up of the system, PCIe tree includes some PCIe device.Read
The configuration space taking each PCIe device searches the depositor group with SR-IOV ability.If certain PCIe
Equipment includes the depositor group that this has SR-IOV ability, and this PCIe device also has SR-IOV ability.
303, judge whether PF and the relations of distribution of VF number meet system requirements.
Specifically, processor reads InitialVFs the and TotalVFs value under each PF, judges now to exist
Whether the VF number allocation proportion between different PF meets system requirements.For example, system one has two PF,
16 VF, are assigned with 8 VF now under each PF.If this relations of distribution meet system requirements,
Jump to step 306.If this relations of distribution are unsatisfactory for system requirements, such as system needs under PF0
12 VF of trip, have 4 PF, then jump to step 304 under PF1.
304, processor changes initial VF value and total VF value under all or part of PF.
Specifically, if system includes two PF, attached 8 VF of each PF.When modifying, will
The VF number of one PF is revised as 12, will the value of InitialVFs and TotalVFs under this PF repair
It is changed to 12.The VF number of another PF is revised as 4, will InitialVFs under this PF and
The value of TotalVFs is revised as 4.
Meanwhile, PCIe chip changes VF reference value according to amended InitialVFs and TotalVFs.
Amended InitialVFs and TotalVFs can also be saved in EEPROM for PCIe chip,
During electricity, first read from EEPROM, and be stored in SR-IOV ability space in order on next time,
And the allocation proportion of PF and VF is configured according to the value reading.
305, system judges whether the VF number of PF is correctly changed.
Specifically, this PCIe device of system re-enumeration, check the allocation proportion of PF and VF whether by
Correct modification, if it is not, then jump to 304.If it is, jumping to 306.
306, system worked well.
In the embodiment of the present invention, the attached VF number of PF be have modified by the passage that PCIe chip provides,
VF number is made to meet the demand of system business.So, the VF number of each PF is satisfied by business needs
Ask, idle VF can be reduced, it is to avoid the wasting of resources, improve systematic function.
It should be understood that " embodiment " or " embodiment " that description is mentioned in the whole text mean with
The relevant special characteristic of embodiment, structure or characteristic are included at least one embodiment of the present invention.Cause
This, " in one embodiment " or " in one embodiment " that occur everywhere in entire disclosure may not
Necessarily refer to identical embodiment.Additionally, what these specific features, structure or characteristic can arbitrarily be suitable for
Mode combines in one or more embodiments.In various embodiments of the present invention, above-mentioned each process
The size of sequence number is not meant to the priority of execution sequence, and the execution sequence of each process should be with its function and interior
Determine in logic, and should not constitute any restriction to the implementation process of the embodiment of the present invention.
In addition, the terms " system " and " network " are herein often used interchangeably.Art herein
Language "and/or", only a kind of incidence relation of description affiliated partner, represents there may be three kinds of relations,
For example, A and/or B, can represent：, there is A and B in individualism A simultaneously, individualism B this
Three kinds of situations.In addition, character "/" herein, typically represent forward-backward correlation to as if a kind of relation of "or".
It should be understood that in embodiments of the present invention, " B corresponding with A " represents that B is associated with A, according to
A can determine B.It is also to be understood that determining that B is not meant to determine B only according to A according to A,
B can also be determined according to A and/or other information.
Those of ordinary skill in the art are it is to be appreciated that combine each of the embodiments described herein description
The unit of example and algorithm steps, can be come real with electronic hardware, computer software or the combination of the two
Existing, in order to clearly demonstrate the interchangeability of hardware and software, in the above description according to function one
As property describe composition and the step of each example.These functions to be held with hardware or software mode actually
OK, the application-specific depending on technical scheme and design constraint.Professional and technical personnel can be to each
The specifically application function described to use different methods to realization, but this realization is it is not considered that surpass
Go out the scope of the present invention.
Those skilled in the art can be understood that, for convenience of description and succinctly, above-mentioned
The specific work process of the system, device and unit of description, it is right in preceding method embodiment to may be referred to
Answer process, will not be described here.
In several embodiments provided herein it should be understood that disclosed system, device and
Method, can realize by another way.For example, device embodiment described above is only shown
Meaning property, for example, the division of described unit, only a kind of division of logic function, actual can when realizing
There to be other dividing mode, for example multiple units or assembly can in conjunction with or be desirably integrated into another
System, or some features can ignore, or do not execute.In addition, shown or discussed each other
Coupling or direct-coupling or communication connection can be INDIRECT COUPLING by some interfaces, device or unit or
Communication connection or electricity, machinery or other forms connect.
The described unit illustrating as separating component can be or may not be physically separate, make
For the part that unit shows can be or may not be physical location, you can with positioned at a place,
Or can also be distributed on multiple NEs.Can select according to the actual needs part therein or
The whole unit of person is realizing the purpose of embodiment of the present invention scheme.
In addition, can be integrated in a processing unit in each functional unit in each embodiment of the present invention,
Can also be that unit is individually physically present or two or more units are integrated in one
In unit.Above-mentioned integrated unit both can be to be realized in the form of hardware, it would however also be possible to employ software function
The form of unit is realized.
Through the above description of the embodiments, those skilled in the art can be understood that this
Invention can be realized with hardware, or firmware is realized, or combinations thereof mode is realizing.When using software
When realizing, above-mentioned functions can be stored in computer-readable medium or as on computer-readable medium
One or more instructions or code be transmitted.Computer-readable medium include computer-readable storage medium and
Communication media, wherein communication media include being easy to transmitting computer program from a place to another place
Any medium.Storage medium can be any usable medium that computer can access.In addition.Any
Connection can be suitable become computer-readable medium.
In a word, the foregoing is only the preferred embodiment of technical solution of the present invention, be not intended to limit
Protection scope of the present invention.All any modifications within the spirit and principles in the present invention, made, equivalent
Replace, improve etc., should be included within the scope of the present invention.
Claims (16)
1. a kind of method of configuration interface is it is characterised in that include：
Interconnect at a high speed PCIe tree from ancillary equipment and determine that there is single root node input/output virtualization
The PCIe device of SR-IOV ability, described PCIe device includes at least two physical function PF, each
PF at least one virtual functions attached VF；
According to the demand to VF number for the system business, carried by the PCIe chip in described PCIe device
For the respectively attached VF of described at least two PF of passage modification allocation proportion.
2. method according to claim 1 it is characterised in that described according to system business to VF
The demand of number, by least two described in the passage modification of the PCIe chip offer in described PCIe device
The allocation proportion of individual PF VF attached respectively, including：
VF sum in the VF sum of described system traffic demand is less than described PCIe device, described
When the VF number of the first business demand in system business is more than distributed VF number, by described
It is attached that the described passage that PCIe chip provides changes the corresponding PF of the first business described in described at least two PF
Other PF part or all of VF attached respectively in the VF number belonging to and described at least two PF of modification
Number is so that ensure in each PF described in the case that the VF sum in described PCIe device is constant
VF number be satisfied by corresponding business demand.
3. method according to claim 2 it is characterised in that described by described PCIe chip
The described passage providing changes the attached VF of the corresponding PF of the first business described in described at least two PF
Number, including：
Change initial VF value and the total VF value in the corresponding PF of described first business by described passage,
Described initial VF value and the corresponding VF number of total VF value is made to meet described first business.
4. method according to claim 3 is it is characterised in that methods described also includes：
Amended initial VF value and total VF value are stored in the non-volatile of described PCIe chip offer
In memorizer.
5. method according to claim 4 is it is characterised in that methods described also includes：
When system goes up electricity again, read described amended initial VF from described nonvolatile memory
Value configures described allocation proportion with total VF value and according to described amended initial VF value and total VF value.
6. the method according to any one of claim 1-5 is it is characterised in that described set from periphery
Determine that having single root node input/output virtualizes SR-IOV ability in the standby PCIe tree of interconnection at a high speed
PCIe device, including：
Scan described PCIe tree, configuration space finds the depositor with described SR-IOV ability
The PCIe device of group is described PCIe device.
7. the method according to claim 1-6 is it is characterised in that methods described also includes：
According to described amended allocation proportion, carry out validity checking and affiliated VF number is occurred
The VF reference value of the PF of change is modified.
8. the method according to any one of claim 1-7 is it is characterised in that described passage is PCIe
In-band channel or PCIe out-band channel.
9. a kind of system interconnects PCIe device at a high speed it is characterised in that including processor and ancillary equipment,
Described PCIe device includes PCIe chip, wherein,
Described processor, has single root node input/output virtualization for determining from PCIe tree
The PCIe device of SR-IOV ability, described PCIe device includes at least two physical function PF, each
PF at least one virtual functions attached VF；
Described processor, for the demand to VF number according to described system business, by described PCIe
The passage that chip provides changes the allocation proportion of described at least two PF VF attached respectively.
10. system according to claim 9 is it is characterised in that described processor, specifically for
VF sum in the VF sum of described system traffic demand is less than described PCIe device, described
When the VF number of the first business demand in system business is more than distributed VF number, by described
It is attached that the described passage that PCIe chip provides changes the corresponding PF of the first business described in described at least two PF
Other PF part or all of VF attached respectively in the VF number belonging to and described at least two PF of modification
Number is so that ensure in each PF described in the case that the VF sum in described PCIe device is constant
VF number be satisfied by corresponding business demand.
11. systems according to claim 10 it is characterised in that described processor, specifically for
Change initial VF value and the total VF value in the corresponding PF of described first business by described passage,
Described initial VF value and the corresponding VF number of total VF value is made to meet described first business.
12. systems according to claim 11 it is characterised in that described system also include non-volatile
Property memorizer, wherein, described PCIe chip, for depositing amended initial VF value and total VF value
Storage is in described nonvolatile memory.
13. systems according to claim 12, it is characterised in that described processor, are additionally operable to
When system goes up electricity again, read described amended initial VF from described nonvolatile memory
Value configures described allocation proportion with total VF value and according to described amended initial VF value and total VF value.
14. systems according to any one of claim 9-13 it is characterised in that described processor,
Specifically for
Scan described PCIe tree, configuration space finds the depositor with described SR-IOV ability
The PCIe device of group is described PCIe device.
15. systems according to any one of claim 9-14 are it is characterised in that described PCIe
Chip, for according to described amended allocation proportion, carrying out validity checking and by affiliated VF
The VF reference value of the PF that number changes is modified.
16. systems according to any one of claim 9-15 are it is characterised in that described passage is
PCIe in-band channel or PCIe out-band channel.
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