CN106452725B - A kind of anti-power consumption attack method towards aes algorithm based on register mask - Google Patents
A kind of anti-power consumption attack method towards aes algorithm based on register mask Download PDFInfo
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- CN106452725B CN106452725B CN201610431897.2A CN201610431897A CN106452725B CN 106452725 B CN106452725 B CN 106452725B CN 201610431897 A CN201610431897 A CN 201610431897A CN 106452725 B CN106452725 B CN 106452725B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
- H04L9/0618—Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation
- H04L9/0631—Substitution permutation network [SPN], i.e. cipher composed of a number of stages or rounds each involving linear and nonlinear transformations, e.g. AES algorithms
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/002—Countermeasures against attacks on cryptographic mechanisms
- H04L9/003—Countermeasures against attacks on cryptographic mechanisms for power analysis, e.g. differential power analysis [DPA] or simple power analysis [SPA]
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Abstract
The anti-power consumption attack method towards aes algorithm based on register mask that the invention discloses a kind of, adds randomizer and register protective module in aes algorithm, and register protective module includes the first exclusive or unit, the second exclusive or unit and register.When updating the intermediate result in register, the intermediate result saved will be needed and be saved in register after random number exclusive or, while saving the random number；When reading the intermediate result in register, the value in register is being read and is carrying out exclusive or with the random number of preservation.This method guarantees that the storage value in register has randomness, effectively conceals the Hamming distance leakage in AES cryptographic algorithm, can effectively resist the power consumption attack based on Hamming distance model.
Description
Technical field
The present invention relates to IC Hardware realization and field of information security technology, are based on register more particularly to one kind
The anti-power consumption attack method towards aes algorithm of mask.
Background technique
With the fast development of Internet technology and Information technology, information encryption has extremely important in many fields
Application.Password product can use software or hardware realization, but due to hardware realization than software realization have speed faster, function
Lower advantage is consumed, research hotspot is had become based on hard-wired encryption device.It is various to be based on AES (Advanced
Encryption Standard, Advanced Encryption Standard) crypto chip of algorithm obtained extensive research and development.
Crypto chip is also faced with various security risks, is attacked with differential power consumption attack for the bypass of representative in recent years
It hits, stern challenge is proposed to the safety of encryption device.Power consumption attack is a kind of non-invasive attack, and attacker is big first
Amount obtains the power consumption information that encryption device is revealed when encryption and decryption operates, and the mathematics of power consumption is then established according to plaintext or ciphertext
Model, obtains a large amount of medians, median and actual power loss is compared and analyzed, and calculates correlation using statistical processing methods
Coefficient, to analyze crucial key information.How to resist power consumption analysis attack protection algorism safely is one weight of academia
The research point wanted.
After collecting a large amount of actual power losses, power consumption attack is able to successful key and is to establish accurate power consumption mathematical modulo
Type.The basic thought of Hamming distance model be calculate digital circuit in some specific time period in circuit 0 → 1 conversion and 1 → 0 turn
Then the sum changed portrays the power consumption of circuit during this period of time using the sum of conversion.For digital circuit, power consumption is main
Convert from the state of circuit, and be not rely on data itself, and the device overturn is more, and power consumption is bigger.Therefore
The energy consumption of digital circuit can be preferably portrayed using Hamming distance model.At a time, if it is possible to be calculated
The data D1 after data D0 and overturning before circuit overturning, obtains the number of bits of Data flipping, to calculate the Hamming of data
Distance, so that it may and true power consumption number establishes connection.When establishing Hamming distance model, need to know data variation in register
The numerical value of front and back.Hamming distance model is generally used for that the power consumption of register is described.
The register that attacker generally chooses intermediate data storage is the point of attack.Attacker guesses key first, further
Guess the median of adjacent two-wheeled, calculates Hamming distance as register and change generated power consumption model；Then acquisition is practical
Power consumption model and actual power loss are carried out correlation analysis and obtain correct key by power consumption.
For the method for existing anti-power consumption attack, from the aspect of realizing cost, there is that hardware resource cost is big, property mostly
Can expense is big, the disadvantages of scalability is weak, from the aspect of realizing effect, some only weakens intermediate result data Hamming distance and
Correlation between power consumption, and fail to completely eliminate the direct correlation of the two, therefore can not resist completely based on Hamming distance
Power consumption attack.
Summary of the invention
Goal of the invention: the object of the present invention is to provide it is a kind of be able to solve the shortcomings of the prior art based on register
The anti-power consumption attack method towards aes algorithm of mask.
Technical solution: to reach this purpose, the invention adopts the following technical scheme:
Anti- power consumption attack method towards aes algorithm of the present invention based on register mask, adds in aes algorithm
Add randomizer and register protective module, register protective module include the first exclusive or unit, the second exclusive or unit and
Register；In the key add operation of aes algorithm initial stage, key add operation is carried out with initial key in plain text, random number occurs
Device generates initial stage random number, initial stage random number and key add operation result and carries out exclusive or behaviour by the first exclusive or unit
Make, obtain first stage exclusive or result and be stored in register, when the 1st wheel wheel operation starts, then by initial stage random number and
Initial stage exclusive or result carries out xor operation by the second exclusive or unit, and the key add operation being reduced is as a result, conduct
The input data of 1st wheel wheel operation；In i-th wheel of aes algorithm, the i-th wheel median, random number hair is calculated in wheel operation module
Raw device generates the i-th wheel random number, and the i-th wheel median and i-th take turns random number and carry out xor operation by the first exclusive or unit, obtain
I-th wheel exclusive or result is simultaneously stored in register；If i ≠ N, when i+1 wheel starts, the i-th wheel exclusive or result and the i-th wheel are random
Number carries out xor operation by the second exclusive or unit, the i-th wheel median being reduced, the input data as i+1 wheel；
If i=N, the i-th wheel exclusive or result and the i-th wheel random number obtain ciphertext by the second exclusive or unit progress xor operation；Its
In, N is the total degree of the wheel operation of aes algorithm.
Further, in the i-th wheel of the aes algorithm, 1 < i < N, wheel operation module successively carries out word to the (i-1)-th wheel median
Section replacement, row displacement, column mixing and key add these four operations, obtain the i-th wheel median.
Further, in the N wheel of the aes algorithm, wheel operation module successively carries out byte to N-1 wheel median and replaces
It changes, go displacement and key adds these three operations, obtain ciphertext.
The utility model has the advantages that compared with prior art, the invention has the following advantages:
1) hardware resource cost of the present invention is low.It only needs to increase a small amount of XOR operation unit and randomizer, compares
Entire AES cryptochannel only accounts for very little ratio；
2) performance cost of the present invention is low.The delay for only increasing a small amount of XOR operation unit for circuit critical path, is compared
Byte in entire AES circuit is replaced, row shifts, arranges mixing and the delay for the modules such as key adds, and only accounts for the ratio of very little, therefore
It not will lead to work dominant frequency to be substantially reduced；
3) there is the present invention very strong scalability and versatility can very easily be moved by protecting to register
It plants in other AES cryptographic algorithms' implementation circuits；
4) present invention guarantees that the storage value in register has randomness, effectively conceals the Chinese in AES cryptographic algorithm
Prescribed distance leakage, eliminates the correlation between intermediate result data Hamming distance and power consumption, can be effective against based on Hamming
Distance model power consumption attack.
Detailed description of the invention
Fig. 1 is the flow chart of traditional aes algorithm；
Fig. 2 is the flow chart using the aes algorithm of the method for the present invention；
Fig. 3 is to carry out the obtained correlation coefficient matrix result of power consumption attack first character section to traditional aes algorithm；
Fig. 4 is to using the aes algorithm after the method for the present invention to carry out the obtained correlation of power consumption attack first character section
Coefficient matrix result.
Specific embodiment
Technical solution of the present invention is further introduced With reference to embodiment.
Traditional aes algorithm block encryption algorithm is made of 3 parts altogether, is that initial key adds, 9 take turns identical wheel respectively
Operation and the 10th wheel end transformation.Each round is required to a round key to complete key add operation, and 11 sub-keys, remember altogether
For Kn(n=0 ..., 10).Sub-key is obtained by initial key by extension.The wheel of 9 circulations, which operates, among aes algorithm includes
Byte replacement, row displacement, column mixing and key add four operations.Wherein the tenth wheel end transformation include byte replacement, row displacement and
Key adds three operations.The every wheel end of AES can all generate an intermediate Value Data, can be denoted as Dn(n=0 ..., 10), storage
In a register, wherein D10As ciphertext exports.As shown in Figure 1, by taking the AES-128 hardware algorithm of level-one flowing water is realized as an example,
Attacker can obtain output ciphertext and hardware power consumption track in the case where, attacker can for the 9th wheel it is defeated
Value is attacked out.By guessing key, attacker can derive the output valve of the 9th wheel from ciphertext, due to deposit
At a time its value becomes the output (as ciphertext) of the tenth wheel from the output of the 9th wheel to device, therefore can establish Hamming distance
Model.Since key length is 16 bytes, can be broken through with byte-by-byte, specific steps are as follows:
1. according to D10In nth byte data and hypothesis key K10Nth byte data can derive key
The value of the nth byte of 128 bit medians before add operation.
2. the data m-th before trip shift operation can be derived according to the value of nth byte before key add operation
The value of byte.Mapping relations before N and M can be obtained by the operation rule of row displacement.
3. the output of the 9th wheel can be derived by the transformation of inverse byte by the value of m-th byte before row shift operation
The value of m-th byte.
4. can establish one 8 between the value of m-th byte and the value of ciphertext m-th byte in the output by the 9th wheel
The Hamming distance model of bit.
For the above-mentioned attack based on Hamming distance model, invention it is a kind of based on register mask towards
The anti-power consumption attack method of aes algorithm, as shown in Fig. 2, adding randomizer 1 and register protection mould in aes algorithm
Block 2, register protective module 2 include the first exclusive or unit 21, the second exclusive or unit 23 and register 22.
Aes algorithm includes three phases, and the first stage is initial key add operation, and second stage includes the identical wheel of 9 wheels
Operation, the phase III is last transformation.Improvement of the present invention to these three stages is introduced separately below:
In the first stage of aes algorithm, key add operation is carried out with initial key in plain text, randomizer 1 generates the
One stage random number, first stage random number and key add operation result carry out xor operation by the first exclusive or unit 21, obtain
To first stage exclusive or result and be stored in register 22, second stage the 1st wheel wheel operation start when, then by the first stage with
Machine number and first stage exclusive or result are by the second exclusive or unit 23 progress xor operation, the key add operation knot being reduced
Fruit, the input data of the 1st wheel wheel operation as second stage.
In i-th wheel of aes algorithm, the i-th wheel median is calculated in 1≤i≤9, the wheel operation module of second stage, at random
Number generator 1 generates the i-th wheel random number, and the i-th wheel median and the i-th wheel random number pass through the first exclusive or unit 21 and carry out exclusive or behaviour
Make, obtain the i-th wheel exclusive or result and be stored in register 22, takes turns random number and i-th when i+1 wheel wheel operates beginning, then by i-th
It takes turns exclusive or result and xor operation is carried out by the second exclusive or unit 23, the i-th wheel median being reduced, as i+1 wheel
Take turns the input data of operation.
10th, which takes turns wheel operation as end, converts, and in the transformation of end, ciphertext, random number is calculated in the wheel operation module of last transformation
Generator 1 generates the random number of last conversion stages, and the random number of ciphertext and last conversion stages passes through the progress of the first exclusive or unit 21
Xor operation obtains last conversion stages exclusive or result and is stored in register 22, then the random number of last conversion stages and ciphertext are led to
It crosses the second exclusive or unit 23 and carries out xor operation, obtain ciphertext.
After the method for the present invention, hardware resource needed for entire AES cipher circuit increases 12%, critical path
Delay increases 15% and compares with other anti-Hamming distance power consumption attack methods based on mask, opens area overhead and performance
Pin influences limited.
Present embodiment has carried out based on Hamming distance model the aes algorithm circuit realized based on FPGA platform
Power consumption attack.Setting initial key is ' 0102030405060708090a0b0c0d0e0f ', wherein 128 bits of last wheel
Sub-key be ' 13111d7fe3944a17f37a78b4d2b30c5 '.This experiment acquires FPGA using oscillograph and carries out AES
Power consumption track when cryptographic calculation totally 2000, the points of every power consumption track are N, while obtaining 2000 groups of corresponding ciphertexts
Data.2000 power consumption tracks can synthesize the actual power loss track matrix of 2000 row N column.It is close by this 2000 groups simultaneously
2000 Hamming distances based on the 9th wheel output and the tenth wheel output can be calculated in literary data, since ciphertext is divided into 16
Byte is broken through one by one, therefore shares 256 kinds of assumption values for each byte, therefore 2000 row of available 256 column
Assuming that power consuming matrix.By carrying out correlation meter to each column of each column and actual power consumption track of assuming power consuming matrix
It calculates, the correlation matrix of available 256 row N column, the corresponding key of every a line is assumed.The correlation matrix is drawn
At 256 curves, as shown in figure 3, to attack obtained correlation matrix figure for first character section, it can be found that correct close
Key assumes apparent spike occur in corresponding curve, i.e., can deduce correct key word by the correlation matrix
Section.It is discovered by experiment that 2000 power consumption tracks can break through all bytes, and obtain correct initial key.
Then aes algorithm is improved using a kind of method for register protection that this patent proposes.And after improving
Aes algorithm realized with FPGA, and attempt carry out power consumption attack.After acquiring FPGA operational development using oscillograph in this experiment
The power consumption track that aes algorithm is realized, and power consumption trace bar number is increased to 100,000 from 2000.Then 100,000 power consumptions are used
Track carries out the power consumption attack based on Hamming distance for the realization of improved aes algorithm, obtains correlation coefficient matrix, such as schemes
Shown in 4.
As can be seen from Figure 4 correct key homologous thread has been submerged among other 255 curves, improved AES
Algorithm realize, power consumption trace bar number from 2000 increase to 100,000 after, correct key does not occur spike still.It can be found that
Improved aes algorithm effectively resisted the power consumption attack based on Hamming distance, it was demonstrated that this patent proposes the effective of method
Property.
Claims (3)
1. a kind of anti-power consumption attack method towards aes algorithm based on register mask, it is characterised in that: in aes algorithm
Add randomizer (1) and register protective module (2), register protective module (2) including the first exclusive or unit (21),
Second exclusive or unit (23) and register (22)；In the key add operation of aes algorithm initial stage, carried out in plain text with initial key
Key add operation, randomizer (1) generate initial stage random number, and initial stage random number and key add operation result are logical
It crosses the first exclusive or unit (21) and carries out xor operation, obtain first stage exclusive or result and be stored in register (22), in the 1st wheel wheel
When operation starts, then initial stage random number and initial stage exclusive or result are passed through into the second exclusive or unit (23) and carry out exclusive or behaviour
Make, the key add operation being reduced is as a result, the input data operated as the 1st wheel wheel；In i-th wheel of aes algorithm, wheel behaviour
Be calculated the i-th wheel median as module, randomizer (1) generate the i-th wheel random number, the i-th wheel median and the i-th wheel with
Machine number carries out xor operation by the first exclusive or unit (21), obtains the i-th wheel exclusive or result and is stored in register (22)；If i
≠ N, then when i+1 wheel starts, the i-th wheel exclusive or result and the i-th wheel random number pass through the second exclusive or unit (23) progress exclusive or
Operation, the i-th wheel median being reduced, the input data as i+1 wheel；If i=N, i-th wheel exclusive or result and
I-th wheel random number carries out xor operation by the second exclusive or unit (23), obtains ciphertext；Wherein, N is that the wheel of aes algorithm operates
Total degree.
2. the anti-power consumption attack method towards aes algorithm according to claim 1 based on register mask, feature exist
In: in the i-th wheel of the aes algorithm, 1 < i < N, wheel operation module successively carries out byte replacement to the (i-1)-th wheel median, row moves
Position, column mixing and key add these four operations, obtain the i-th wheel median.
3. the anti-power consumption attack method towards aes algorithm according to claim 1 based on register mask, feature exist
In: in the N wheel of the aes algorithm, wheel operation module successively carries out byte replacement to N-1 wheel median, row shifts and close
Key adds these three operations, obtains ciphertext.
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| CN108964874B (en) * | 2017-05-17 | 2020-10-27 | 中国科学技术大学 | AES encryption method for resisting path difference attack |
| CN107483182B (en) * | 2017-09-21 | 2020-08-21 | 东南大学 | AES algorithm-oriented power attack resisting method based on out-of-order execution |
| CN112422272B (en) * | 2019-08-20 | 2022-10-21 | 深圳市航顺芯片技术研发有限公司 | AES encryption method and circuit for preventing power consumption attack |
| CN112564885B (en) * | 2020-11-26 | 2022-07-12 | 南京农业大学 | Side channel test analysis method based on mask variable maximum probability density function distribution |
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| EP2273472A1 (en) * | 2008-03-31 | 2011-01-12 | Fujitsu Limited | Coder equipped with common key code function and built-in equipment |
| CN102780557A (en) * | 2012-07-10 | 2012-11-14 | 记忆科技(深圳)有限公司 | Method and device for AES (advanced encryption standard) encryption/decryption with selection gate optimization |
| CN103916236A (en) * | 2014-04-25 | 2014-07-09 | 东南大学 | Power attack prevention method oriented at AES algorithm and circuit achieving method thereof |
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|---|---|---|---|---|
| EP2273472A1 (en) * | 2008-03-31 | 2011-01-12 | Fujitsu Limited | Coder equipped with common key code function and built-in equipment |
| CN102780557A (en) * | 2012-07-10 | 2012-11-14 | 记忆科技(深圳)有限公司 | Method and device for AES (advanced encryption standard) encryption/decryption with selection gate optimization |
| CN103916236A (en) * | 2014-04-25 | 2014-07-09 | 东南大学 | Power attack prevention method oriented at AES algorithm and circuit achieving method thereof |
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