CN106330604B - A kind of method and device of port connectivity test - Google Patents
A kind of method and device of port connectivity test Download PDFInfo
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- CN106330604B CN106330604B CN201610711986.2A CN201610711986A CN106330604B CN 106330604 B CN106330604 B CN 106330604B CN 201610711986 A CN201610711986 A CN 201610711986A CN 106330604 B CN106330604 B CN 106330604B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
- H04L43/08—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters
- H04L43/0805—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters by checking availability
- H04L43/0811—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters by checking availability by checking connectivity
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Abstract
The application provides a kind of method and device of port connectivity test, the described method includes: CPU constructs initial testing message, and the initial testing message is sent to forwarding chip, forwarding chip is configured as being tested reception initial testing message in port by head end, and is successively forwarded by the tested port on test path；And forwarding chip is configured as that the received intermediate test packet in port will be tested by end and is back to CPU；Received intermediate test packet is sent to forwarding chip by CPU, and forwarding chip is configured as being tested reception intermediate test packet in port by end, and is successively forwarded by the tested port on test path；And forwarding chip is configured as that the received final test message in port will be tested by head end and is back to CPU；CPU determines that initial testing message is identical as final test message, then each the connectivity of tested port is tested successfully, can greatly speed up test speed in this way, improves working efficiency.
Description
Technical field
This application involves network communication technology fields, more particularly to a kind of method and device of port connectivity test.
Background technique
Interchanger needs to test the port connectivity of equipment before factory.The switch port continuity testing
Refer to the detection to switch port transmitting-receiving message ability, if the port of interchanger can correctly send and receive message,
Then port fault-free, otherwise there are failures for port.
In the related art, continuity testing individually often is carried out to port, at this moment just needs to expand out using optical module
The optical module is docked using optical fiber by being inserted into optical module in a switch port in transmitting terminal and receiving end, and
Setting forwarding chip is in wrapped state.Switch CPU constructs message and the message is sent to forwarding chip in this way, forwards core
Piece is configured as receiving and dispatching message by tested port, and the message is back to switch CPU, and switch CPU compares transmission
Message and received message it is whether identical, if received message is identical as the message of transmission, then it is assumed that switch port without
Failure, otherwise, there are failures for switch port.
But in practical applications, continuity testing often is carried out to multiple ports of interchanger, correspondingly will use
In addition multiple optical modules and multifiber are also docked optical module with optical fiber, not only spent material, work are also extremely numerous in this way
It is trivial, reduce the working efficiency of test switch port connectivity.
Summary of the invention
In view of this, the present invention provides a kind of method and device of port connectivity test, exchange can be tested at the same time
When the connectivity of multiple ports of machine, material can be not only saved, may also speed up test speed, improves working efficiency.
Specifically, the application is achieved by the following technical solution:
According to the first aspect of the invention, a kind of method of port connectivity test is proposed, switch CPU is applied to
On, which comprises
It is configured to carry out multiple tested ports the initial testing message of continuity testings, and by the initial testing report
Text is sent to forwarding chip, and plurality of tested port is sequentially connected in series by physical circuit, forms a test path；Wherein,
The forwarding chip is configured as being tested the reception initial testing message in port by head end, and by the test path
Tested port successively forward；And the forwarding chip is configured as that the intermediate survey that port receives will be tested by end
Examination message is back to switch CPU；
The intermediate test packet received is sent to forwarding chip again, the forwarding chip is configured as passing through end
Tested port receives the intermediate test packet, and is successively forwarded by the tested port on the test path；And it is described
Forwarding chip, which is configured as that the final test message that port receives will be tested by head end, is back to switch CPU；
It determines that the initial testing message is identical as the final test message, is then each tested the connectivity quilt of port
It is successfully tested.
According to the second aspect of the invention, a kind of device of port connectivity test is proposed, switch CPU is applied to
On, described device includes:
Structural unit is configured to carry out multiple tested ports the initial testing message of continuity testing, and will be described
Initial testing message is sent to forwarding chip, and plurality of tested port is sequentially connected in series by physical circuit, forms a test
Path；
First retransmission unit makes the forwarding chip be configured as being tested the reception initial testing report in port by head end
Text, and successively forwarded by the tested port on the test path；And the forwarding chip is configured as that end will be passed through
The intermediate test packet that tested port receives is back to switch CPU；
The intermediate test packet received is sent to forwarding chip, the forwarding chip quilt by the second retransmission unit again
It is configured to be tested the reception intermediate test packet in port by end, and successively by the tested port on the test path
Forwarding；And the forwarding chip is configured as that the final test message return best friend that port receives will be tested by head end
Change planes CPU；
First determination unit determines that the initial testing message is identical as the final test message, then each tested end
The connectivity of mouth is tested successfully.
From the above technical scheme, multiple tested ports are sequentially connected in series by the present invention with physical circuit, can be surveyed simultaneously
Try the connectivity of multiple ports of interchanger, switch CPU configuration forwarding chip respectively from it is positive, reversely pass sequentially through each quilt
The initial testing message of port transmission switch CPU construction is surveyed, so that head end is tested port and end and is tested port and can carry out
Primary transmitting-receiving test packet, and final test message is back to switch CPU, according to above-mentioned initial testing message and final survey
Whether examination message is identical to be tested port to determine whether there is failure, tests the connection of multiple ports of interchanger simultaneously in this way
Property, test speed is greatly accelerated, is improved work efficiency.
Detailed description of the invention
Fig. 1 is a kind of method flow diagram of port connectivity test of an exemplary embodiment of the invention；
Fig. 2 is the tested port series connection schematic diagram of the present invention two；
Fig. 3 is the switch CPU and two side's interaction flow schematic diagram of forwarding chip of an exemplary embodiment of the invention；
Fig. 4 is the multiple tested port series connection schematic diagrames of the present invention；
Fig. 5 is a kind of apparatus structure schematic diagram of port connectivity test of an exemplary embodiment of the invention；
Fig. 6 is a kind of device frame schematic diagram of port connectivity test of an exemplary embodiment of the invention.
Specific embodiment
Example embodiments are described in detail here, and the example is illustrated in the accompanying drawings.Following description is related to
When attached drawing, unless otherwise indicated, the same numbers in different drawings indicate the same or similar elements.Following exemplary embodiment
Described in embodiment do not represent all embodiments consistent with the application.On the contrary, they be only with it is such as appended
The example of the consistent device and method of some aspects be described in detail in claims, the application.
It is only to be not intended to be limiting the application merely for for the purpose of describing particular embodiments in term used in this application.
It is also intended in the application and the "an" of singular used in the attached claims, " described " and "the" including majority
Form, unless the context clearly indicates other meaning.It is also understood that term "and/or" used herein refers to and wraps
It may be combined containing one or more associated any or all of project listed.
In the related art, usually individually the connectivity of each port of interchanger is tested, thus needs to make
Receiving end and transmitting terminal are expanded out with optical module, by being inserted into optical module in port, sends mouth and light using optical fiber connection light
Receiving port, and forwarding chip is set and is in wrapped state, the test packet according to the more received test packet of CPU and transmission is
It is no consistent to determine whether the connectivity of port is normal.However, in practical situations, needing to carry out the interchanger of continuity testing
Often there are many ports, then, if it is desired to the disposable continuity testing completed to all of the port, it is necessary to using multiple
Optical module and multifiber will lead to the waste of material in this way；If wishing that an optical module is used only and a test optical fiber being more
A tested port, and need to plug the optical module and optical fiber back and forth, work can become extremely cumbersome, and working efficiency substantially reduces.
Therefore, the present invention can solve related skill by proposing the improvement project of a kind of pair of port continuity testing method
The above problem in art, is illustrated below with reference to embodiment.
Fig. 1 is a kind of method flow diagram of port connectivity test of an exemplary embodiment of the invention, as shown in Figure 1,
The method is applied on switch CPU, may comprise steps of:
In a step 101, for multiple tested ports to be carried out with the initial testing message of continuity testing, and will be described first
Beginning test packet is sent to forwarding chip, and plurality of tested port is sequentially connected in series by physical circuit, forms a test road
Diameter；Wherein, the forwarding chip is configured as being tested the reception initial testing message in port by head end, and passes through the survey
Tested port on examination path successively forwards；And the forwarding chip is configured as that port will be tested by end and receives
Intermediate test packet be back to switch CPU.
In the present embodiment, when being sequentially connected in series multiple tested ports by physical circuit, it is connected in the tested port one at both ends
A head end that can be used as is tested port, another can be used as end and is tested port.Wherein, above-mentioned test path may include
One forward-path and the second forward-path, first forward-path are as follows: the tested port in tested port →... ... the end of head end, and the
Two forward-paths are as follows: end is tested port →... ... head end and is tested port.
In the present embodiment, since can continuity testing be carried out to multiple tested ports simultaneously, then multiple tested ends
Mouth can provide transmitting terminal and the receiving end of test packet simultaneously, thus only need using physical circuits such as cable or cables i.e.
Can, transmitting terminal and receiving end are expanded out without using optical module, can save material in this way, reduce answering for connection
Miscellaneous degree.
In a step 102, the intermediate test packet received is sent to forwarding chip again, the forwarding chip is matched
It is set to and the reception intermediate test packet in port is tested by end, and successively turned by the tested port on the test path
Hair；And the forwarding chip is configured as that the final test message that port receives will be tested by head end and is back to exchange
Machine CPU.
In the present embodiment, when executing continuity testing of the invention, head end can be tested port and set by switch CPU
It is set to continuity testing state；So, when switch CPU receives the intermediate test packet and the head end is tested at port
When continuity testing state, switch CPU can be determined and is currently at during continuity testing, thus in receiving
Between test packet be sent to forwarding chip again so that the tested port on the test path successively forwards.
In step 103, it determines that the initial testing message is identical as the final test message, is then each tested port
Connectivity be tested successfully.
In the present embodiment, when initial testing message and final test message be not identical, switch CPU can be determined
State in multiple tested ports there are failure be tested port.At this point, switch CPU can according to statistics obtain each be tested port
Packet drop, by the tested port that packet loss phenomenon occurs be determined as failure be tested port.
From the above technical scheme, multiple tested ports are sequentially connected in series by the present invention with physical circuit, can be surveyed simultaneously
Try the connectivity of multiple ports of interchanger, switch CPU configuration forwarding chip respectively from it is positive, reversely pass sequentially through each quilt
The initial testing message of port transmission switch CPU construction is surveyed, so that head end is tested port and end and is tested port and can carry out
Primary transmitting-receiving test packet, and final test message is back to switch CPU, according to above-mentioned initial testing message and final survey
Whether examination message is identical to be tested port to determine whether there is failure, tests the connection of multiple ports of interchanger simultaneously in this way
Property, test speed is greatly accelerated, is improved work efficiency.
In the inventive solutions, can with the connectivity of multiple ports of disposable test interchanger, for the ease of
Understand, technical solution of the present invention is described in further detail below with reference to Fig. 2 and Fig. 3.Wherein, Fig. 2 is the present invention one
Two port connection schematic diagrams of the interchanger of exemplary embodiment, referring to fig. 2: forwarding chip and CPU are integrated on switches,
It is connected between the port 1 and port 2 of interchanger by physical circuit；And as shown in figure 3, switch CPU and forwarding chip cooperate
The process for testing the connectivity of switch port, may comprise steps of:
In step 301, switch CPU constructs initial testing message.
In the present embodiment, switch CPU is configured to carry out two tested ports the initial testing of continuity testing
Message.
In step 302, switch CPU setting port 1 is in continuity testing state.
In the present embodiment, switch CPU can control the variable for characterizing tested port connectivity state, be become by switching
Amount is arranged port 1 as shown in Figure 2 and is in continuity testing state.
In step 303, initial testing message is sent to forwarding chip by switch CPU.
In the present embodiment, as shown in Fig. 2, connecting between port 1 and port 2 by physical circuit, a test is formed
Path, wherein the physical circuit can other can be with the physical circuit of transmitting message for cable or cable etc., and the present invention is not right
This is limited.In addition, above-mentioned test path may include the first forward-path and the second forward-path, wherein this first turn
Send out path are as follows: 1 → port of port 2, second forward-path are as follows: 2 → port of port 1.
In step 304, forwarding chip is configured as receiving initial testing message by port 1.
In the present embodiment, switch CPU can be set in forwarding chip DMA (Direct Memory Access, directly
Connect memory access) structural body, forwarding chip is configured by port 1 and receives above-mentioned initial testing message, which is
Switch CPU is configured to carry out the test packet of two port connectivities test.
In step 305, forwarding chip is configured as returning to intermediate test packet to switch CPU by port 2.
In the present embodiment, initial testing message step 304 middle port 1 received passes through cable or cable to port
2 forwardings, forwarding chip are configured as that switch CPU will be back to by the received intermediate test packet in port 2, at this point, test
Message is completed to forward according to the first forward-path, wherein first forward-path are as follows: 1 → port of port 2.
Within step 306, switch CPU judges whether intermediate test packet come from port 1 and port 1 in port
Continuity testing state.
In the present embodiment, when switch CPU receives the intermediate test packet and port 1 is in continuity testing shape
When state, the intermediate test packet received is sent to forwarding chip by switch CPU again, so that the intermediate test packet is pressed
It is forwarded according to the second forward-path described in step 303；When switch CPU determines that the intermediate test packet is not from end
Mouthful 1 or when port 1 be in connectivity closed state at this time, show to may be port 1 or port 2 there are the tested port of failure,
It is also likely to be to occur other failures in repeating process, can specifically handles as the case may be at this time.
In step 307, switch CPU sends intermediate test packet to forwarding chip.
In the present embodiment, when switch CPU receives above-mentioned intermediate test packet and above-mentioned head end is tested port and is in
When continuity testing state, show test packet by according to not breaking down in the first forward-path repeating process, interchanger
The intermediate test packet received is sent to forwarding chip by CPU again, so that the intermediate test packet is according in step 303
Second forward-path is forwarded.
In step 308, forwarding chip is configured as receiving intermediate test packet by port 2.
In the present embodiment, switch CPU can configure forwarding chip and receive above-mentioned intermediate test packet by port 2.
In a step 309, forwarding chip is configured as returning to final test message to switch CPU by port 1.
In the present embodiment, forwarding chip is configured as returning to above-mentioned final test report to switch CPU by port 1
Text, at this point, test packet is completed to forward according to the second forward-path again, wherein second forward-path are as follows: port 2 → end
Mouth 1.
In the step 310, switch CPU judges whether initial testing message is identical as final test message.
In the present embodiment, when switch CPU determines that above-mentioned initial testing message is identical as final test message, show
There is no packet loss phenomenon when the initial testing message is forwarded by port 1 and port 2, then port 1 and port 2 are connected to
Property is tested successfully；When above-mentioned initial testing message and final test message difference, switch CPU determines shown in Fig. 2
There are at least one failures to be tested port in port 1 and port 2.Exist at least when switch CPU determines in port 1 and port 2
It is according to the packet drop of the port 1 and port 2 that count on, the port that packet loss phenomenon occurs is true when one failure is tested port
It is set to failure and is tested port.
Certainly, the method for the connectivity of two ports of above-mentioned test interchanger stands good in while testing interchanger
It the case where connectivity of multiple ports, is described in detail below by Fig. 4:
It is illustrated in figure 4 while continuity testing schematic diagram is carried out to multiple ports of interchanger, wherein port 1, port
2 ... port N are sequentially connected in series by cable or cable, form a test path.
After switch CPU is configured to the initial testing message for testing multiple tested port connectivities, setting head end is tested
Examination port (port 1) is in continuity testing state, and the initial testing message is sent to forwarding chip, the forwarding chip
It is configured as being tested reception above-mentioned initial testing message in port by head end, and the centre that port receives will be tested by head end
Test packet is successively forwarded by the tested port on above-mentioned test path, for example, above-mentioned intermediate test packet passes sequentially through end
Mouth 1, port 2 ... port N are forwarded.Forwarding chip is configured as to be tested what port (port N) received by end again
Intermediate test packet is back to switch CPU.At this point, the test packet of switch CPU construction is by according to forward-path are as follows: port
1 → port, 2 →... ... → port N is forwarded.
When switch CPU receives intermediate test packet, and determine that head end is tested port (port 1) and is in continuity testing
When state, the intermediate test packet received is sent to forwarding chip by switch CPU again, which is configured as leading to
It crosses end and is tested the above-mentioned intermediate test packet of port (port N) reception, and successively by the tested port on the test path
Forwarding, for example, being forwarded by port N, the port port N-1 ... 1.Forwarding chip is configured as again will be by the tested end of head end
The final test message that mouth (port 1) receives is back to switch CPU.At this point, switch CPU will be sent to forwarding core again
The test packet of piece is according to forward-path are as follows: port N → port N-1 →... ... → port 1 is forwarded.
The more above-mentioned initial testing message of switch CPU and final test message, when initial test packet and final test
When message is identical, then each the connectivity of tested port (port 1, port 2 ... port N) is tested successfully；It is surveyed when initial
When trying message and not identical final test message, it may indicate that at least there is a tested port in multiple tested ports occurs
That is, at least there is a failure and be tested port in packet loss phenomenon.Switch CPU can obtain each being tested port according to statistics
The tested port that packet loss phenomenon occurs is determined as failure and is tested port by packet drop.For example, what switch CPU counted
Port 1, port 2 ... port N packet drop are as follows: 2 packet loss of port is primary, and twice, other tested ports are not for 3 packet loss of port
Packet loss, it is possible to which determining port 2 and port 3 are that failure is tested port.
Corresponding with the embodiment of aforementioned port connectivity test method, present invention also provides port connectivity tests to fill
The embodiment set.
The embodiment of the application port connectivity test device can be using on switches.Installation practice can pass through
Software realization can also be realized by way of hardware or software and hardware combining.Taking software implementation as an example, it anticipates as a logic
Device in justice is to be read computer program instructions corresponding in nonvolatile memory by the processor of interchanger where it
Get what operation in memory was formed.For hardware view, if Fig. 5 is a kind of port connection of an exemplary embodiment of the invention
Property test apparatus structure schematic diagram, in figure other than forwarding chip, processor, memory and nonvolatile memory, also
It may include other hardware, this repeated no more.
Fig. 6 is a kind of device frame schematic diagram of port connectivity test of an exemplary embodiment of the invention, the device
It include: structural unit 601, the first retransmission unit 602, the second retransmission unit 603 and the first determination unit 604.
Wherein, structural unit 601 are configured to carry out multiple tested ports the initial testing message of continuity testing,
And the initial testing message is sent to forwarding chip, plurality of tested port is sequentially connected in series by physical circuit, is formed
One test path.
First retransmission unit 602 makes the forwarding chip be configured as being tested the reception initial survey in port by head end
Message is tried, and is successively forwarded by the tested port on the test path；And the forwarding chip is configured as to pass through
End is tested the intermediate test packet that port receives and is back to switch CPU.
The intermediate test packet received is sent to forwarding chip, the forwarding chip by the second retransmission unit 603 again
Be configured as being tested port by end and receive the intermediate test packet, and by the tested port on the test path according to
Secondary forwarding；And the forwarding chip is configured as that the final test message that port receives will be tested by head end and is back to
Switch CPU.
First determination unit 604 determines that the initial testing message is identical as the final test message, then each tested
The connectivity of port is tested successfully.
Optionally, further includes:
Setting unit 605, switch CPU are arranged the tested port of the head end and are in continuity testing state；
Second retransmission unit sends switch CPU again the intermediate test packet received by following manner
To forwarding chip:
Continuity testing state is in when switch CPU receives the intermediate test packet and the head end and is tested port
When, the intermediate test packet received is sent to forwarding chip by switch CPU again, so that tested on the test path
Port successively forwards.
Optionally, further includes:
Report an error unit 606, and when the initial testing message and the final test message be not identical, switch CPU is true
There are failures to be tested port in fixed the multiple tested port.
Optionally, further includes:
Second determination unit 607, according to statistics obtain each be tested port packet drop, packet loss phenomenon will occur
Tested port is determined as failure and is tested port.
Optionally, the physical circuit includes cable or cable.
The function of each unit and the realization process of effect are specifically detailed in the above method and correspond to step in above-mentioned apparatus
Realization process, details are not described herein.
For device embodiment, since it corresponds essentially to embodiment of the method, so related place is referring to method reality
Apply the part explanation of example.The apparatus embodiments described above are merely exemplary, wherein described be used as separation unit
The unit of explanation may or may not be physically separated, and component shown as a unit can be or can also be with
It is not physical unit, it can it is in one place, or may be distributed over multiple network units.It can be according to actual
The purpose for needing to select some or all of the modules therein to realize application scheme.Those of ordinary skill in the art are not paying
Out in the case where creative work, it can understand and implement.
The foregoing is merely the preferred embodiments of the application, not to limit the application, all essences in the application
Within mind and principle, any modification, equivalent substitution, improvement and etc. done be should be included within the scope of the application protection.
Claims (10)
1. a kind of method of port connectivity test, which is characterized in that be applied on switch CPU, which comprises
It is configured to carry out multiple tested ports the initial testing message of continuity testing, and the initial testing message is sent out
It send to forwarding chip, plurality of tested port is sequentially connected in series by physical circuit, forms a test path；Wherein, described
Forwarding chip is configured as being tested the reception initial testing message in port by head end, and passes through the quilt on the test path
It surveys port and by head end is tested port to end and is tested the direction of port and successively forward；And the forwarding chip be configured as by
The intermediate test packet that port receives, which is tested, by end is back to switch CPU；
The intermediate test packet received is sent to forwarding chip again, the forwarding chip is configured as tested by end
Port receives the intermediate test packet, and is tested port to head end quilt by end by the tested port on the test path
The direction for surveying port successively forwards；And the forwarding chip be configured as being tested by head end port receive it is final
Test packet is back to switch CPU；
It determines that the initial testing message is identical as the final test message, is then each tested the transmitting-receiving connectivity quilt of port
It is successfully tested.
2. the method according to claim 1, wherein
Further include: switch CPU is arranged the tested port of the head end and is in continuity testing state；
The intermediate test packet received is sent to forwarding chip by the switch CPU again, comprising:
When switch CPU receives the intermediate test packet and the tested port of the head end is in continuity testing state,
The intermediate test packet received is sent to forwarding chip by switch CPU again, so that the tested end on the test path
Mouth successively forwards.
3. the method according to claim 1, wherein further include:
When the initial testing message and the final test message be not identical, switch CPU determines the multiple tested end
There are failures to be tested port in mouthful.
4. according to the method described in claim 3, it is characterized by further comprising:
According to statistics obtain each be tested port packet drop, the tested port that packet loss phenomenon occurs is determined as failure quilt
Survey port.
5. the method according to claim 1, wherein the physical circuit includes cable or cable.
6. a kind of device of port connectivity test, which is characterized in that be applied on switch CPU, described device includes:
Structural unit is configured to carry out multiple tested ports the initial testing message of continuity testing, and will be described initial
Test packet is sent to forwarding chip, and plurality of tested port is sequentially connected in series by physical circuit, forms a test path；
First retransmission unit makes the forwarding chip be configured as being tested the reception initial testing message in port by head end,
And it port to end by head end is tested by the tested port on the test path is tested the direction of port and successively forward；With
And the forwarding chip is configured as that the intermediate test packet that port receives will be tested by end and is back to switch CPU；
The intermediate test packet received is sent to forwarding chip by the second retransmission unit again, and the forwarding chip is configured
The intermediate test packet is received to be tested port by end, and end quilt is pressed by the tested port on the test path
The direction that survey port to head end is tested port successively forwards；And the forwarding chip is configured as to hold by the way that head end is tested
The final test message that mouth receives is back to switch CPU；
First determination unit determines that the initial testing message is identical as the final test message, then is each tested port
Transmitting-receiving connectivity is tested successfully.
7. device according to claim 6, which is characterized in that
Further include: setting unit, switch CPU are arranged the tested port of the head end and are in continuity testing state；
Second retransmission unit by following manner make switch CPU by the intermediate test packet received again be sent to turn
Send out chip:
When switch CPU receives the intermediate test packet and the tested port of the head end is in continuity testing state,
The intermediate test packet received is sent to forwarding chip by switch CPU again, so that the tested end on the test path
Mouth successively forwards.
8. device according to claim 6, which is characterized in that further include:
Report an error unit, and when the initial testing message and the final test message be not identical, switch CPU determines described more
There are failures to be tested port in a tested port.
9. device according to claim 8, which is characterized in that further include:
Second determination unit, according to statistics obtain each be tested port packet drop, the tested end of packet loss phenomenon will occur
Mouth is determined as failure and is tested port.
10. device according to claim 6, which is characterized in that the physical circuit includes cable or cable.
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| CN201610711986.2A CN106330604B (en) | 2016-08-23 | 2016-08-23 | A kind of method and device of port connectivity test |
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| CN107888457B (en) * | 2017-12-08 | 2020-08-14 | 新华三技术有限公司 | Port packet loss detection method and device and communication equipment |
| CN108156052B (en) * | 2017-12-25 | 2020-08-04 | 杭州迪普科技股份有限公司 | Method and system for testing equipment stability |
| CN111131090A (en) * | 2019-12-26 | 2020-05-08 | 盛科网络（苏州）有限公司 | Message processing method and device |
| CN111083015B (en) * | 2019-12-27 | 2021-12-24 | 杭州迪普科技股份有限公司 | Board card testing method and device |
| CN111385166A (en) * | 2020-02-21 | 2020-07-07 | 苏州浪潮智能科技有限公司 | Network switch testing method, device, equipment and storage medium |
| CN117319278A (en) * | 2023-11-27 | 2023-12-29 | 苏州元脑智能科技有限公司 | Switch testing method and device, electronic equipment and storage medium |
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| CN102664774A (en) * | 2012-05-31 | 2012-09-12 | 迈普通信技术股份有限公司 | Method for testing port connectivity of switch |
| CN103078770A (en) * | 2013-01-22 | 2013-05-01 | 浪潮电子信息产业股份有限公司 | Method for testing stability of switch |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101834679A (en) * | 2010-04-26 | 2010-09-15 | 福建星网锐捷网络有限公司 | Port test method, device and system |
| CN102355377A (en) * | 2011-06-30 | 2012-02-15 | 迈普通信技术股份有限公司 | Entire test system and method for Ethernet switch |
| CN102664774A (en) * | 2012-05-31 | 2012-09-12 | 迈普通信技术股份有限公司 | Method for testing port connectivity of switch |
| CN103078770A (en) * | 2013-01-22 | 2013-05-01 | 浪潮电子信息产业股份有限公司 | Method for testing stability of switch |
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