CN106257812A - A kind of power management chip controlled based on COT containing flow equalizing function biphase Buck circuit - Google Patents
A kind of power management chip controlled based on COT containing flow equalizing function biphase Buck circuit Download PDFInfo
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- CN106257812A CN106257812A CN201610687539.8A CN201610687539A CN106257812A CN 106257812 A CN106257812 A CN 106257812A CN 201610687539 A CN201610687539 A CN 201610687539A CN 106257812 A CN106257812 A CN 106257812A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/157—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators with digital control
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
- H02M1/088—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/14—Arrangements for reducing ripples from dc input or output
- H02M1/143—Arrangements for reducing ripples from dc input or output using compensating arrangements
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
- H02M3/1584—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load with a plurality of power processing stages connected in parallel
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0048—Circuits or arrangements for reducing losses
- H02M1/0054—Transistor switching losses
- H02M1/0058—Transistor switching losses by employing soft switching techniques, i.e. commutation of transistors when applied voltage is zero or when current flow is zero
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
- H02M3/1584—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load with a plurality of power processing stages connected in parallel
- H02M3/1586—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load with a plurality of power processing stages connected in parallel switched with a phase shift, i.e. interleaved
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Electronic Switches (AREA)
Abstract
The invention discloses a kind of power management chip controlled containing flow equalizing function biphase Buck circuit based on COT, it is provided with power supply input pin, output voltage foot, grounding leg and two switch SW feet.Switching tube in chip internal reference circuit module, comparator module, Voltage loop module, clock generation module, control logical AND soft-start module, constant on-time generation module, ripple compensation module, current sample module, current balance module, driving module and four sheets.Power management chip of the present invention can overcome multiple unsymmetrical factors to realize current balance efficiently, and precision is higher, can be operated under higher switching frequency, and compared with the traditional method of digital control coupling dutycycle, energy loss is less, and footprint area is less.
Description
Technical field
The invention belongs to technical field of integrated circuits, be specifically related to a kind of based on COT control biphase Buck Han flow equalizing function
The power management chip of circuit.
Background technology
Power management class chip is that each module in system is carried out the chip of the management of power use, some power management chip meetings
It is used for switching power circuit.Switching power circuit is from being broadly defined as, and all semiconductor power devices are as switch, by electricity
Source Morphological Transitions becomes another form, with automatically controlling closed-loop stabilization output the circuit of protected link during transformation.Switch electricity
Source circuit generally comprises control chip and peripheral circuit.The common topological structure of switching power circuit has: buck chopper (Buck),
Boost chopper (Boost), inverse-excitation type, positive activation type, half-bridge and full-bridge.Wherein the control mode of Buck circuit includes: sluggish control
The control of system, constant on-time (COT), voltage type PWM control and current type PWM control etc..
When load need bigger electric current time, changer can more employing heterogeneous structures, multiple branch circuit parallel connections are come to output
End provides energy.Many times, heterogeneous structure is the working method using phase alternation, and the switching frequency of each branch road keeps one
Causing, but phase place staggers, the frequency of output ripple then becomes switching frequency and is multiplied by circuitry number.Now heterogeneous structure can simplify
Become the phase structure that switching frequency increases.Thus the heterogeneous structure that phase sequence is alternately can be greatly improved loop bandwidth, and then improve wink
State response speed, meets the requirement of large current load.Owing to each branch road is required for power tube and inductance, so whole changer
Switch block quantity can increase.Single from the point of view of efficiency, heterogeneous structure promotes the most further, even can bring more
Many switching losses.But the maximum current that phase structure can be provided by is the most limited, the reliability of work is the highest;And it is heterogeneous
Load current is evenly distributed to each branch road by structure, and output load current ability can be significantly greatly increased, and the most each branch road bears
Electric current also will not be the highest, functional reliability is ensured.But heterogeneous structure needs extra current equalization circuit, make every
The electric current of individual branch road is equal.
Conventional digital control biphase Buck circuit structure as it is shown in figure 1, its method using dutycycle to mate realizes,
Owing to the analog circuit of tradition generation dutycycle is very sensitive to the unsymmetrical factors of branch road, in order to reach corresponding precision, need to adopt
The dutycycle of coupling is produced with digital module.But, digital control meeting inevitably introduces quantization error, thus causes not
Good limit cycle;Additionally, the High-accuracy direct current changer being operated under the highest switching frequency needs high-resolution and at a high speed
Digital PWM generator and analog-digital converter, can cause the most again the loss of energy and the waste of area.
Summary of the invention
For the above-mentioned technical problem existing for prior art, the invention provides a kind of based on COT control merit Han current-sharing
The power management chip of the biphase Buck circuit of energy, it is possible to be operated under higher switching frequency, overcome various unsymmetrical factors, will
Load current is evenly distributed to each branch road, it is to avoid each phase current is unequal when causing that single-phase loss is excessive even affects work
Sequence, and relatively conventional digital control method energy loss is relatively low, footprint area is less.
A kind of power management chip controlled based on COT containing flow equalizing function biphase Buck circuit, including:
Article two, switching branches, described switching branches comprises power switch pipe Mp and Mn;Wherein, the source of power switch pipe Mp
The input voltage V of connection circuitIN, the drain terminal of a power switch pipe Mp phase electricity corresponding with the drain terminal of power switch pipe Mn and circuit
One end of sense is connected, and the source ground connection of power switch pipe Mn, in circuit, the other end of two phase inductances is parallel with one another;
Reference circuit module, it is at input voltage VINFor during high level in sheet provide reference voltage VBG;
Ripple compensation module, the output voltage V of its sample circuitOAnd two junction points of phase inductance and corresponding switching branches
Voltage, thus produce reference voltage FB and two-way compensation voltage RAMP1And RAMP2;
Voltage loop module, it is according to reference voltage FB and reference voltage VBGCompare, produce burning voltage VCON;
Current sample module, it is by flowing through power switch pipe Mp's in current mirror Cycle by Cycle two switching branches of sampling
Current peak, corresponding generation is positively correlated with the current sample voltage VCS of current peak1And VCS2;
Current balance module, it is according to current sample voltage VCS1And VCS2Comparing, the electric current producing a pair difference is equal
Weighing apparatus voltage VCB1And VCB2;
Two comparator module, described comparator module has two and aligns inverting input, and its outfan produces and compares letter
Number;Wherein a pair of a comparator module positive inverting input meets burning voltage V respectivelyCONWith compensation voltage RAMP1, another is right
Positive inverting input meets current balance voltage VCB respectively1And VCB2;The positive inverting input of a pair of another comparator module is respectively
Meet burning voltage VCONWith compensation voltage RAMP2, another aligns inverting input and meets current balance voltage VCB respectively2And VCB1;
Two constant on-time generation modules, described constant on-time generation module is according to corresponding comparator module
Comparison signal generates ON time signal;
Two control logical AND soft-start module, and described control logical AND soft-start module is according to corresponding constant on-time
The ON time signal of generation module generates driving signal by controlling logic;
Two drive module, and described driving module makes the corresponding driving signal power controlling logical AND soft-start module amplify
After in order to drive power switch pipe Mp and Mn in corresponding switching branches to carry out on-off control.
Described reference voltage FB is proportional to output voltage VODC component, compensate voltage RAMP1AC compounent direct ratio
In the AC compounent of a wherein phase inductance electric current, compensate voltage RAMP2AC compounent be proportional to the friendship of another phase inductance electric current
Flow component, compensates voltage RAMP1And RAMP2DC component be equal to reference voltage FB.
Described constant on-time generation module is when comparison signal is low level, and generating ON time signal is just high electricity
Putting down and the pulsewidths constant of this high level, other times generate ON time signal and are low level.
Described control logical AND soft-start module when closed between signal when being high level, generating and driving signal is low electricity
Flat, when closed between signal when being low level, generating and driving signal is high level.
Described driving module is when driving signal is low level so that it is power switch pipe Mp in the corresponding switching branches driven
Open-minded, power switch pipe Mn turns off;When being high level when driving signal so that it is power switch pipe in the corresponding switching branches driven
Mn is open-minded, and power switch pipe Mp turns off.
Described current balance module includes the trsanscondutance amplifier GM singly exported1, the trsanscondutance amplifier of dual output differential type
GM2, electric capacity C or door, eight current source I1~I8, five switch S1~S5, four PMOS PM1~PM4, resistance R11~R12With
R21~R22, three NMOS tube NM1~NM3, two rest-set flip-flop R1~R2, two phase inverter INV1~INV2, two chronotron
Delay1~Delay2, three digit counter CA of dual input1Enumerator CA with single input2;Wherein: trsanscondutance amplifier GM1Just
Phase input and inverting input meet current sample voltage VCS respectively1And VCS2, trsanscondutance amplifier GM1Outfan and electric capacity C
Top crown, switch S5One end and trsanscondutance amplifier GM2Inverting input be connected, the bottom crown ground connection of electric capacity C, eight
Current source I1~I8Input all meet supply voltage, current source I6Outfan and trsanscondutance amplifier GM2Normal phase input end,
Switch S5The other end and NMOS tube NM1Drain and gate be connected, NMOS tube NM1Source ground, current source I1~I4's
Outfan respectively with switch S1~S4One end be connected, switch S1~S4The other end and trsanscondutance amplifier GM2Positive output end,
Resistance R11One end and PMOS PM1Grid be connected, resistance R11Other end ground connection, current source I5Outfan and mutual conductance
Amplifier GM2Reversed-phase output, resistance R12One end and PMOS PM2Grid be connected, resistance R12Other end ground connection,
Current source I7Outfan and PMOS PM1Source electrode and PMOS PM2Source electrode be connected, current source I8Outfan with
PMOS PM3Source electrode and PMOS PM4Source electrode be connected, PMOS PM3Grid and PMOS PM4Grid connect respectively
Current sample voltage VCS1And VCS2, PMOS PM1Drain electrode and PMOS PM3Drain electrode, resistance R21One end and NMOS tube
NM2Drain electrode be connected and produce current balance voltage VCB1, PMOS PM2Drain electrode and PMOS PM4Drain electrode, resistance R22's
One end and NMOS tube NM3Drain electrode be connected and produce current balance voltage VCB2, resistance R21The other end and resistance R22Another
One end, NMOS tube NM2Grid and NMOS tube NM3Grid be connected, NMOS tube NM2Source electrode and NMOS tube NM3Source electrode connect
Ground;Phase inverter INV1And INV2Input connect respectively two control logical AND soft-start modules generate two-way drive signals, instead
Phase device INV1Outfan and chronotron Delay1Input and rest-set flip-flop R1R end, phase inverter INV2Outfan with
Chronotron Delay2Input and rest-set flip-flop R2R end, chronotron Delay1Outfan and rest-set flip-flop R1S end
It is connected, chronotron Delay2Outfan and rest-set flip-flop R2S end be connected, rest-set flip-flop R1Outfan and three digit counters
CA1First input end and or door first input end be connected, rest-set flip-flop R2Outfan and three digit counter CA1?
Two inputs and or door the second input be connected, three digit counter CA1Three outfans respectively switch S1~S3There is provided
Switch controlling signal, or the outfan of door and enumerator CA2Input be connected, enumerator CA2Outfan for switch S4There is provided
Switch controlling signal.
Described current source I1~I5Output size of current be respectively 1uA, 2uA, 4uA, 0.5uA and 4uA.
Described three digit counter CA1Sum counter CA2Input be rising edge trigger, wherein three digit counter CA1's
First input end often receives a rising edge and adds 1, and the second input often receives a rising edge and subtracts 1, three digit counter CA1Meter
Numerically lower limit is respectively 8 and 0;Enumerator CA2Count value be added to 8 after persistently export high level, otherwise output low level.
Described comparator module includes a bias current sources, 12 PMOS P1~P12With seven NMOS tube N1~N7;
Wherein: PMOS P1~P8Source electrode all connect supply voltage, PMOS P1Grid and PMOS P2Grid, PMOS P1Leakage
Pole, PMOS P3Grid and bias current sources input be connected, the output head grounding of bias current sources, PMOS P2's
Drain electrode and PMOS P9Source electrode and PMOS P10Source electrode be connected, PMOS P3Drain electrode and PMOS P11Source electrode and
PMOS P12Source electrode be connected, PMOS P4Grid and PMOS P5Grid, PMOS P4Drain electrode and NMOS tube N3's
Drain electrode is connected, PMOS P5Drain electrode and PMOS P6Grid and NMOS tube N4Drain electrode be connected, PMOS P6Drain electrode with
PMOS P7Grid, NMOS tube N6Grid and NMOS tube N5Drain electrode be connected, PMOS P7Drain electrode and PMOS P8's
Grid, NMOS tube N7Grid and NMOS tube N6Drain electrode be connected, PMOS P8Drain electrode and NMOS tube N7Drain electrode be connected also
Produce comparison signal, PMOS P10Grid and PMOS P9Grid to correspond to a pair of comparator module respectively the most anti-phase defeated
Enter end, PMOS P12Grid and PMOS P11Another of grid corresponding comparator module respectively align inverting input,
PMOS P9Drain electrode and NMOS tube N1Grid, NMOS tube N4Grid, PMOS P11Drain electrode and NMOS tube N1Drain electrode
It is connected, PMOS P10Drain electrode and NMOS tube N2Grid, NMOS tube N3Grid, NMOS tube N5Grid, PMOS P12's
Drain electrode and NMOS tube N2Drain electrode be connected, NMOS tube N1~N7Source grounding.
Described PMOS P10Breadth length ratio and PMOS P12The ratio of breadth length ratio and PMOS P9Breadth length ratio and PMOS
Pipe P11The ratio of breadth length ratio to be 1:N, N be the real number more than 1.
The Advantageous Effects of power management chip of the present invention is as follows:
(1) current equalization circuit in the present invention, it is possible to be operated under higher switching frequency, overcome various asymmetric because of
Asymmetric such as offset voltage, inductance, electric capacity, resistance etc. of element, it is possible to the phase sequence realizing quarter-phase circuit replaces, reliability after tested
The highest, it is ensured that the stability of system, improve lifetime of system.
(2) power management chip in the present invention possesses soft start function, improves system job stability, reduces and is
System switching loss.
Accompanying drawing explanation
Fig. 1 is conventionally employed numerically controlled biphase Buck electrical block diagram.
Fig. 2 is the present invention biphase Buck circuit power managing chip and the structural representation of peripheral circuit thereof.
Fig. 3 is the electrical block diagram of current balance module of the present invention.
Fig. 4 is the electrical block diagram of comparator module of the present invention.
Fig. 5 is the digital channel using current equalization circuit of the present invention work wave schematic diagram under DCM.
Detailed description of the invention
In order to more specifically describe the present invention, below in conjunction with the accompanying drawings and detailed description of the invention is to technical scheme
It is described in detail.
As in figure 2 it is shown, power management chip of the present invention is for big electric current Buck circuit occasion, it is provided with power supply input pin
(Vin), output voltage foot (VO), grounding leg (GND) and two switch SW foot (SW1And SW2).Chip internal has reference circuit mould
Block, comparator module, Voltage loop module, clock generation module, control logical AND soft-start module, constant on-time produce mould
Block, ripple compensation module, current sample module, current balance module.Drive switching tube Mp in module and four sheets1、Mp2With
Mn1、Mn2。
Power supply input pin (Vin), modules in access chip, the power supply electricity that in generation chip, modules normally works
Position.Grounding leg (GND), modules in access chip, the ground reference that in generation chip, modules normally works.Switch
SW foot (SW1And SW2), it is connected on power switch pipe Mp respectively1、Mn1Between and Mp2、Mn2Between, level between sampled power switching tube,
Simultaneously by level input ripple compensation module between switching tube.Output voltage foot (VO), also ripple compensation module in access chip.Stricture of vagina
Ripple compensating module produces and compensates ripple (RAMP1And RAMP2) respectively input two branch road comparators a negative terminal, the most also produce
Raw voltage feedback signal (FB) is input to Voltage loop negative terminal.It is input to the benchmark that circuit module produces on the basis of Voltage loop anode
Level (VBG), Voltage loop produces burning voltage (VCON) it is input to an anode of two branch road comparator module, respectively with two benefits
Repay ripple (RAMP1And RAMP2) compare.Current balance module receives the current value that two branch current sampling modules samplings obtain
(VCS1And VCS2), produce current balance voltage (VCB1And VCB2), a pair input of two the branch road comparators that are added to respectively is just
Negative terminal.Comparator module output accesses constant on-time generation module, is simultaneously entered going back of constant on-time generation module
Having the clock signal (CLK) that clock generation circuit produces, constant on-time generation module produces fixing ON time signal,
It is input to control logical AND soft-start module.It is separately input to two control logical AND soft-start modules simultaneously and also has switching signal
(SW1And SW2), control logical AND soft-start module and produce output signal (D1And D2), it is separately input to the driving mould of two branch roads
Block, produces and drives signal to drive switching tube Mp in two sheets in each branch road1、Mn1And Mp2、Mn2。
As typical case's application of this chip, as in figure 2 it is shown, external power supply voltage is via power supply input pin (Vin), access core
Modules in sheet, the power supply potential that in generation chip, modules normally works.External ground current potential via grounding leg (GND),
Modules in access chip, the ground reference that in generation chip, modules normally works.
Two switches SW foot (SW1 and SW2), are connected on respectively between power switch pipe Mp1, Mn1 and between Mp2, Mn2, adopt
Level between sample power switch pipe, simultaneously by level input ripple compensation module between switching tube and control logical AND soft-start module.
Output voltage foot (VO) also ripple compensation module in access chip, ripple compensation module includes ripple compensation electricity
Road, produces two and compensates ripple (RAMP1And RAMP2) it is respectively connected to a negative terminal of two comparator module, also produce electricity simultaneously
Pressure feedback signal (FB) is input to the negative terminal of Voltage loop module;Wherein FB is proportional to output voltage VODC component, RAMP1's
AC compounent is proportional to the AC compounent of inductance L1 electric current, RAMP2AC ripple be proportional to the AC compounent of inductance L2 electric current,
RAMP1And RAMP2DC component be equal to reference voltage FB.
Reference circuit module is according to input voltage VinFor producing reference level (V during high levelBG) it is input to Voltage loop module
Anode, Voltage loop module defeated generation burning voltage (VCON) it is input to an anode of two comparator module, respectively with compensation
Ripple (RAMP1And RAMP2) compare.
Current sample module flows through power switch pipe Mp by the sampling of current mirror Cycle by Cycle1、Mp2Current peak, produce
It is positively correlated with the current sample voltage VCS of current peak1、VCS2。
Current balance module receives the current sample voltage (VCS that two branch current sampling modules samplings obtain1With
VCS2), produce current balance voltage (VCB1And VCB2), a pair input positive and negative terminal of two the branch road comparators that are added to respectively.As
Shown in Fig. 3, in present embodiment, current balance modular circuit includes two two input comparator GM1And GM2, input is to pipe GMSWith
GMF, switch S1~S5, resistance R11、R12、R21And R22, electric capacity C, eight current sources, wherein five be respectively 1uA, 2uA, 4uA,
0.5uA and 4uA, and three NMOS;Wherein, VCS1And VCS2Current sampling data as biphase branch road all exports GM1With
GMFInput, GM1Outfan and electric capacity C and GM2Inverting input be connected, GM2Positive input connect current source
Simultaneously through NMOS ground connection, the grid leak end short circuit of NMOS, switch S5Connect GM2Two inputs, switch S1~S4Connect respectively
The current source of 1uA, 2uA, 4uA and 0.5uA, these four branch circuit parallel connections, end points in parallel connects GM2Positive output end and GMSInput
End is simultaneously through resistance R11Ground connection, GMSAnother input connect GM2Negative output terminal and the current source of 4uA simultaneously through resistance R12
Ground connection, GMSThe drain terminal of two PMOS respectively through a NMOS ground connection, the grid end of the two NMOS is connected, resistance R21、R22Respectively
By GMSThe drain terminal of two PMOS is connected with NMOS grid end, GMSIn two PMOS drain terminals and GMFIn two PMOS drain terminal respectively
It is connected, junction point extracted current signal VCB respectively1、VCB2。
Comparator module (uses four input comparators, differential difference amplifier), its two couple
Forward and reverse input, is for a pair current balance voltage VCB1、VCB2, a pair for compensating ripple RAMP1(or RAMP2) and stable electricity
Pressure VCON, thus produce comparison signal ON1、ON2;As shown in Figure 4, in present embodiment comparator module to employ two groups of inputs right
Pipe GM1And GM2, one group of (GM1) give compensation ripple signal RAMP1(or RAMP2) and burning voltage VCONUse, another group (GM2) give
Current balance voltage signal VCB1And VCB2Using, structure uses common dual-stage amplifier, wherein GM1/GM2=N/1 (N > 1),
Be equivalent to pipe GM2Input signal convert GM1Input after, the most original N/mono-.
Comparator module output accesses constant on-time generation module, is simultaneously entered constant on-time generation module
Also having the clock signal (CLK) that clock generation circuit produces, constant on-time generation module produces fixing ON time letter
Number, it is input to control logical AND soft-start module.It is separately input to two simultaneously and controls logical AND soft-start module also switch
Signal (SW1And SW2),
Control logical AND soft-start module and produce output signal (D1And D2), it is input to drive module, produces and drive signal to drive
Switching tube Mp1, Mn1 and Mp2, Mn2 in two sheets in dynamic each branch road, it is achieved the conversion of electric energy and transmission.Comparison signal ON1
Or ON2During for low level, the ON time signal that the constant on-time generation module of that phase corresponding generates is just high level
Triggering and the pulsewidths constant of this high level, other times are low level.
The current balance module of present embodiment includes fast passage and slow channel, as shown in Figure 3.Fast on the right side of Fig. 3
In passage, the current sampling data (VCS of two branch roads1And VCS2) through inputting pipe GMFWith resistance R21、R22Change into difference ripple,
It is directly superimposed to the input of comparator.Slow channel on the left of Fig. 3 is divided into again analog channel and digital channel.Wherein, simulation is logical
Road is by current sampling data (VCS1And VCS2) through comparator GM1Obtain current differential information, then through electric capacity C low-pass filtering, then
Through comparator GM2With resistance R11、R12Transformation of scale, after through input to pipe GMSWith fast passage is together in parallel, at resistance
R21、R22Upper generation difference ripple;Digital channel is then the electric current of regulation current array, at resistance R21、R22Upper generation difference stricture of vagina
Ripple.The ripple that fast passage and slow channel produce is at resistance R21、R22Upper superposition, obtains final difference ripple VCB1And VCB2, defeated
Go out the input to comparator.Switch S4It it is the centre in order to the asymmetric offset voltage of comparator being set in a gear
Value.When the asymmetric offset voltage of comparator is zero, two branch roads can be the most open-minded, the most only opens wherein one in the next cycle
Road.It addition, switch S5A period of time can be opened, to GM when flow equalizing circuit is opened1~the output of C low pass filter provides initial value.
For the slow channel in current balance module, wherein digital channel is equivalent to coarse adjustment, and analog channel is equivalent to fine tuning.
If binary system has been carried out phase sequence alternately, then digital channel will not work, and analog channel then can gradually subtract
The impact of few offset voltage.Because binary system is in when being continuously turned on state, typically also achieves phase sequence and stagger.At this with disconnected
Be introduced as a example by continuous duty, groundwork sequential as shown in Figure 5:
(1) declining when output, first is mutually open-minded, and enumerator receives a rising pulses, and output Q [2:0] adds 1, flows through
R11Electric current increase, VCB1Reduce and VCB2Increase, be equivalent to superposition on the comparator of the first phase and bear offset voltage, second
Going up the positive offset voltage of superposition mutually, so that the first phase is more difficult to open and the second phase is easier to open-minded;
(2) if output voltage declines again, second meets open-minded, and enumerator receives a falling pulse, output Q [2:
0] subtract 1, flow through R11Electric current reduce, VCB1Increase and VCB2Reduce, be equivalent to superposition on the comparator of the first phase and just lack of proper care
Voltage, in the second phase, offset voltage is born in superposition, so that the first phase is easier to open and the second phase is more difficult to open-minded;
(3) when output voltage declines again, take turns to first mutually open-minded, then be the second phase, circulate successively, it is achieved thereby that
Phase sequence staggers.Finally, Q [2:0] saltus step in a gear of digital channel, i.e. Q0 constantly jumps to 1 from 0, then jumps to 0 from 1.
Wherein the offset voltage waveform in Fig. 5 is switch S4Effect the asymmetric offset voltage of comparator is set
Intermediate value at a gear, it is to avoid when the asymmetric offset voltage of comparator is zero, two branch roads can be the most open-minded, and next
Cycle the most only opens a wherein road.So the present invention proposes corresponding half value amendment circuit, see the lower left corner of Fig. 3, if continuously
Two branch roads, eight cycles simultaneously detected, then the carry flag of enumerator can jump 1, switchs S4Open-minded, by two comparators
Asymmetric offset voltage be set to the intermediate value of a gear.Can be achieved with it follows that the offset voltage of digital channel adjusts
Normal positive and negative saltus step.If the initial asymmetric offset voltage of two comparators is at intermediate value, it is possible to realize two
Road phase sequence staggers, then switch S4It is still kept off.
The above-mentioned description to embodiment is to be understood that for ease of those skilled in the art and apply the present invention.
Above-described embodiment obviously easily can be made various amendment by person skilled in the art, and described herein typically
Principle is applied in other embodiments without through performing creative labour.Therefore, the invention is not restricted to above-described embodiment, ability
Field technique personnel should be in protection scope of the present invention according to the announcement of the present invention, the improvement made for the present invention and amendment
Within.
Claims (10)
1. the power management chip containing flow equalizing function biphase Buck circuit based on COT control, it is characterised in that including:
Article two, switching branches, described switching branches comprises power switch pipe Mp and Mn;Wherein, the source of power switch pipe Mp connects electricity
The input voltage V on roadIN, the drain terminal of a power switch pipe Mp phase inductance corresponding with the drain terminal of power switch pipe Mn and circuit
One end is connected, and the source ground connection of power switch pipe Mn, in circuit, the other end of two phase inductances is parallel with one another;
Reference circuit module, it is at input voltage VINFor during high level in sheet provide reference voltage VBG;
Ripple compensation module, the output voltage V of its sample circuitOAnd two junction point voltage of phase inductance and corresponding switching branches,
Thus produce reference voltage FB and two-way compensation voltage RAMP1And RAMP2;
Voltage loop module, it is according to reference voltage FB and reference voltage VBGCompare, produce burning voltage VCON;
Current sample module, it is by flowing through the electric current of power switch pipe Mp in current mirror Cycle by Cycle two switching branches of sampling
Peak value, corresponding generation is positively correlated with the current sample voltage VCS of current peak1And VCS2;
Current balance module, it is according to current sample voltage VCS1And VCS2Compare, produce the current balance electricity of a pair difference
Pressure VCB1And VCB2;
Two comparator module, described comparator module has two and aligns inverting input, and its outfan produces comparison signal;Its
In a pair positive inverting input of a comparator module meet burning voltage V respectivelyCONWith compensation voltage RAMP1, another aligns anti-phase
Input meets current balance voltage VCB respectively1And VCB2;The positive inverting input of a pair of another comparator module connects stable respectively
Voltage VCONWith compensation voltage RAMP2, another aligns inverting input and meets current balance voltage VCB respectively2And VCB1;
Two constant on-time generation modules, described constant on-time generation module is according to the comparison of corresponding comparator module
Signal generates ON time signal;
Two control logical AND soft-start module, and described control logical AND soft-start module produces according to corresponding constant on-time
The ON time signal of module generates driving signal by controlling logic;
Two drive module, and described driving module makes the corresponding driving signal power controlling logical AND soft-start module use after amplifying
To drive power switch pipe Mp and Mn in corresponding switching branches to carry out on-off control.
Power management chip the most according to claim 1, it is characterised in that: described reference voltage FB is proportional to output electricity
Pressure VODC component, compensate voltage RAMP1AC compounent be proportional to the AC compounent of a wherein phase inductance electric current, compensate electricity
Pressure RAMP2AC compounent be proportional to the AC compounent of another phase inductance electric current, compensate voltage RAMP1And RAMP2DC component
It is equal to reference voltage FB.
Power management chip the most according to claim 1, it is characterised in that: described constant on-time generation module when than
When relatively signal is low level, generating the pulsewidths constant that ON time signal is just high level and this high level, other times generate
ON time signal is low level.
Power management chip the most according to claim 1, it is characterised in that: described control logical AND soft-start module is when leading
When logical time signal is high level, generating and driving signal is low level, when closed between signal when being low level, generate and drive letter
Number it is high level.
Power management chip the most according to claim 1, it is characterised in that: described driving module is low electricity when driving signal
At ordinary times so that it is in the corresponding switching branches driven, power switch pipe Mp is open-minded, and power switch pipe Mn turns off;It is high when driving signal
During level so that it is in the corresponding switching branches driven, power switch pipe Mn is open-minded, and power switch pipe Mp turns off.
Power management chip the most according to claim 1, it is characterised in that: described current balance module includes single output
Trsanscondutance amplifier GM1, the trsanscondutance amplifier GM of dual output differential type2, electric capacity C or door, eight current source I1~I8, five open
Close S1~S5, four PMOS PM1~PM4, resistance R11~R12And R21~R22, three NMOS tube NM1~NM3, two rest-set flip-flops
R1~R2, two phase inverter INV1~INV2, two chronotron Delay1~Delay2, three digit counter CA of dual input1And list
The enumerator CA of input2;Wherein: trsanscondutance amplifier GM1Normal phase input end and inverting input connect current sample voltage respectively
VCS1And VCS2, trsanscondutance amplifier GM1The top crown of outfan and electric capacity C, switch S5One end and trsanscondutance amplifier GM2's
Inverting input is connected, the bottom crown ground connection of electric capacity C, eight current source I1~I8Input all meet supply voltage, current source I6
Outfan and trsanscondutance amplifier GM2Normal phase input end, switch S5The other end and NMOS tube NM1Drain and gate phase
Even, NMOS tube NM1Source ground, current source I1~I4Outfan respectively with switch S1~S4One end be connected, switch S1~
S4The other end and trsanscondutance amplifier GM2Positive output end, resistance R11One end and PMOS PM1Grid be connected, resistance
R11Other end ground connection, current source I5Outfan and trsanscondutance amplifier GM2Reversed-phase output, resistance R12One end and
PMOS PM2Grid be connected, resistance R12Other end ground connection, current source I7Outfan and PMOS PM1Source electrode and
PMOS PM2Source electrode be connected, current source I8Outfan and PMOS PM3Source electrode and PMOS PM4Source electrode be connected,
PMOS PM3Grid and PMOS PM4Grid meet current sample voltage VCS respectively1And VCS2, PMOS PM1Drain electrode with
PMOS PM3Drain electrode, resistance R21One end and NMOS tube NM2Drain electrode be connected and produce current balance voltage VCB1, PMOS
Pipe PM2Drain electrode and PMOS PM4Drain electrode, resistance R22One end and NMOS tube NM3Drain electrode be connected and produce current balance
Voltage VCB2, resistance R21The other end and resistance R22The other end, NMOS tube NM2Grid and NMOS tube NM3Grid phase
Even, NMOS tube NM2Source electrode and NMOS tube NM3Source ground;Phase inverter INV1And INV2Input connect two controls respectively
The two-way that logical AND soft-start module generates drives signal, phase inverter INV1Outfan and chronotron Delay1Input with
And rest-set flip-flop R1R end, phase inverter INV2Outfan and chronotron Delay2Input and rest-set flip-flop R2R end,
Chronotron Delay1Outfan and rest-set flip-flop R1S end be connected, chronotron Delay2Outfan and rest-set flip-flop R2S
End is connected, rest-set flip-flop R1Outfan and three digit counter CA1First input end and or door first input end be connected,
Rest-set flip-flop R2Outfan and three digit counter CA1The second input and or door the second input be connected, three countings
Device CA1Three outfans respectively switch S1~S3Switch controlling signal, or the outfan of door and enumerator CA are provided2Defeated
Enter end to be connected, enumerator CA2Outfan for switch S4Switch controlling signal is provided.
Power management chip the most according to claim 6, it is characterised in that: described current source I1~I5Output electric current big
Little respectively 1uA, 2uA, 4uA, 0.5uA and 4uA.
Power management chip the most according to claim 6, it is characterised in that: described three digit counter CA1Sum counter CA2
Input be rising edge trigger, wherein three digit counter CA1First input end often receive a rising edge and add 1, second
Input often receives a rising edge and subtracts 1, three digit counter CA1Count value bound be respectively 8 and 0;Enumerator CA2Meter
Numerical value persistently exports high level, otherwise output low level after being added to 8.
Power management chip the most according to claim 1, it is characterised in that: described comparator module includes a biased electrical
Liu Yuan, 12 PMOS P1~P12With seven NMOS tube N1~N7;Wherein: PMOS P1~P8Source electrode all connect supply voltage,
PMOS P1Grid and PMOS P2Grid, PMOS P1Drain electrode, PMOS P3Grid and bias current sources defeated
Enter end to be connected, the output head grounding of bias current sources, PMOS P2Drain electrode and PMOS P9Source electrode and PMOS P10's
Source electrode is connected, PMOS P3Drain electrode and PMOS P11Source electrode and PMOS P12Source electrode be connected, PMOS P4Grid
With PMOS P5Grid, PMOS P4Drain electrode and NMOS tube N3Drain electrode be connected, PMOS P5Drain electrode and PMOS P6
Grid and NMOS tube N4Drain electrode be connected, PMOS P6Drain electrode and PMOS P7Grid, NMOS tube N6Grid and
NMOS tube N5Drain electrode be connected, PMOS P7Drain electrode and PMOS P8Grid, NMOS tube N7Grid and NMOS tube N6's
Drain electrode is connected, PMOS P8Drain electrode and NMOS tube N7Drain electrode be connected and produce comparison signal, PMOS P10Grid and
PMOS P9Grid correspond to a pair positive inverting input of comparator module, PMOS P respectively12Grid and PMOS P11
Another of grid corresponding comparator module respectively align inverting input, PMOS P9Drain electrode and NMOS tube N1Grid,
NMOS tube N4Grid, PMOS P11Drain electrode and NMOS tube N1Drain electrode be connected, PMOS P10Drain electrode and NMOS tube N2
Grid, NMOS tube N3Grid, NMOS tube N5Grid, PMOS P12Drain electrode and NMOS tube N2Drain electrode be connected, NMOS
Pipe N1~N7Source grounding.
Power management chip the most according to claim 9, it is characterised in that: described PMOS P10Breadth length ratio and PMOS
Pipe P12The ratio of breadth length ratio and PMOS P9Breadth length ratio and PMOS P11The ratio of breadth length ratio to be 1:N, N be more than 1
Real number.
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CN115037125B (en) * | 2022-06-22 | 2024-04-26 | 无锡格兰德微电子科技有限公司 | High-reliability wide-voltage-range Buck controller circuit |
CN114944748A (en) * | 2022-07-20 | 2022-08-26 | 中科(深圳)无线半导体有限公司 | Constant frequency control circuit and method for constant on-time control mode converter |
CN115242059A (en) * | 2022-09-21 | 2022-10-25 | 深圳英集芯科技股份有限公司 | Multi-power-supply parallel current output device and method and electronic equipment |
CN115242059B (en) * | 2022-09-21 | 2023-02-28 | 深圳英集芯科技股份有限公司 | Multi-power-supply parallel current output device and method and electronic equipment |
WO2024093595A1 (en) * | 2022-11-03 | 2024-05-10 | 东南大学 | Multiphase high-precision current-sharing control method applied to constant on-time control |
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