CN105871535B - A kind of width-adjustable hyperchaos signal source - Google Patents
A kind of width-adjustable hyperchaos signal source Download PDFInfo
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- CN105871535B CN105871535B CN201610398370.4A CN201610398370A CN105871535B CN 105871535 B CN105871535 B CN 105871535B CN 201610398370 A CN201610398370 A CN 201610398370A CN 105871535 B CN105871535 B CN 105871535B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/001—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols using chaotic signals
Abstract
The invention discloses a kind of width-adjustable hyperchaos signal sources, it is using the integral summing circuit of four branches as frame, nonlinear feedback is realized by a simulation gated circuit and a signed magnitude arithmetic(al) unit, in conjunction with four linear feedback items and a direct current input control item, export the controllable Hyperchaotic Attractors of more complicated amplitude size, four road hyperchaos signals are obtained, by the direct current input control in the third dimension, realize the amplitude adjusted to four dimension ultra-chaos signal of system output.Hyperchaos signal source of the present invention can adjust the signal strength of four branch road hyperchaos signals by potentiometer or variable resistance or supplying DC voltage source, the adjustment to multiple feedback terms for avoiding that change of scale again brings and hardware amplifier.The difficulty realized and debugged present invention reduces circuit, provides convenience for hyperchaos signal source applied to Electronics and Information Engineering.
Description
Technical field
The invention belongs to electronics, communication and information engineering technical field, more particularly to a kind of width-adjustable hyperchaos signal source.
Background technology
Chaos or hyperchaos signal are as a kind of broadband class random signal, in the engineerings skill such as instrument and meter, communication, radar
Art field has broad application prospects.The signal applied in engineering is typically passed through the amplification either pretreatments such as decaying or signal
Conditioning link enters the core layer of processing.The pretreatment of signal or modulate circuit will match just with handled signal bandwidth
It can meet the requirements, however the broadband character of chaotic signal makes corresponding Signal Pretreatment or signal condition become difficult, and appoints
What extra circuit element or spare system is also easy priming signal distortion and deformation.
The patent of invention of hyperchaos signal source is more the disturbance rejection control design method (application based on hyperchaos at present
Number：CN201510829084.4), quantum image encryption method (application number：CN201510800870.1), hyperchaos are based on to encrypt
The cross-domain anonymous Identity authentication method (application number of spatial network：CN201510621310.X), it is a kind of based on memristor containing the side y
The adaptive synchronicity method and circuit (application number of Chen hyperchaotic systems：CN201510571092.3) etc., and about chaos
The patent of invention of signal source, then be related to circuit design, and Patent [grant number ZL200910183379.3] proposes that one kind can
Switch three rank perseverance Lyapunov exponential spectrum chaos circuits, which realizes nonlinear interaction by absolute value term, pass through constant control
Item (corresponding to direct current power source voltage) processed realizes that the amplitude adjusted of chaotic signal, the Lyapunov that this adjusting does not change system refer to
Number spectrum.Four wing chaotic signal source circuits of patent [grant number ZL201210395656.9] invention, are realized using cross-product term
It is non-linear, four complicated wing chaos attractors are exported, and other are realized by the adjusting of the feedback intensity to cross-product term
The amplitude of bidimensional chaotic signal regulates and controls, and above etc. the amplitude both for chaotic signal regulates and controls, and about hyperchaos signal
Amplitude regulates and controls problem, the solution not yet proposed at present.In addition, being investigated from the angle of system equation, many chaos letters
Number source is all derived from the dynamic system with certain symmetry, and such system causes under many parameters with symmetry breaking
Multistable feature, just the design to reliable chaos signal source and corresponding amplitude modulation are put forward higher requirements for this.Institute of the present invention
The hyperchaotic circuit synthesis of proposition is obtained symmetrical and complicated hyperchaos are strange using absolute value nonlinear terms and simulation gating unit
Different attractor, the attractor have Global Attractiveness under set parameter, therefore in the size for changing DC power supply supply voltage
Or the resistance of branch where changing can realize the free amplitude control of system four-dimension output signal.Present invention reduces hyperchaos
The circuit design difficulty of signal source, overcoming that other hyperchaotic circuits are high to equipment requirement, equipment is unstable, complete machine is huge etc. lacks
Point；The amplitude regulation and control of signal source not will produce new state, because the Hyperchaotic Attractors that system generates have Global Attractiveness,
To should not resetting special consideration should be given to initial value, greatly reduce the difficulty of circuit debugging.
The design of current many hyperchaotic circuits is to be based on Lorenz systems, by increasing one-dimensional and adding new feedback
, realize hyperchaos, by this method realize hyperchaotic system usually contain nine or more；Other hyperchaotic circuits
It is more than the four-dimension even to introduce more complicated non-linear feedback function or dimension, and entire circuit structure is complicated, corresponding super mixed
The amplitude regulation and control of ignorant signal also will be by means of the joint debugging of multiple resistance, and multiple feedback term coefficients to change simultaneously internal system are come
It realizes.Therefore poor reliability, the debugging difficulty of circuit output hyperchaos signal are big, it is difficult to meet requirement of engineering.The present invention proposes
One hyperchaotic system, which includes only seven, using a simulation gating unit and a signed magnitude arithmetic(al) unit as base
Eigen is fed back in conjunction with four inner linears of internal system, real using DC control item or the variable resistance of respective branch
The scale regulation and control of existing Hyperchaotic Attractors.The DC energy of external world's input is transformed into hyperchaos signal communication energy, adapts to each
The signal strength regulation and control of application scenario need.
Invention content
Goal of the invention：The present invention provides a kind of width-adjustable hyperchaos signal source, to solve the problems of the prior art.
Technical solution：To achieve the above object, the technical solution adopted by the present invention is：
A kind of width-adjustable hyperchaos signal source, including four branches, wherein：First, second and third branch includes two defeated
Enter end, two input terminals of first branch connect the output end and Article 2 of first branch summation integral arithmetic unit U1 respectively
The output end of branch；Two input terminals of Article 2 branch connect the output end and a simulation storbing gate electricity of Article 4 branch respectively
The input terminal of the output end on road, the simulation gated circuit is Article 3 branch output signal, and its gate control signal comes
From the output end of first branch summation integral arithmetic unit U1；The anode of one input termination DC power supply of Article 3 branch
Property, the signal of another input terminal of Article 3 branch comes from the output signal of first branch；Article 4 branch includes one
A input terminal connects the inversion signal of the output signal of Article 2 branch.
Further, first branch includes summation integral arithmetic unit U1, negative absolute value realization unit U2, resistance
R1, R2, R3 and R4, diode D1 and capacitance C1, wherein the output end of first branch summation integral arithmetic unit U1 is through electricity
Resistance R1 connects the inverting input of summation integral arithmetic unit U1, and Article 2 branch output end signal connects summation integral fortune through resistance R2
The inverting input of unit U1 is calculated, the inverting input of summation integral arithmetic unit U1 is connected with one end of capacitance C1, capacitance C1
The other end and the output end of summation integral arithmetic unit U1 connect the inverting input that negative absolute value realizes unit U2 through resistance R3,
Negative absolute value realizes the cathode of the output terminating diode D1 of unit U2, bears inverting input and electricity that absolute value realizes unit U2
The one end for hindering R4 is connected, and the anode of the other end of resistance R4 and diode D1 connect the output end of first branch.
Further, Article 2 branch includes simulation gated circuit, summation integral arithmetic unit U3, reverse phase amplifying unit
U4, resistance R5, R6, R7 and R8 and capacitance C2, wherein the output end of Article 4 branch connects summation integral operation by resistance R5
The inverting input of unit U3, the output end for simulating gated circuit connect the reverse phase of summation integral arithmetic unit U3 by resistance R6
The inverting input of input terminal, summation integral arithmetic unit U3 is connected with one end of capacitance C2, the other end of capacitance C2 and summation
Inverting input of the output end of integral arithmetic unit U3 through the reversed phase amplifying unit U4 of resistance R7, reverse phase amplifying unit U4's is anti-
Phase input terminal is connected with one end of resistance R8, and the output of the other end of resistance R8 and reverse phase amplifying unit U4 terminate Article 2
The output end of branch.
Further, the Article 3 branch include DC power supply Vcc, summation integral arithmetic unit U5, variable resistance or
Potentiometer R9, resistance R10 and capacitance C3, wherein the anode of DC power supply Vcc connects summation by variable resistance or potentiometer R9
The inverting input of integral arithmetic unit U5, first branch output end connect summation integral arithmetic unit U5's by resistance R10
The inverting input of inverting input, summation integral arithmetic unit U5 is connected with one end of capacitance C3, another termination of capacitance C3
The output end of output end, that is, Article 3 branch of integral arithmetic unit of summing U5.
Further, the Article 4 branch include summation integral arithmetic unit U6, reverse phase amplifying unit U7, resistance R11,
R12 and R13 and capacitance C4, wherein the inversion signal of Article 2 branch output signal connects summation integral operation by resistance R11
The inverting input of the inverting input of unit U6, summation integral arithmetic unit U6 is connected with one end of capacitance C4, capacitance C4's
Inverting input of the output end through the reversed phase amplifying unit U7 of resistance R12 of the other end and summation integral arithmetic unit U6, reverse phase
The inverting input of amplifying unit U7 is connected with one end of resistance R13, and the other end of resistance R13 and reverse phase amplifying unit U7
Output termination Article 4 branch output end.
Further, the width-adjustable hyperchaos signal source, exporting the amplitude control of all hyperchaos signals can lead to
It crosses the size of the DC power supply supply voltage Vcc or the adjusting of variable resistance or potentiometer R9 that is attached thereto is realized.
Further, the simulation gated circuit can be jointly controlled by amplifier and diode realization, can also pass through fortune
It puts and is realized with multiplier to combine.
Further, the simulation gated circuit includes two operational amplifier Ua and Ub, two resistance Ra and Rb with
And a multiplier M, simulate the selected input signal s of gated circuit directly with an input terminal phase of its internal multiplier M
Connect, and its gate control signal c is then connected to another input terminal of internal multiplier M by two operational amplifiers Ua, Ub；Fortune
The inverting input for calculating amplifier Ua connects gate control signal c, and the output end of operational amplifier Ua is connected to the one of resistance Ra
End, the other end of resistance Ra is attached directly to the inverting input of operational amplifier Ub, and is attached directly to by another resistance Rb
The output end of operational amplifier Ub, the output end of multiplier M provide the choosing corresponding to simulation gated circuit selected input signal s
Messenger w.
Further, the output end of the Article 3 branch is connected to the signal end of simulation gated circuit, provides gating
Input signal, and the output end of first branch summation integral arithmetic unit U1 is connected to the control terminal of simulation gated circuit,
Gate control signal is provided.
Further, the in-phase input end of described summation integral arithmetic unit U1, U3, U5 and U6 are grounded, and bear absolute value
Realize that the in-phase input end ground connection of unit U2, the in-phase input end of reverse phase amplifying unit U4 and U7 are grounded, DC power supply Vcc's
Cathode is grounded.
Further, the in-phase input end of two operational amplifiers Ua, Ub of the simulation gated circuit are grounded.
Advantageous effect：The present invention is realized non-linear anti-using one group of simulation gated circuit and a signed magnitude arithmetic(al) unit
Feedback integrates summation operation circuit, the controllable hyperchaos signal of output amplitude size by four tunnels.Hyperchaos signal source of the present invention can
By potentiometer, either the signal of variable resistance or supplying DC voltage source adjusting four branch road hyperchaos signals of circuit is strong
Degree avoids again caused by change of scale to the adjustment of multiple feedback terms and the design of hardware amplifier.This method reduces
Circuit is realized and the difficulty of debugging, provides convenience applied to Electronics and Information Engineering for hyperchaos signal sources.
Description of the drawings
Projection of Fig. 1 width-adjustable hyperchaos phase rails in phase plane, wherein：It is x-y plane figure to scheme (a), and figure (b) is x-
Z-plane, (c) y-z plane figure, (d) x-u plan views；
The circuit diagram of Fig. 2 width-adjustable hyperchaos signal sources；
Gated circuit internal structure chart is simulated in Fig. 3 width-adjustable hyperchaos signal sources；
Fig. 4 width-adjustable hyperchaos signal sources export oscillograph phase rail figure (C1=C2=C3=C4=1nF, R1=R2=R5=R6
=R7=R8=R10=R12=R13=100k Ω, R3=R4=470 Ω, R9=900 Ω, R11=400 Ω, Vcc=9V), wherein：
It is x-y plane figure to scheme (a), and figure (b) is x-z-plane, (c) y-z plane figure, (d) x-u plan views.
Specific implementation mode
The present invention is further described with reference to embodiment.
A kind of width-adjustable hyperchaos signal source passes through a simulation gating using the integral summing circuit of four branches as frame
Gate circuit and a signed magnitude arithmetic(al) unit realize nonlinear feedback, in conjunction with four linear feedback items and a direct current input control
, the controllable Hyperchaotic Attractors of more complicated amplitude size are exported, four road hyperchaos signals are obtained, by the third dimension
Direct current input control realizes the amplitude adjusted to four dimension ultra-chaos signal of system output.
A kind of width-adjustable hyperchaos signal source, including four branches, wherein：First, second and third branch includes two defeated
Enter end, two input terminals of first branch connect the output end and Article 2 of first branch summation integral arithmetic unit U1 respectively
The output end of branch；Two input terminals of Article 2 branch connect the output end and a simulation storbing gate electricity of Article 4 branch respectively
The input terminal of the output end on road, the simulation gated circuit is Article 3 branch output signal, and its gate control signal comes
From the output end of first branch summation integral arithmetic unit U1；The anode of one input termination DC power supply of Article 3 branch
Property, the signal of another input terminal of Article 3 branch comes from the output signal of first branch；Article 4 branch includes one
A input terminal connects the inversion signal of the output signal of Article 2 branch.
First branch includes summation integral arithmetic unit U1, negative absolute value realization unit U2, resistance R1, R2, R3
With R4, diode D1 and capacitance C1, wherein the output end of first branch summation integral arithmetic unit U1 connects through resistance R1 to be asked
With the inverting input of integral arithmetic unit U1, Article 2 branch output end signal meets summation integral arithmetic unit U1 through resistance R2
Inverting input, the inverting input of summation integral arithmetic unit U1 is connected with one end of capacitance C1, the other end of capacitance C1
The inverting input that negative absolute value realizes unit U2 is connect through resistance R3 with the output end of summation integral arithmetic unit U1, bears absolute value
The cathode for realizing the output terminating diode D1 of unit U2 bears the inverting input and the one of resistance R4 that absolute value realizes unit U2
End is connected, and the anode of the other end of resistance R4 and diode D1 connect the output end of first branch.
Article 2 branch includes simulation gated circuit, summation integral arithmetic unit U3, reverse phase amplifying unit U4, resistance
R5, R6, R7 and R8 and capacitance C2, wherein the output end of Article 4 branch meets summation integral arithmetic unit U3 by resistance R5
Inverting input, simulate the anti-phase input that the output end of gated circuit meets summation integral arithmetic unit U3 by resistance R6
The inverting input at end, summation integral arithmetic unit U3 is connected with one end of capacitance C2, and the other end of capacitance C2 and summation integrate
Inverting input of the output end of arithmetic element U3 through the reversed phase amplifying unit U4 of resistance R7, the reverse phase of reverse phase amplifying unit U4 are defeated
Enter end with one end of resistance R8 to be connected, and the output of the other end of resistance R8 and reverse phase amplifying unit U4 terminate Article 2 branch
Output end.
The Article 3 branch include DC power supply Vcc, summation integral arithmetic unit U5, variable resistance or potentiometer R9,
Resistance R10 and capacitance C3, wherein the anode of DC power supply Vcc connects summation integral operation by variable resistance or potentiometer R9
The inverting input of unit U5, first branch output end connect the anti-phase input of summation integral arithmetic unit U5 by resistance R10
The inverting input at end, summation integral arithmetic unit U5 is connected with one end of capacitance C3, another termination summation integral of capacitance C3
The output end of the output end of arithmetic element U5, that is, Article 3 branch.
The Article 4 branch includes summation integral arithmetic unit U6, reverse phase amplifying unit U7, resistance R11, R12 and R13
And capacitance C4, wherein the inversion signal of Article 2 branch output signal connects summation integral arithmetic unit U6's by resistance R11
The inverting input of inverting input, summation integral arithmetic unit U6 is connected with one end of capacitance C4, the other end of capacitance C4 with
Inverting input of the output end through the reversed phase amplifying unit U7 of resistance R12 of integral arithmetic unit of summing U6, reverse phase amplifying unit
The inverting input of U7 is connected with one end of resistance R13, and the output end of the other end of resistance R13 and reverse phase amplifying unit U7
Connect the output end of Article 4 branch.
The width-adjustable hyperchaos signal source, the amplitude control for exporting all hyperchaos signals can be by the direct current
The adjusting of the size of power source supplying voltage Vcc or the variable resistance being attached thereto or potentiometer R9 is realized.
The simulation gated circuit can be jointly controlled by amplifier and diode realization, can also pass through amplifier and multiplier
It is realized to combine.
The simulation gated circuit includes two operational amplifier Ua and Ub, two resistance Ra and Rb and multiplication
Device M, the selected input signal s for simulating gated circuit are directly connected with an input terminal of its internal multiplier M, and it is gated
Control signal c is then connected to another input terminal of internal multiplier M by two operational amplifiers Ua, Ub；Operational amplifier Ua
Inverting input connect gate control signal c, the output end of operational amplifier Ua is connected to one end of resistance Ra, resistance Ra's
The other end is attached directly to the inverting input of operational amplifier Ub, and is attached directly to operational amplifier Ub by another resistance Rb
Output end, the output end of multiplier M provides the gating signal w corresponding to simulation gated circuit selected input signal s.
The output end of the Article 3 branch is connected to the signal end of simulation gated circuit, provides selected input signal,
And the output end of first branch summation integral arithmetic unit U1 is connected to the control terminal of simulation gated circuit, provides gating control
Signal processed.
The in-phase input end of described summation integral arithmetic unit U1, U3, U5 and U6 are grounded, and are born absolute value and are realized unit U2
In-phase input end ground connection, the in-phase input end of reverse phase amplifying unit U4 and U7 is grounded, the cathode ground connection of DC power supply Vcc.
The in-phase input end of two operational amplifiers Ua, Ub of the simulation gated circuit are grounded.
The kinetics equation and circuit structure of width-adjustable hyperchaos signal source, circuit of the invention can use following power
System equation is learned to describe,
The equation formally from the point of view of, including four simple first orders feedbacks, an absolute value term, one includes symbol letter
Several switch selecting units and a constant term.Work as a=1, when b=0.25, system output Hyperchaotic Attractors, such as Fig. 1 institutes
Show, the Weighted Liapunov Function corresponding to system is (0.064,0.033,0-1.098) at this time.This system can be by four branches
The closing reponse system of composition realizes, when integrating summation operation circuit using four tunnels come when realizing, circuit diagram as shown in Fig. 2,
Above-mentioned math equation is converted into more specifical circuit equation,
Circuit equation is consistent with system dynamics equation.Here, in system the coefficient of each feedback term by resistance and
The joint of capacitance is arranged to realize, and the signal amplitude control terminal corresponding to constant term a can pass through rheostat R9 or power supply
The adjustment of voltage vcc is realized.Display of the chaos phase rail that circuit generates on oscillograph is as shown in Figure 4.
First branch includes summation integral arithmetic unit U1, negative absolute value realization unit U2, resistance R1, resistance R2, electricity
Hinder R3, resistance R4, diode D1 and capacitance C1, wherein the output end of first branch summation integral arithmetic unit U1 is through electricity
Resistance R1 connects the inverting input of summation integral arithmetic unit U1, and Article 2 branch output end signal connects summation integral fortune through resistance R2
The inverting input of unit U1 is calculated, the in-phase input end of summation integral arithmetic unit U1 is grounded, summation integral arithmetic unit U1's
Inverting input is connected with one end of capacitance C1, and the other end of capacitance C1 and the output end of summation integral arithmetic unit U1 are through resistance
R3 connects the inverting input that negative absolute value realizes unit U2, bears the in-phase input end ground connection that absolute value realizes unit U2, bears absolute
Value realizes that the cathode of the output terminating diode D1 of unit U2, the anode of diode D1 connect the output end of first branch, bears exhausted
The inverting input of unit U2 is connected with one end of resistance R4 to be realized to value, and the other end of resistance R4 and negative absolute value are realized
The output end of output first branch of termination of unit U2.
Article 2 branch includes simulation gated circuit, summation integral arithmetic unit U3, reverse phase amplifying unit U4, resistance
R5, resistance R6, resistance R7, resistance R8 and capacitance C2, wherein the output end of Article 4 branch connects summation integral by resistance R5
The inverting input of arithmetic element U3, the output end for simulating gated circuit connect summation integral arithmetic unit U3's by resistance R6
Inverting input, the in-phase input end ground connection of summation integral arithmetic unit U3, the inverting input of summation integral arithmetic unit U3
It is connected with one end of capacitance C2, the other end of capacitance C2 is mutually put with the output end of summation integral arithmetic unit U3 through resistance R7 is reversed
The inverting input of big unit U4, the in-phase input end ground connection of reverse phase amplifying unit U4, the anti-phase input of reverse phase amplifying unit U4
End is connected with one end of resistance R8, and the output termination Article 2 branch of the other end of resistance R8 and reverse phase amplifying unit U4
Output end.
Article 3 branch includes DC power supply Vcc, summation integral arithmetic unit U5, variable resistance or potentiometer R9, resistance
R10 and capacitance C3, wherein the anode of DC power supply Vcc connects summation integral arithmetic unit by variable resistance or potentiometer R9
The inverting input of U5, the cathode ground connection of DC power supply Vcc, first branch output end connect summation integral fortune by resistance R10
The inverting input of unit U5 is calculated, the in-phase input end of summation integral arithmetic unit U5 is grounded, summation integral arithmetic unit U5's
Inverting input is connected with one end of capacitance C3, output end, that is, third of another termination summation integral arithmetic unit U5 of capacitance C3
The output end of branch.
Article 4 branch includes summation integral arithmetic unit U6, reverse phase amplifying unit U7, resistance R11, resistance R12, resistance
R13 and capacitance C4, wherein the inversion signal of Article 2 branch output signal connects summation integral arithmetic unit by resistance R11
The inverting input of U6, the in-phase input end ground connection of summation integral arithmetic unit U6, the reverse phase of summation integral arithmetic unit U6 are defeated
Enter end with one end of capacitance C4 to be connected, the other end of capacitance C4 and the output end of summation integral arithmetic unit U6 connect through resistance R12
The inverting input of reverse phase amplifying unit U7, the in-phase input end ground connection of reverse phase amplifying unit U7, reverse phase amplifying unit U7's is anti-
Phase input terminal is connected with one end of resistance R13, and the output termination the 4th of the other end of resistance R13 and reverse phase amplifying unit U7
The output end of branch.
Function shaped like z*sgn (x) is realized by simulation gated circuit.The circuit includes two input terminals, that is, is gated
Control signal end c and selected input signal end s；Gating signal w is exported, gating signal w is obtained from selected input signal s.If
Gate control signal c is positive polarity, and output is selected input signal s itself, i.e. w=s；If gate control signal c is negative
Polarity, output be selected input signal s inversion signal, i.e. w=-s；If gate control signal c is zero, output is also
Zero-signal, i.e. w=0.A kind of reference implementation method for simulating gated circuit is by two operational amplifiers Ua, Ub, two electricity
Ra, Rb and a multiplier M are hindered to realize.The selected input signal s of gated circuit is simulated directly with its internal multiplier M's
One input terminal is connected, and its gate control signal c is then connected to another input terminal of internal multiplier M by two stage amplifer.
The in-phase input end of two-stage calculation amplifier is grounded, and the inverting input of an operational amplifier Ua connects gate control signal c,
And its output end is connected to one end of a resistance Ra, the other end of resistance Ra is attached directly to the anti-phase input of another amplifier Ub
It holds, and is attached directly to the output end of amplifier Ub by another resistance Rb, the output end of multiplier M provides simulation gated circuit
The gating signal w of selected input signal s.
Amplitude control method, the realization of amplitude control：The amplitude control for exporting four dimension ultra-chaos signals can be by described straight
The size of stream power source supplying voltage Vcc or the adjusting of the variable resistance or potentiometer R9 that are attached thereto are realized.By equation (2)
It is found that when vcc increases, the amplitude of four dimension ultra-chaos signals of output also linearly increases in proportion therewith, and works as variable resistance
Or potentiometer R9 is when increasing, the amplitude non-linear reduction therewith of four dimension ultra-chaos signals of output, this can by a → k a, x → kx,
The invariance of y → ky, z → kz, u → ku, t → t, system expression formula (1) are proven.
The invention belongs to electronics, communication and information engineering class technologies, are related to a kind of setting for non-linear hyperchaos signal source
Meter is generated super mixed by two internal nonlinearity feedback branches, four inner linear feedback branches and an external dc input
Ignorant signal, signal amplitude can be regulated and controled by the size of external dc input voltage.The hyperchaos signal that the present invention realizes generates
Circuit, dependable performance can be widely applied to the fields such as signal detection, instrument and meter, radar and communications.
The above is only a preferred embodiment of the present invention, it should be pointed out that：For the ordinary skill people of the art
For member, various improvements and modifications may be made without departing from the principle of the present invention, these improvements and modifications are also answered
It is considered as protection scope of the present invention.
Claims (5)
1. a kind of width-adjustable hyperchaos signal source, it is characterised in that：Including four branches, wherein：First, second and third branch is equal
Including two input terminals, two input terminals of first branch connect the output of first branch summation integral arithmetic unit U1 respectively
The output end at end and Article 2 branch；Two input terminals of Article 2 branch connect the output end and a mould of Article 4 branch respectively
The input terminal of the output end of quasi- gated circuit, the simulation gated circuit is Article 3 branch output signal, and it is gated
Control output end of the signal from first branch summation integral arithmetic unit U1；One input termination direct current of Article 3 branch
The positive polarity of power supply, the signal of another input terminal of Article 3 branch come from the output signal of first branch；Article 4
Branch includes an input terminal, connects the inversion signal of the output signal of Article 2 branch；
First branch include summation integral arithmetic unit U1, negative absolute value realize unit U2, resistance R1, R2, R3 and R4,
Diode D1 and capacitance C1, wherein the output end of first branch summation integral arithmetic unit U1 connects summation product through resistance R1
The inverting input of arithmetic element U1, Article 2 branch output end signal is divided to connect the anti-of summation integral arithmetic unit U1 through resistance R2
The inverting input of phase input terminal, summation integral arithmetic unit U1 is connected with one end of capacitance C1, the other end of capacitance C1 with ask
The inverting input that negative absolute value realizes unit U2 is connect through resistance R3 with the output end of integral arithmetic unit U1, absolute value is born and realizes
The cathode of the output terminating diode D1 of unit U2 bears one end phase that absolute value realizes the inverting input and resistance R4 of unit U2
Even, and the anode of the other end of resistance R4 and diode D1 connect the output end of first branch；
Article 2 branch include simulation gated circuit, summation integral arithmetic unit U3, reverse phase amplifying unit U4, resistance R5, R6,
R7 and R8 and capacitance C2, wherein the output end of Article 4 branch connects the reverse phase of summation integral arithmetic unit U3 by resistance R5
Input terminal, the output end for simulating gated circuit connect the inverting input of summation integral arithmetic unit U3, summation by resistance R6
The inverting input of integral arithmetic unit U3 is connected with one end of capacitance C2, the other end and summation integral arithmetic unit of capacitance C2
Inverting input of the output end of U3 through the reversed phase amplifying unit U4 of resistance R7, inverting input and the electricity of reverse phase amplifying unit U4
The one end for hindering R8 is connected, and the output of the output termination Article 2 branch of the other end of resistance R8 and reverse phase amplifying unit U4
End；
The Article 3 branch includes DC power supply Vcc, summation integral arithmetic unit U5, variable resistance or potentiometer R9, resistance
R10 and capacitance C3, wherein the anode of DC power supply Vcc connects summation integral arithmetic unit by variable resistance or potentiometer R9
The inverting input of U5, first branch output end connect the inverting input of summation integral arithmetic unit U5 by resistance R10, ask
It is connected with the inverting input of integral arithmetic unit U5 with one end of capacitance C3, another termination summation integral operation list of capacitance C3
The output end of the output end of first U5, that is, Article 3 branch；
The Article 4 branch include summation integral arithmetic unit U6, reverse phase amplifying unit U7, resistance R11, R12 and R13 and
Capacitance C4, wherein the inversion signal of Article 2 branch output signal connects the reverse phase of summation integral arithmetic unit U6 by resistance R11
The inverting input of input terminal, summation integral arithmetic unit U6 is connected with one end of capacitance C4, the other end of capacitance C4 and summation
Inverting input of the output end of integral arithmetic unit U6 through the reversed phase amplifying unit U7 of resistance R12, reverse phase amplifying unit U7's
Inverting input is connected with one end of resistance R13, and the output termination the of the other end of resistance R13 and reverse phase amplifying unit U7
The output end of four branches.
2. width-adjustable hyperchaos signal source according to claim 1, it is characterised in that：The simulation gated circuit includes
Two operational amplifiers Ua and Ub, two resistance Ra and Rb and multiplier M, the selected input for simulating gated circuit are believed
Number s is directly connected with an input terminal of its internal multiplier M, and its gate control signal c then passes through two operational amplifiers
Ua, Ub are connected to another input terminal of internal multiplier M；The inverting input of operational amplifier Ua connects gate control signal c,
The output end of operational amplifier Ua is connected to one end of resistance Ra, and the other end of resistance Ra is attached directly to the anti-of operational amplifier Ub
Phase input terminal, and it is attached directly to by another resistance Rb the output end of operational amplifier Ub, the output end of multiplier M is to depanning
Gating signal w corresponding to quasi- gated circuit selected input signal s.
3. width-adjustable hyperchaos signal source according to claim 1, it is characterised in that：The output end of the Article 3 branch
It is connected to the signal end of simulation gated circuit, selected input signal is provided, and first branch summation integral arithmetic unit U1
Output end be connected to simulation gated circuit control terminal, gate control signal is provided.
4. width-adjustable hyperchaos signal source according to claim 1, it is characterised in that：The summation integral arithmetic unit
The in-phase input end of U1, U3, U5 and U6 are grounded, and bear the in-phase input end ground connection that absolute value realizes unit U2, reverse phase amplification
The in-phase input end of unit U4 and U7 are grounded, the cathode ground connection of DC power supply Vcc.
5. width-adjustable hyperchaos signal source according to claim 3, it is characterised in that：The two of the simulation gated circuit
The in-phase input end of a operational amplifier Ua, Ub are grounded.
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