CN105807889A - Instruction processing method, instruction processing device and terminal - Google Patents
Instruction processing method, instruction processing device and terminal Download PDFInfo
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- CN105807889A CN105807889A CN201610113147.0A CN201610113147A CN105807889A CN 105807889 A CN105807889 A CN 105807889A CN 201610113147 A CN201610113147 A CN 201610113147A CN 105807889 A CN105807889 A CN 105807889A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/329—Power saving characterised by the action undertaken by task scheduling
Abstract
The invention discloses an instruction processing method, an instruction processing device and a terminal. The instruction processing method comprises the following steps: determining the category of a to-be-processed instruction according to a calculated amount required for completing the to-be-processed instruction; distributing the to-be-processed instruction to a target CPU corresponding to the category to process; controlling the target CPU to enter a dormant state if the target CPU does not execute other instructions after the target CPU processes the to-be-processed instruction. Through the technical scheme, the CPU is controlled to be in the dormant state after the CPU processes the instruction, so that the power consumption of the terminal can be effectively reduced, the using time length of the terminal can be prolonged and then the user experience is enhanced.
Description
Technical field
The present invention relates to field of terminal technology, in particular to a kind of command processing method, a kind of instruction processing unit and a kind of terminal.
Background technology
At present, in the prior art scheme, it is possible to the CPU (CentralProcessingUnit, central processing unit) assigning them to correspondence according to the amount of calculation of task processes.But, 8 core CPU designs it are used to owing to prior art is more, i.e. 4 little core cpus (that is: the core cpu of low performance, low-power consumption) and 4 big core cpus (that is: the core cpu of high-performance, high power consumption), so no matter being when using little core cpu or using big core cpu, it is all that 4 core cpus run simultaneously.But practical situation is, no matter using little core cpu or using big core cpu, in most cases 1 or 2 core cpus are sufficient to, and now, and other 3 or 2 core cpus would be at idling conditions, so, can cause that the power consumption of terminal increases.
Therefore, how reducing the power consumption of terminal further, the flying power improving terminal becomes current problem demanding prompt solution.
Summary of the invention
The present invention is based on the problems referred to above, it is proposed that a kind of new technical scheme, controls CPU in a dormant state, it is possible to reduce the power consumption of terminal further after CPU has processed instruction, thus improving the flying power of terminal, and then promotes Consumer's Experience.
In view of this, a first aspect of the present invention proposes a kind of command processing method, including: according to the amount of calculation completed needed for pending instruction, it is determined that the classification of described pending instruction；The target CPU process corresponding with described classification is distributed in described pending instruction；After described target CPU has processed described pending instruction, if described target CPU is not carried out other instructions, then controls described target CPU and enter resting state.
In this technical scheme, by pending instruction being distributed to the target CPU process corresponding with the classification of this pending instruction, and when target CPU has processed pending instruction, control target CPU and enter resting state, so, it is possible to avoid CPU in correlation technique to be in the situation of idling conditions, thus being effectively reduced the power consumption of terminal, improve the use duration of terminal, and then promote Consumer's Experience.
In technique scheme, it is preferable that described basis completes the amount of calculation needed for pending instruction, it is determined that before the step of the classification of described pending instruction, including: the history obtaining described pending instruction processes parameter；Parameter is processed, it is determined that complete the amount of calculation needed for described pending instruction according to described history.
In this technical scheme, parameter is processed by obtaining the history of pending instruction, such that it is able to process parameter according to history to have determined the amount of calculation needed for pending instruction, wherein, it can be the CPU handling duration when last time processes this pending instruction or processing speed that history processes parameter, such as, if the handling duration that CPU processes any bar instruction is 3 seconds, amount of calculation needed for then having can determine that this any bar instruction is bigger, therefore, pass through technique scheme, it is possible to relatively accurately determined the amount of calculation needed for pending instruction.
In any of the above-described technical scheme, preferably, described described pending instruction is distributed to the target CPU corresponding with the described classification step carrying out processing, also include: if not getting described history to process parameter, then particular CPU is distributed in described pending instruction and process；Store process parameter during the described pending instruction of process of described particular CPU.
In this technical scheme, if not getting history to process parameter, then pending instruction can be distributed to particular CPU to process, and process reference record when particular CPU is processed pending instruction gets off, so, terminal just can determine the amount of calculation needed for this pending instruction according to this process parameter, so that when next time receives this pending instruction again, the classification of this pending instruction can be determined rapidly according to amount of calculation, then the target CPU process corresponding with its classification is distributed in this pending instruction.
In any of the above-described technical scheme, preferably, described described pending instruction is distributed to the CPU corresponding with the described classification step carrying out processing, also include: before processing described pending instruction, if described target CPU is in a dormant state, then wake described target CPU up, so that described target CPU is in running status.
In this technical scheme, by waking target CPU in a dormant state up, instructions to be performed to guarantee that target CPU can process in time.
In any of the above-described technical scheme, it is preferable that described described pending instruction is distributed to the target CPU corresponding with the described classification step carrying out processing, also include: according to the amount of calculation completed needed for described pending instruction, it is determined that the quantity of described target CPU.
In this technical scheme, it is possible to determine the quantity of target CPU according to the amount of calculation needed for completing pending instruction, when namely the amount of calculation needed for completing pending instruction is big especially, it may be necessary to multiple target CPU perform this pending instruction.
A second aspect of the present invention proposes a kind of instruction processing unit, comprises determining that unit, for according to completing the amount of calculation needed for pending instruction, it is determined that the classification of described pending instruction；Allocation units, for distributing to the target CPU process corresponding with described classification by described pending instruction；Control unit, for after described target CPU has processed described pending instruction, if described target CPU is not carried out other instructions, then controls described target CPU and enters resting state.
In this technical scheme, by pending instruction being distributed to the target CPU process corresponding with the classification of this pending instruction, and when target CPU has processed pending instruction, control target CPU and enter resting state, so, it is possible to avoid CPU in correlation technique to be in the situation of idling conditions, thus being effectively reduced the power consumption of terminal, improve the use duration of terminal, and then promote Consumer's Experience.
In technique scheme, it is preferable that described determine that unit includes: obtain subelement, the history for obtaining described pending instruction processes parameter；Described determine unit specifically for, according to described history process parameter, it is determined that perform the amount of calculation needed for described pending instruction.
In this technical scheme, parameter is processed by obtaining the history of pending instruction, such that it is able to process parameter according to history to have determined the amount of calculation needed for pending instruction, wherein, it can be the CPU handling duration when last time processes this pending instruction or processing speed that history processes parameter, such as, if the handling duration that CPU processes any bar instruction is 3 seconds, amount of calculation needed for then having can determine that this any bar instruction is bigger, therefore, pass through technique scheme, it is possible to relatively accurately determined the amount of calculation needed for pending instruction.
In any of the above-described technical scheme, it is preferable that described allocation units include: distribution subelement, if processing parameter for not getting described history, then particular CPU is distributed in described pending instruction and process；Storing sub-units, for storing process parameter during the described pending instruction of process of described particular CPU.
In this technical scheme, if not getting history to process parameter, then pending instruction can be distributed to particular CPU to process, and process reference record when particular CPU is processed pending instruction gets off, so, terminal just can determine the amount of calculation needed for this pending instruction according to this process parameter, so that when next time receives this pending instruction again, the classification of this pending instruction can be determined rapidly according to amount of calculation, then the target CPU process corresponding with its classification is distributed in this pending instruction.
In any of the above-described technical scheme, it is preferable that described allocation units include: wake subelement up, for, before processing described pending instruction, if described target CPU is in a dormant state, then waking described target CPU up, so that described target CPU is in running status.
In this technical scheme, by waking target CPU in a dormant state up, instructions to be performed to guarantee that target CPU can process in time.
In any of the above-described technical scheme, it is preferable that described allocation units comprise determining that subelement, for according to completing the amount of calculation needed for described pending instruction, it is determined that the quantity of described target CPU.
In this technical scheme, it is possible to determine the quantity of target CPU according to the amount of calculation needed for completing pending instruction, when namely the amount of calculation needed for completing pending instruction is big especially, it may be necessary to multiple target CPU perform this pending instruction.
A third aspect of the present invention proposes a kind of terminal, and including the instruction processing unit according to any one of technique scheme, therefore, this terminal has the technique effect identical with the instruction processing unit according to any one of technique scheme, does not repeat them here.
By technical scheme, after CPU has processed instruction, controlling CPU in a dormant state, it is possible to be effectively reduced the power consumption of terminal, thus improving the use duration of terminal, and then promoting Consumer's Experience.
Accompanying drawing explanation
Fig. 1 illustrates the schematic flow sheet of command processing method according to an embodiment of the invention；
Fig. 2 illustrates the structural representation of instruction processing unit according to an embodiment of the invention；
Fig. 3 illustrates the structural representation of terminal according to an embodiment of the invention；
Fig. 4 illustrates the schematic diagram of instruction according to an embodiment of the invention and the corresponding relation of CPU.
Detailed description of the invention
In order to the above-mentioned purpose of the present invention, feature and advantage can be more clearly understood that, below in conjunction with the drawings and specific embodiments, the present invention is further described in detail.It should be noted that when not conflicting, embodiments herein and the feature in embodiment can be mutually combined.
Elaborate a lot of detail in the following description so that fully understanding the present invention; but; the present invention can also adopt other to be different from other modes described here to implement, and therefore, protection scope of the present invention is by the restriction of following public specific embodiment.
Fig. 1 illustrates the schematic flow sheet of command processing method according to an embodiment of the invention.
As it is shown in figure 1, command processing method according to an embodiment of the invention, including:
Step 102, according to the amount of calculation completed needed for pending instruction, it is determined that the classification of described pending instruction；
Step 104, distributes to the target CPU process corresponding with described classification by described pending instruction；
Step 106, after described target CPU has processed described pending instruction, if described target CPU is not carried out other instructions, then controls described target CPU and enters resting state.
In this technical scheme, by pending instruction being distributed to the target CPU process corresponding with the classification of this pending instruction, and when target CPU has processed pending instruction, control target CPU and enter resting state, so, it is possible to avoid CPU in correlation technique to be in the situation of idling conditions, thus being effectively reduced the power consumption of terminal, improve the use duration of terminal, and then promote Consumer's Experience.
In technique scheme, it is preferable that before step 102, including: the history obtaining described pending instruction processes parameter；Parameter is processed, it is determined that complete the amount of calculation needed for described pending instruction according to described history.
In this technical scheme, parameter is processed by obtaining the history of pending instruction, such that it is able to process parameter according to history to have determined the amount of calculation needed for pending instruction, wherein, it can be the CPU handling duration when last time processes this pending instruction or processing speed that history processes parameter, such as, if the handling duration that CPU processes any bar instruction is 3 seconds, amount of calculation needed for then having can determine that this any bar instruction is bigger, therefore, pass through technique scheme, it is possible to relatively accurately determined the amount of calculation needed for pending instruction.
In any of the above-described technical scheme, it is preferable that step 104 includes: if not getting described history to process parameter, then particular CPU is distributed in described pending instruction and process；Store process parameter during the described pending instruction of process of described particular CPU.
In this technical scheme, if not getting history to process parameter, then pending instruction can be distributed to particular CPU to process, and process reference record when particular CPU is processed pending instruction gets off, so, terminal just can determine the amount of calculation needed for this pending instruction according to this process parameter, so that when next time receives this pending instruction again, the classification of this pending instruction can be determined rapidly according to amount of calculation, then the target CPU process corresponding with its classification is distributed in this pending instruction.
In any of the above-described technical scheme, it is preferable that step 104 includes: before processing described pending instruction, if described target CPU is in a dormant state, then wake described target CPU up, so that described target CPU is in running status.
In this technical scheme, by waking target CPU in a dormant state up, instructions to be performed to guarantee that target CPU can process in time.
In any of the above-described technical scheme, it is preferable that step 104 includes: according to the amount of calculation completed needed for described pending instruction, it is determined that the quantity of described target CPU.
In this technical scheme, it is possible to determine the quantity of target CPU according to the amount of calculation needed for completing pending instruction, when namely the amount of calculation needed for completing pending instruction is big especially, it may be necessary to multiple target CPU perform this pending instruction.
Fig. 2 illustrates the structural representation of instruction processing unit according to an embodiment of the invention.
As in figure 2 it is shown, instruction processing unit 200 according to an embodiment of the invention, comprise determining that unit 202, for according to completing the amount of calculation needed for pending instruction, it is determined that the classification of described pending instruction；Allocation units 204, for distributing to the target CPU process corresponding with described classification by described pending instruction；Control unit 206, for after described target CPU has processed described pending instruction, if described target CPU is not carried out other instructions, then controls described target CPU and enters resting state.
In this technical scheme, by pending instruction being distributed to the target CPU process corresponding with the classification of this pending instruction, and when target CPU has processed pending instruction, control target CPU and enter resting state, so, it is possible to avoid CPU in correlation technique to be in the situation of idling conditions, thus being effectively reduced the power consumption of terminal, improve the use duration of terminal, and then promote Consumer's Experience.
In technique scheme, it is preferable that described determine that unit 202 includes: obtain subelement 2022, the history for obtaining described pending instruction processes parameter；Described determine unit 202 specifically for, according to described history process parameter, it is determined that perform the amount of calculation needed for described pending instruction.
In this technical scheme, parameter is processed by obtaining the history of pending instruction, such that it is able to process parameter according to history to have determined the amount of calculation needed for pending instruction, wherein, it can be the CPU handling duration when last time processes this pending instruction or processing speed that history processes parameter, such as, if the handling duration that CPU processes any bar instruction is 3 seconds, amount of calculation needed for then having can determine that this any bar instruction is bigger, therefore, pass through technique scheme, it is possible to relatively accurately determined the amount of calculation needed for pending instruction.
In any of the above-described technical scheme, it is preferable that described allocation units 204 include: distribution subelement 2042, if processing parameter for not getting described history, then particular CPU is distributed in described pending instruction and process；Storing sub-units 2044, for storing process parameter during the described pending instruction of process of described particular CPU.
In this technical scheme, if not getting history to process parameter, then pending instruction can be distributed to particular CPU to process, and process reference record when particular CPU is processed pending instruction gets off, so, terminal just can determine the amount of calculation needed for this pending instruction according to this process parameter, so that when next time receives this pending instruction again, the classification of this pending instruction can be determined rapidly according to amount of calculation, then the target CPU process corresponding with its classification is distributed in this pending instruction.
In any of the above-described technical scheme, it is preferable that described allocation units 204 include: wake subelement 2046 up, for before processing described pending instruction, if described target CPU is in a dormant state, then wake described target CPU up, so that described target CPU is in running status.
In this technical scheme, by waking target CPU in a dormant state up, instructions to be performed to guarantee that target CPU can process in time.
In any of the above-described technical scheme, it is preferable that described allocation units 204 comprise determining that subelement 2048, for according to completing the amount of calculation needed for described pending instruction, it is determined that the quantity of described target CPU.
In this technical scheme, it is possible to determine the quantity of target CPU according to the amount of calculation needed for completing pending instruction, when namely the amount of calculation needed for completing pending instruction is big especially, it may be necessary to multiple target CPU perform this pending instruction.
Fig. 3 illustrates the structural representation of terminal according to an embodiment of the invention.
As shown in Figure 3, terminal 300 according to an embodiment of the invention, including the instruction processing unit 200 according to any one of technique scheme, therefore, this terminal 300 has the technique effect identical with the instruction processing unit 200 according to any one of technique scheme, does not repeat them here.
Fig. 4 illustrates the schematic diagram of instruction according to an embodiment of the invention and the corresponding relation of CPU.
As shown in Figure 4, multiple core cpu is had in terminal, including: high-performance core cpu 1, high-performance core cpu 2 ... high-performance core cpu N, low performance core cpu 1, low performance core cpu 2 ... low performance core cpu N, wherein, high-performance core cpu and low performance core cpu select one as pretreatment core cpu, and make this pretreatment core cpu be in running status, other core cpus are in resting state, first, the instruction (i.e. pending instruction) to perform is carried out pretreatment by pretreatment core cpu, thus distinguishing little amount of calculation instruction set, intensive instruction set.Then again these instruction set are distributed to the core cpu that amount of calculation is mated with it to go to process, distribute to high-performance core cpu by big calculating instruction set and process, little amount of calculation instruction set is distributed to low performance energy core cpu and processes.It addition, after core cpu has processed instruction, core cpu automatically into resting state, thus stopping the existence of idle running core cpu, and then can be effectively reduced the power consumption of terminal.
Alternatively, it is also possible to intensive instruction set is preferentially given high-performance core cpu 1, make this high-performance core cpu 1 be in running status, and other high-performance core cpus are in a dormant state；When the pending command quantity of this high-performance core cpu 1 exceedes predetermined threshold value, intensive instruction set is had then preferentially to give high-performance core cpu 2 afterwards again so that this high-performance core cpu 2 is in running status, by that analogy.When a certain moment pretreatment core cpu, when high-performance core cpu 1 and high-performance core cpu 2 are in running status, if this high-performance core cpu 2 is not previously allocated new instruction set after having processed present instruction, then control this high-performance core cpu 2 in a dormant state, also can process according to the method for salary distribution of intensive instruction set for little amount of calculation instruction set, such as, when a certain moment low performance core cpu 1 and low performance core cpu 2 are in running status, if low performance core cpu 1 is not previously allocated new instruction after having processed instruction, then control low performance core cpu 1 in a dormant state.
Describing technical scheme in detail above in association with accompanying drawing, after CPU has processed instruction, control CPU in a dormant state, it is possible to be effectively reduced the power consumption of terminal, thus improving the use duration of terminal, and then promoting Consumer's Experience.
The foregoing is only the preferred embodiments of the present invention, be not limited to the present invention, for a person skilled in the art, the present invention can have various modifications and variations.All within the spirit and principles in the present invention, any amendment of making, equivalent replacement, improvement etc., should be included within protection scope of the present invention.
Claims (11)
1. a command processing method, it is characterised in that including:
According to the amount of calculation completed needed for pending instruction, it is determined that the classification of described pending instruction；
The target CPU process corresponding with described classification is distributed in described pending instruction；
After described target CPU has processed described pending instruction, if described target CPU is not carried out other instructions, then controls described target CPU and enter resting state.
2. command processing method according to claim 1, it is characterised in that described basis completes the amount of calculation needed for pending instruction, it is determined that before the step of the classification of described pending instruction, including:
The history obtaining described pending instruction processes parameter；
Parameter is processed, it is determined that complete the amount of calculation needed for described pending instruction according to described history.
3. command processing method according to claim 2, it is characterised in that described described pending instruction is distributed to the target CPU corresponding with the described classification step carrying out processing, also includes:
If not getting described history to process parameter, then particular CPU is distributed in described pending instruction and process；
Store process parameter during the described pending instruction of process of described particular CPU.
4. command processing method according to any one of claim 1 to 3, it is characterised in that described described pending instruction is distributed to the CPU corresponding with the described classification step carrying out processing, also includes:
Before processing described pending instruction, if described target CPU is in a dormant state, then wake described target CPU up, so that described target CPU is in running status.
5. command processing method according to any one of claim 1 to 3, it is characterised in that described described pending instruction is distributed to the target CPU corresponding with the described classification step carrying out processing, also includes:
According to the amount of calculation completed needed for described pending instruction, it is determined that the quantity of described target CPU.
6. an instruction processing unit, it is characterised in that including:
Determine unit, for according to completing the amount of calculation needed for pending instruction, it is determined that the classification of described pending instruction；
Allocation units, for distributing to the target CPU process corresponding with described classification by described pending instruction；
Control unit, for after described target CPU has processed described pending instruction, if described target CPU is not carried out other instructions, then controls described target CPU and enters resting state.
7. instruction processing unit according to claim 6, it is characterised in that described determine that unit includes:
Obtaining subelement, the history for obtaining described pending instruction processes parameter；
Described determine unit specifically for, according to described history process parameter, it is determined that complete the amount of calculation needed for described pending instruction.
8. instruction processing unit according to claim 7, it is characterised in that described allocation units include:
Distribution subelement, if processing parameter for not getting described history, then distributes to particular CPU by described pending instruction and processes；
Storing sub-units, for storing process parameter during the described pending instruction of process of described particular CPU.
9. the instruction processing unit according to any one of claim 6 to 8, it is characterised in that described allocation units include:
Wake subelement up, for, before processing described pending instruction, if described target CPU is in a dormant state, then waking described target CPU up, so that described target CPU is in running status.
10. the instruction processing unit according to any one of claim 6 to 8, it is characterised in that described allocation units include:
Determine subelement, for according to completing the amount of calculation needed for described pending instruction, it is determined that the quantity of described target CPU.
11. a terminal, it is characterised in that including: the instruction processing unit as according to any one of claim 6 to 10.
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| CN201610113147.0A CN105807889A (en) | 2016-02-29 | 2016-02-29 | Instruction processing method, instruction processing device and terminal |
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| CN110337139A (en) * | 2019-07-18 | 2019-10-15 | 河南兵峰电子科技有限公司 | A kind of Low-power-consumptiocontrol control method and wireless sensor based on wireless sensor |
| CN112764933A (en) * | 2021-01-27 | 2021-05-07 | 惠州Tcl移动通信有限公司 | CPU configuration method, device, terminal and computer readable storage medium |
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