CN105785788A - Rapid three-phase voltage phase-locked loop method and dynamic response performance analyzing method thereof - Google Patents
Rapid three-phase voltage phase-locked loop method and dynamic response performance analyzing method thereof Download PDFInfo
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Abstract
The invention discloses a rapid three-phase voltage phase-locked loop method and a dynamic response performance analyzing method thereof, and belongs to the technical field of electric power and electronic control. The analyzing method comprises the following steps: establishing a simplified model of a phase-locked loop, obtaining an open-loop transfer function of a traditional three-phase voltage phase-locked loop and a high-speed three-phase voltage phase-locked loop based on the simplified model, and obtaining a root locus of the changes of a PI regulator parameter Kp based on the open-loop transfer function, a sampling frequency and a fundamental wave angular frequency; drawing two root loci in the same coordinate system, performing equivalent simplification on a high-order system to a typical second order system through the method of closed loop dominant apices, and obtaining convergence time t1 and t2 of the typical second order system in correspondence to the traditional three-phase voltage phase-closed loop and the high-speed three phase voltage phase-locked loop. The analyzing method begins with a simplified mathematics model from a rapid three-phase voltage phase-closed loop structure, conducts separate and detailed discussion on time domain and frequency domain mathematics models, and at the same time demonstrates a theory analysis based on a relevant simulation platform and a hardware experiment platform.
Description
Technical field
The present invention relates to power electronics control field, analyze method particularly to the quick three-phase voltage phase-locked loop method of one and dynamic response performance thereof.
Background technology
In recent years, along with the aggravation of environmental pollution, fossil energy problem in short supply, the development and utilization of regenerative resource receives the concern of increasing country.Owing to having the initial stage, distributed generation system assumes that the features such as investment is low, generation mode is flexible become the new forms of energy comprehensive utilization mode in a kind of great development market.Three-phase PWM grid-connected converter, as the energy interface unit between distributed generation system and electrical network public access point, is extremely important ingredient in distributed generation system.
Three-phase PWM grid-connected converter is high with its voltage utilization, and the advantages such as power factor is adjustable are widely applied.The accuracy of this phase-locked loop circuit to detecting voltage magnitude, phase angle, frequency in real time, rapidity and robustness are had higher requirement.In three-phase phase-locked loop circuit, most widely used is single synchronous rotating frame phaselocked loop (SSRF-PLL). traditional single synchronous rotating frame phaselocked loop realizes simple, balance at line voltage, it does not have when distortion, phase-locked accurately, dynamic response rapid.And work as unbalanced source voltage, when there is harmonic wave, this method is difficult to obtain gratifying phase-locked performance.For the system lock phase performance improving Voltage unbalance and when network access voltage there is harmonic wave, need phase-locked loop structures is necessarily improved, traditional method has: 1), be that the positive-sequence component to three-phase imbalance voltage is extracted based on the phase-locked loop method of symmetrical components, thus effectively suppressing the negative sequence component impact on system, but this method adds all-pass filter, frequency adaptability is not enough.2) being, based on the phase-locked loop method of double; two synchronous coordinate system decouplings the positive-sequence component to network access voltage and negative sequence component carries out decoupling, controlling under two rotating coordinate systems respectively, thus improving phase-locked performance；But this method realizes complexity, parameter designing difficulty.
The digital phase-locking method in a kind of three-phase voltage asymmetry situation such as patent disclosure that application number is 201510113101.4, comprise the steps: the first step, a, b, c three-phase voltage sampled value ua [n], ub [n], uc [n] are obtained magnitude of voltage V α [n], V β [n] by Clark conversion；Second step, obtains voltage Vd [n], Vq [n] by magnitude of voltage V α [n], V β [n] by Park conversion；3rd step, the voltage Vq [n] Park conversion obtained sends into numeral PI link through wave digital lowpass filter；4th step, is added laggard row number integration by the output of numeral PI link with reference frequency；5th step, a phase voltage phase theta digital integration obtained is sent into Park conversion and is carried out closed loop adjustment, calculates electric network voltage phase.
A kind of phase-locked loop method for dynamic voltage reactive compensation of patent if application number is 201310573330.5, comprises the following steps: sampling step: by sample circuit, gather three-phase voltage signal ua, ub, the uc on three-phase power line；First coordinate transform step: three-phase voltage signal ua, ub, the uc on three-phase power line is carried out C32 conversion by first arithmetic device, obtains u α and u β；Second coordinate transform step: u α and u β is carried out C conversion again, obtains up and uq；PI regulating step: regulated by PI and uq is regulated to 0, output error signal angular frequency；Mach angle frequency input step: error signal angular frequency be added with a Mach angle frequencies omega 1, obtains the output angle frequencies omega * of phaselocked loop；Integration step: the output angle frequencies omega * of input phaselocked loop, is integrated calculating to the output angle frequencies omega * of phaselocked loop, obtains and exports phaselocked loop output phase theta *.
Summary of the invention
In order to solve the problems referred to above, embodiments providing a kind of quickly three-phase voltage phase-locked loop method and dynamic response performance analyzes method, this quick three-phase voltage phase-locked loop method has the accuracy of response speed and Geng Gao faster；Meanwhile, present invention also offers the dynamic response performance of this quick three-phase voltage phase-locked loop method and analyze method, preceding method is proved by this analysis method from many aspects.Described technical scheme is as follows:
On the one hand, embodiments provide a kind of quickly three-phase voltage phase-locked loop method, comprise the following steps:
(1) by a, b, c three-phase voltage sampled value Ua、UbAnd UcVoltage U is obtained by Clark conversionα、Uβ。
(2) by voltage Uα、UβVoltage U is obtained by Park conversiond、Uq。
(3) Park is converted the voltage U obtaineddFilter higher hamonic wave through one order inertia wave filter, obtain UqWith U after filteringdRatio Uq/Ud, then by Uq/UdSend into pi regulator, make U through the adjustment of pi regulatorq/UdLevel off to 0.
(4) output of pi regulator and the superimposed output angle frequency obtaining phaselocked loop of the rated value of line voltage, in order to realize closed loop control.
Wherein, three-phase voltage sampled value Ua、UbAnd UcCan be expressed as:
Wherein, UmFor the three-phase equilibrium voltage magnitude of line voltage, ω0For first-harmonic angular frequency, the initial phase angle of a phase voltage is 0.
Wherein, the conversion of the Clark in step (1) adopts such as following formula:
Wherein, θ is the start angle of line voltage vector.
Wherein, the conversion of the Park in step (2) adopts such as following formula:
Wherein,Exporting phase angle for phaselocked loop, adopt D axle directed, phaselocked loop exportsPark conversion is carried out for the anglec of rotation.
On the other hand, the embodiment of the present invention additionally provides the dynamic response performance of aforementioned quick three-phase voltage phase-locked loop method and analyzes method, and this analysis method comprises the following steps:
(1) simplified model of three-phase voltage phaselocked loop is set up.
(2) conventional three-phase voltage phaselocked loop and the open-loop transfer function of high speed three-phase voltage phaselocked loop are obtained according to the simplified model of step (1).
(3) open-loop transfer function obtained according to sample frequency, first-harmonic angular frequency and step (2) obtains pi regulator parameter KpThe root locus of change.
(4) two root locus obtained in the same coordinate system plot step (3), and by the method for closed loop dominant apices, high order system equivalent-simplification is become typical case's second-order system, obtain the damped coefficient ξ of the conventional three-phase voltage phaselocked loop typical second-order system corresponding with high speed three-phase voltage phaselocked loop.
(5) the two damped coefficient ξ obtained according to step (4) respectively obtain the convergence time t of the conventional three-phase voltage phaselocked loop typical second-order system corresponding with high speed three-phase voltage phaselocked loop1And t2, compare t1And t2Size, it is judged that quickly whether the convergence time of three-phase voltage phaselocked loop less than the convergence time of conventional three-phase voltage phaselocked loop.
Wherein, conventional three-phase voltage phase-locked loop method, comprise the following steps:
A, by a, b, c three-phase voltage sampled value Ua、UbAnd UcVoltage U is obtained by Clark conversionα、Uβ。
B, by voltage Uα、UβVoltage U is obtained by Park conversiond、Uq。
C, by UqInput pi regulator, makes U through the adjustment of pi regulatorqLevel off to 0.
D, pi regulator the superimposed output angle frequency obtaining phaselocked loop of rated value of output and line voltage, in order to realize closed loop control.
Wherein, referring to Fig. 5, step (1) including: sets up the simplification mathematical model of three-phase voltage phaselocked loop.
Wherein, the F of conventional three-phase voltage phaselocked loop1(θ)=sin Δ θ, the F of high speed three-phase voltage phaselocked loop2(θ)=tan Δ θ.
Referring to Fig. 6, obtain the frequency domain simplified model of conventional three-phase voltage phaselocked loop according to the mathematical model that simplifies of three-phase voltage phaselocked loop.
Referring to Fig. 7, when Δ θ is only small (Δ θ ∈ (-5 °, 5 °)), it is tan Δ θ by Δ θ equivalent substitution, and the mathematical model that simplifies according to three-phase voltage phaselocked loop obtains the frequency domain simplified model of high speed three-phase voltage phaselocked loop.
Wherein, θ is the start angle of line voltage vector, and the phase angle that Δ θ is line voltage is poor with phaselocked loop output angle, TsFor time constant,Phase angle, K is exported for phaselocked looppFor pi regulator parameter, ω is the rated value of line voltage.
Wherein, in step (2): obtain conventional three-phase voltage phaselocked loop and the open-loop transfer function of high speed three-phase voltage phaselocked loop according to simplified model, the open-loop transfer function of conventional three-phase voltage phaselocked loop is:
The open-loop transfer function of high speed three-phase voltage phaselocked loop is:
Wherein, step (4) including: draws the nyquist diagram (two root locus and unit circle are plotted in the same coordinate system) of two root locus at the same coordinate system, obtains the Phase margin β that conventional three-phase voltage phaselocked loop is corresponding with high speed three-phase voltage phaselocked loop1And β2(angle of intersection point A and B, the OA of two root locus and unit circle and the negative axle of X-coordinate axle is β1, the angle of the negative axle of OB and X-coordinate axle is β2Wherein, O is zero, A correspondence high speed three-phase voltage phaselocked loop, B correspondence conventional three-phase voltage phaselocked loop), the damping coefficientζ of the conventional three-phase voltage phaselocked loop typical second-order system corresponding with high speed three-phase voltage phaselocked loop is respectively obtained according to ξ=cos β1And ζ2。
Wherein, step (5) including: the corresponding relation according to the damped coefficient of second-order system Yu convergence timeRespectively obtain the convergence time t of the conventional three-phase voltage phaselocked loop typical second-order system corresponding with high speed three-phase voltage phaselocked loop1And t2, compare t1And t2Size, it is judged that quickly whether the convergence time of three-phase voltage phaselocked loop less than conventional three-phase voltage phaselocked loop, if t1Less than t2, then high speed three-phase voltage phaselocked loop can follow the tracks of the phase information of line voltage faster；Wherein, ωnRepresent the natural frequency of oscillation of second-order system.
Wherein, step (4) also includes: when Δ θ is only small with the approximate tan Δ θ that replaces of Δ θ, and it practice, tan Δ θ > Δ θ, therefore when replacing tan Δ θ for systematic analysis with Δ θ, the rapidity of system can decrease.Consider the factors such as above time lag and Approximate Equivalent, when Δ θ is only small, the convergence time t of high speed three-phase voltage phaselocked loop1Convergence time t less than conventional three-phase voltage phaselocked loop2, namely when identical pi regulator parameter, high speed three-phase voltage phaselocked loop can follow the tracks of the phase information of line voltage faster.
Further, analysis method provided by the invention also includes: the curve corresponding for F (θ) of calculating conventional three-phase voltage phaselocked loop and the high speed three-phase voltage phaselocked loop slope at zero crossing place is K respectively1And K2, compare K1And K2Size, it is judged that the convergence rate of two three-phase voltage phaselocked loops, if K1Less than K2(Δ θ → 0), then quick three-phase voltage phaselocked loop is than the fast convergence rate of conventional three-phase voltage phaselocked loop.
Further, if t1Less than t2, then adopt software emulation platform and hardware experiment platform that theory analysis is proved.
Specifically, software emulation platform includes: if t1Less than t2, then adopt the MAST of SaberDesigner that conventional three-phase voltage phaselocked loop and high speed three-phase voltage phaselocked loop are emulated, obtain pi regulator and input the angle of time dependent curve and line voltage and the aberration curve of the angle of phaselocked loop output.The time dependent curve ratio dynamic responding speed compared with two three-phase voltage phaselocked loops is inputted according to pi regulator；The aberration curve of the angle that the angle according to line voltage exports with phaselocked loop reaches angular deviation during stable state, judge whether high speed three-phase voltage phaselocked loop can lock the angle information of line voltage, and compare two three-phase voltage phaselocked loops according to two slope of a curves and reach the time of stable state.
Specifically, hardware experiment platform includes: if t1Less than t2, then set up the Hardware Verification Platform that system three-phase voltage phaselocked loop is corresponding with high speed three-phase voltage phaselocked loop, obtain pi regulator and input the angle of time dependent curve and line voltage and the aberration curve of the angle of phaselocked loop output；The time dependent curve ratio dynamic responding speed compared with two three-phase voltage phaselocked loops is inputted according to pi regulator；The aberration curve of the angle that the angle according to line voltage exports with phaselocked loop reaches angular deviation during stable state, judge whether high speed three-phase voltage phaselocked loop can lock the angle information of line voltage, and compare two three-phase voltage phaselocked loops according to two slope of a curves and reach the time of stable state.
The invention provides a kind of quickly three-phase voltage phase-locked loop method and dynamic response performance analyzes method, the simplification mathematical model of this quick three-phase voltage phase-locked loop structures is started with by this analysis method, its time domain and Frequency Domain Mathematical Model are discussed in detail respectively, has been simultaneously based on relevant emulation platform and theory analysis has been proved by hardware experiment platform.This analysis method is notable to the theoretical research effect of high-speed phase-locked loop method and relevant phase-locked loop method, simultaneously that the concrete application of high-speed phase-locked loop scheme is also significant.
Accompanying drawing explanation
In order to be illustrated more clearly that the technical scheme in the embodiment of the present invention, below the accompanying drawing used required during embodiment is described is briefly described, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the premise not paying creative work, it is also possible to obtain other accompanying drawing according to these accompanying drawings.
Fig. 1 is the flow chart of the quick three-phase voltage phase-locked loop method that embodiment 1 provides；
Fig. 2 is the flow chart of the dynamic response performance analysis method of the quick three-phase voltage phaselocked loop that embodiment 2 provides；
Fig. 3 is the structure control block diagram of conventional three-phase voltage phaselocked loop；
Fig. 4 is the structure control block diagram of quick three-phase voltage phase-locked loop method provided by the invention；
Fig. 5 is the simplification mathematical model block diagram of three-phase voltage phaselocked loop；
Fig. 6 is conventional three-phase voltage phaselocked loop frequency domain simplified model block diagram；
Fig. 7 is the Frequency Domain Mathematical Model block diagram of quick three-phase voltage phaselocked loop provided by the invention；
Fig. 8 is conventional three-phase voltage phaselocked loop and the nyquist diagram of high speed three-phase voltage phaselocked loop provided by the invention；
Fig. 9 is conventional three-phase voltage phaselocked loop and high speed three-phase voltage phaselocked loop PI controller provided by the invention input simulation comparison figure；
Figure 10 is conventional three-phase voltage phaselocked loop and high speed three-phase voltage phaselocked loop tracking error simulation comparison figure provided by the invention；
Figure 11 is conventional three-phase voltage phaselocked loop and high speed three-phase voltage phaselocked loop PI controller provided by the invention input Experimental comparison figure；
Figure 12 is conventional three-phase voltage phaselocked loop and high speed three-phase voltage phaselocked loop tracking error Experimental comparison provided by the invention figure.
Detailed description of the invention
For making the object, technical solutions and advantages of the present invention clearly, below in conjunction with accompanying drawing, embodiment of the present invention is described further in detail.
Embodiment 1
Referring to Fig. 1, embodiment 1 provides a kind of quickly three-phase voltage phase-locked loop method, comprises the following steps:
101, by a, b, c three-phase voltage sampled value Ua、UbAnd UcVoltage U is obtained by Clark conversionα、Uβ。
102, voltage U step 101 obtainedα、UβVoltage U is obtained by Park conversiond、Uq, UdFor idle component, UqFor real component.
103, step 102 is converted through Park the voltage U obtaineddFilter higher hamonic wave through one order inertia wave filter, obtain UqWith U after filteringdRatio Uq/Ud, then by Uq/UdSend into pi regulator, make U through the adjustment of pi regulatorq/UdLevel off to 0.Wherein, the filtering method of one order inertia wave filter and transmission function are known by those skilled in the art, therefore omit detailed description.
104, U is regulated in step 103q/UdLevel off to 0 time, the output of pi regulator and the superimposed output angle frequency obtaining phaselocked loop of the rated value of line voltage, in order to realize the closed loop control of three-phase voltage.
Wherein, above-mentioned method both can realize can also being implemented in combination with by soft or hard by software.
Wherein, in step 101, three-phase voltage sampled value Ua、UbAnd UcCan be expressed as:
Wherein, UmFor the three-phase equilibrium voltage magnitude of line voltage, ω0For first-harmonic angular frequency, if the initial phase angle of a phase voltage is 0.
Wherein, Clark conversion in a step 101 adopts such as following formula:
Wherein, θ is the start angle of line voltage vector.
Wherein, Park conversion in a step 102 adopts such as following formula:
Wherein,Export phase angle for phaselocked loop, adopt D axle directed, phaselocked loop output phase anglePark conversion is carried out for the anglec of rotation.
It is simple that this quick three-phase voltage phase-locked loop method has realization relative to traditional method, and has the advantage such as accuracy of response speed and Geng Gao faster.
Embodiment 2
Referring to Fig. 2, embodiment 2 provides the dynamic response performance of the quick three-phase voltage phase-locked loop method that embodiment 1 provides and analyzes method, and this analysis method comprises the following steps:
201, the simplified model of three-phase voltage phaselocked loop is set up.
Wherein, step 201 specifically includes:
(1) referring to Fig. 5, the simplification mathematical model of three-phase voltage phaselocked loop is set up.
Wherein, conventional three-phase voltage phaselocked loop and high speed three-phase voltage phaselocked loop all adopt above-mentioned model.
Wherein, in above-mentioned model, the F of conventional three-phase voltage phaselocked loop1(θ)=sin Δ θ, F of high-speed phase-locked loop2(θ)=tan Δ θ.
(2) referring to Fig. 6, the mathematical model that simplifies of the three-phase voltage phaselocked loop set up according to step (1) obtains the frequency domain simplified model of conventional three-phase voltage phaselocked loop.
(3) referring to Fig. 7, (the Δ θ ∈ (-5 ° when Δ θ is only small, 5 °)), it is tan Δ θ by Δ θ equivalent substitution, and the mathematical model that simplifies of the three-phase voltage phaselocked loop set up according to step (1) obtains the frequency domain simplified model of high speed three-phase voltage phaselocked loop.
Wherein, in above-mentioned model, θ is the start angle of line voltage vector, and the phase angle that Δ θ is line voltage is poor with phaselocked loop output angle, TsFor time constant,Phase angle, K is exported for phaselocked looppFor pi regulator parameter, ω is the rated value of line voltage.
202, the simplified model set up according to step 201 obtains conventional three-phase voltage phaselocked loop and the open-loop transfer function of high speed three-phase voltage phaselocked loop.
Wherein, step 202 specifically includes: obtain the open-loop transfer function of conventional three-phase voltage phaselocked loop and the open-loop transfer function of high speed three-phase voltage phaselocked loop according to the simplified model that step 201 is set up.
Wherein, the open-loop transfer function of the conventional three-phase voltage phaselocked loop obtained is:
Wherein, the open-loop transfer function of the high speed three-phase voltage phaselocked loop obtained is:
203, the open-loop transfer function obtained according to sample frequency, first-harmonic angular frequency and step 202 respectively obtains conventional three-phase voltage phaselocked loop and the pi regulator parameter K of high speed three-phase voltage phaselocked looppThe root locus of change.Wherein, sample frequency and first-harmonic angular frequency determine according to electrical network itself.Wherein, the acquisition methods of root locus is known by those skilled in the art, therefore omits detailed description.
204, two root locus obtained in the same coordinate system plot step 203, and by the method for closed loop dominant apices, high order system equivalent-simplification is become typical case's second-order system, obtain the damped coefficient ξ of the conventional three-phase voltage phaselocked loop typical second-order system corresponding with high speed three-phase voltage phaselocked loop in the coordinate system.
Wherein, step 204 specifically includes: draw the nyquist diagram of conventional three-phase voltage phaselocked loop two root locus corresponding with high speed three-phase voltage phaselocked loop respectively at the same coordinate system, namely two root locus and unit circle are plotted in the same coordinate system, obtain the Phase margin β that conventional three-phase voltage phaselocked loop is corresponding with high speed three-phase voltage phaselocked loop1And β2.More specifically, two root locus and unit circle are β at intersection point A and B, the OA of the second quadrant with the angle of the negative axle of X-coordinate axle1, the angle of the negative axle of OB and X-coordinate axle is β2, wherein, O is zero, A correspondence high speed three-phase voltage phaselocked loop, B correspondence conventional three-phase voltage phaselocked loop, and respectively obtains the damping coefficientζ of the conventional three-phase voltage phaselocked loop typical second-order system corresponding with high speed three-phase voltage phaselocked loop according to ξ=cos β1And ζ2。
205, the damped coefficient ξ (ζ that the conventional three-phase voltage phaselocked loop that obtains according to step 204 is corresponding with high speed three-phase voltage phaselocked loop1And ζ2) respectively obtain the convergence time t of the conventional three-phase voltage phaselocked loop typical second-order system corresponding with high speed three-phase voltage phaselocked loop1And t2。
Wherein, step 205 specifically includes: the corresponding relation according to the damped coefficient of second-order system Yu convergence timeRespectively obtain the convergence time t of the conventional three-phase voltage phaselocked loop typical second-order system corresponding with high speed three-phase voltage phaselocked loop1And t2。
Wherein, step 205 also includes: replace and the processing method such as equivalent-simplification owing to have employed equivalence in said process, then according to time lag and Approximate Equivalent to t1And t2It is modified, then in step 206, it is possible to compare t after correction1And t2Size.Specifically: when Δ θ is only small with the approximate tan Δ θ that replaces of Δ θ, and it practice, tan Δ θ > Δ θ, thus when replacing tan Δ θ for systematic analysis with Δ θ, the rapidity of system can decrease.Consider the factors such as above time lag and Approximate Equivalent, when Δ θ is only small, the convergence time t of high speed three-phase voltage phaselocked loop1Convergence time t less than conventional three-phase voltage phaselocked loop2, namely when identical pi regulator parameter, high speed three-phase voltage phaselocked loop can follow the tracks of the phase information of line voltage faster.
206, the t that comparison step 205 obtains1And t2Size, it is judged that quickly whether the convergence time of three-phase voltage phaselocked loop less than the convergence time of conventional three-phase voltage phaselocked loop.If t1Less than t2, namely when identical pi regulator parameter, adopt phase-lock technique provided by the invention can follow the tracks of the phase information of line voltage faster, then perform step 207 and 208.
In step 201-206, have employed the processing methods such as mathematical modeling, equivalent-simplification and equivalence are similar to, then actual three-phase voltage phaselocked loop and said method would be likely to occur discrepancy, then step 207 and 208 adopts software emulation and Hardware Verification Platform that practical situation is analyzed.
207, adopt the MAST of SaberDesigner that conventional three-phase voltage phaselocked loop and high speed three-phase voltage phaselocked loop are emulated, its emulation method for building up is referred to abovementioned steps, known by those skilled in the art, obtain pi regulator and input the angle of time dependent curve and line voltage and the aberration curve of the angle of phaselocked loop output.The time dependent curve ratio dynamic responding speed compared with two three-phase voltage phaselocked loops is inputted according to pi regulator；The aberration curve of the angle that the angle according to line voltage exports with phaselocked loop reaches angular deviation during stable state, judge whether high speed three-phase voltage phaselocked loop can lock the angle information of line voltage, and compare the time reaching two three-phase voltage phaselocked loops to stable state according to two slope of a curves.
208, the Hardware Verification Platform that system three-phase voltage phaselocked loop is corresponding with high speed three-phase voltage phaselocked loop is set up, its hardware platform method for building up is referred to abovementioned steps, known by those skilled in the art, obtain pi regulator and input the angle of time dependent curve and line voltage and the aberration curve of the angle of phaselocked loop output；The time dependent curve ratio dynamic responding speed compared with two three-phase voltage phaselocked loops is inputted according to pi regulator；The aberration curve of the angle that the angle according to line voltage exports with phaselocked loop reaches angular deviation during stable state, judge whether high speed three-phase voltage phaselocked loop can lock the angle information of line voltage, and compare two three-phase voltage phaselocked loops according to two slope of a curves and reach the time of stable state.
It addition, this analysis method also includes, after step 201, perform step 209.
209, the simplification mathematical model of the three-phase voltage phaselocked loop set up according to step 201 calculates the curve corresponding for F (θ) of conventional three-phase voltage phaselocked loop and the high speed three-phase voltage phaselocked loop slope at zero crossing place respectively is K1And K2, compare K1And K2Size, it is judged that the convergence rate of two three-phase voltage phaselocked loops, if K1Less than K2(Δ θ → 0), then quick three-phase voltage phaselocked loop is than the fast convergence rate of conventional three-phase voltage phaselocked loop, it is possible to directly perform step 207 and 208.
In the present embodiment, this analysis method, from multiple angles, analyzes response speed and the accuracy of quick three-phase voltage phaselocked loop and conventional three-phase voltage phaselocked loop perfectly, modeling is combined with hardware experiments, has more cogency.
Embodiment 3
Embodiment 3 discloses basic structure and the principle of traditional locks phase method.Assume that line voltage be three-phase equilibrium voltage magnitude is Um, first-harmonic angular frequency is ω0, the initial phase angle of A phase voltage is 0, then three-phase power grid voltage can be expressed as following formula.
If the initial actual angle of line voltage vector is θ, by Clarke conversion, three-phase power grid voltage is transformed to biphase rest frame by three-phase static coordinate system, more directed with D axle, phaselocked loop output phase angleDo Park conversion for the anglec of rotation, biphase rest frame is transformed to synchronous rotary dq coordinate system, it is possible to obtain following formula.
For inciting somebody to action the two further abbreviations of formula above, if the estimation frequency of phaselocked loop output is ω1, the phase angle difference that the actual phase angle of line voltage vector exports with phaselocked loop isRepresenting that the phase angle of line voltage and phaselocked loop output angle are poor with Δ θ, abbreviation can obtain the dq weight expression of line voltage and be.
Work as ω1=ω0,Namely the output angle frequency of phaselocked loop is equal to the angular frequency of line voltage, when the output angle of phaselocked loop is equal to the angle of line voltage, and phaselocked loop output voltage vector UPLLIt is completely superposed with line voltage vector U, it is clear that by Q axle component closed loop control so that idle component is zero namely can realize the fully locked of frequency and phase place.
Three-phase equilibrium supply voltage Ua、UbAnd UcU is obtained after Clarke and Park convertsdAnd Uq, the wherein angle that angle is phaselocked loop output of Park conversion, by UqIt is input to pi regulator, when frequency lock, UqMust be a DC quantity, owing to pi regulator has direct current floating characteristic, therefore by UqPI regulate, it is possible to make UqLeveling off to 0, thus realizing the locking of line voltage angle, and the output of pi regulator and actual electric network rated frequency superposition can be obtained the output frequency of phaselocked loop.
Based on single synchronous coordinate system traditional software phaselocked loop structured flowchart as shown in Figure 3, it is contemplated that the late effect of voltage sample, structure chart adds a sampling period TsInertial delay link for time constant.
Embodiment 4
The phase-lock technique of the present embodiment is the idle component after converting with Park and the input being used for pi regulator of real component obtained afterwards after filtering, and the adjustment effect through pi regulator makes input quantity convergence be 0, thus pinning the phase place of line voltage rapidly.
Specifically, by three-phase equilibrium supply voltage Ua、UbAnd UcU is obtained after Clarke and Park convertsdAnd Uq, its mapping mode is consistent with the traditional locks phase method in embodiment 3.Then by UdHigher hamonic wave is filtered through one order inertia wave filter, then by Uq/UdAs the input of pi regulator, make U through the adjustment of pi regulatorq/UdLevel off to 0.Then by superimposed for the rated frequency of the output of pi regulator and the actual electric network voltage output angle frequency that can obtain phaselocked loop, based on single synchronous coordinate system provided by the invention quick phaselocked loop structured flowchart as shown in Figure 4.
The novel phaselocked loop that embodiment 5, embodiment 6 and embodiment 7 provide based on the present embodiment, it is proposed to the mathematical model of this phaselocked loop, and model is carried out mathematical analysis；Then utilize saberdesigner simulation software to build relevant emulation platform, carry out relevant simulation analysis, and build related hardware experiment porch, the correctness that argumentation theory is analyzed by experiment.
Embodiment 5: time and frequency domain analysis
On the basis of the high-speed phase-locked loop that embodiment 5 provides in embodiment 4, its mathematical model is carried out analytic demonstration in time domain and frequency domain.
One, Model in Time Domain analysis
The closed-loop control system of a phase error it is actually based on the software phlase locking loop of single synchronous coordinate system, by the phase contrast between input angle signal and phaselocked loop output angle signal, an error voltage corresponding to two phase contrasts is produced through the effect of overregulating, when loop-locking, phase contrast is a time-independent definite value, error voltage is also a definite value, controls the structure principle chart of system as shown in Figure 3 based on the phase feedback of the software phase-lock loop of single synchronous coordinate system.
In traditional locks phase method, export the input as pi regulator, U with the Q axle of Park conversionq=UmF in sin Δ θ, Fig. 51(θ)=sin Δ θ.In the phase-lock technique that embodiment 4 provides, owing to adopting the input being used for pi regulator of the filtering of the Park Q axle converted and D axle, Uq/Ud=tan Δ θ, therefore F in Fig. 52(θ)=tan Δ θ, when the angle of phaselocked loop output can follow the tracks of and lock the phase information of line voltage, then Δ θ → 0.If the slope that the curve corresponding to F (θ) is at zero crossing place is K, then K can react phaselocked loop error angle level off to 0 time, the dynamic response performance of system, namely when Δ θ → 0, F (θ) level off to 0 speed.
Wherein, K1Represent the slope that traditional locks phase method is corresponding, K2Represent the slope that phase-lock technique provided by the invention is corresponding.
K can be drawn from above formula1< K2, due to K1< K2, therefore when identical pi regulator parameter, traditional locks phase method by Q axle idle component as the input of pi regulator time, slower than the input response speed being used for pi regulator of phase-lock technique Q axle component provided by the invention and D axle component；Namely when Δ θ → 0, the quickly phase-locked fast convergence rate more phase-locked than tradition provided by the invention.
Two, frequency-domain analysis
In traditional locks phase method, F1(θ)=sin Δ θ, input quantity is that phase angle is poor, and in the time domain, output is the sinusoidal quantity of phase contrast, then can be obtained the phase feedback control structure block diagram of traditional locks phase method as shown in Figure 6 by the relation of time domain and frequency domain system.In phase-lock technique provided by the invention, F2(θ)=tan Δ θ, if consider to reach stable state, phase-locked system allows the angular error scope of 0-5 °, then, in Δ θ ∈ (-5 °, 5 °) scope, have tan Δ θ > Δ θ > sin Δ θ.When Δ θ is only small, replace tan Δ θ can obtain phaselocked loop phase place closed loop feedback control structure block diagram provided by the invention as shown in Figure 7 with Δ θ is approximate.
The open-loop transfer function of traditional locks phase method and fast lock phase method provided by the invention can be obtained respectively shown in following formula by Fig. 6 and Fig. 7:
Wherein, (1) formula is the open-loop transfer function of traditional locks phase method, and (2) formula is the open-loop transfer function of fast lock phase method provided by the invention.
It is assumed that the sample frequency of line voltage is 20kHz, first-harmonic angular frequency is 314rad/s, substitutes into parameter and can obtain traditional locks phase system and novel lock phase system along with pi regulator parameter KpThe root locus of change is as shown in Figure 8.Certainly different according to electrical network parameter, it is also possible to substitute into other setting values.In Fig. 8, a curve represents the system root locus diagram of fast lock phase method provided by the invention, and b curve represents the system root locus diagram of traditional locks phase method.From figure 8, it is seen that fast lock phase method root locus a provided by the invention is from co-ordinate zero point, along with KpIncrease, tend to infinitely great from Left half-plane, traditional locks phase method root locus b is from the imaginary axis ± 314j, along with KpIncrease, tend to infinitely great from Left half-plane, and work as KpWhen increasing to certain value, the root locus of two systems overlaps.
For high order system, the method utilizing closed loop dominant apices, it is possible to high order system equivalent-simplification is become typical case's second-order system, for two phase-locked systems, is located at identical pi regulator parameter KpWhen, the dominant pole of closed loop system is such as shown in A and the B of Fig. 8 midpoint.O represents root locus zero, if the angle of the negative axle of OA and X-coordinate axle is β1, the angle of the negative axle of OB and X-coordinate axle is β2, then β can reflect the size of typical case second-order system damped coefficient ξ, ξ=cos β.The convergence time of second-order systemWherein ωnRepresent the natural frequency of oscillation of second-order system, have when identical pi regulator parameter:
β1< β2
cosβ1> cos β2
t1< t2。
I.e. t1Less than t2Additionally, due in the structure principle chart analyzing phase-lock technique provided by the invention, tan Δ θ is replaced with Δ θ is approximate when Δ θ is only small, and actually, tan Δ θ > Δ θ, therefore when replacing tan Δ θ for systematic analysis with Δ θ, the rapidity of system can decrease.Consider the factors such as above time lag and Approximate Equivalent, when Δ θ is only small, the convergence time t of novel lock phase method1Convergence time t less than traditional locks phase method2, namely when identical pi regulator parameter, adopt phase-lock technique provided by the invention can follow the tracks of the phase information of line voltage faster.
Embodiment 6: analysis of simulation result
Go out the procedural model of software phase-lock loop with the MAST lingustic description of SaberDesigner, by the emulation of traditional method and phase-lock technique provided by the invention is compared, curve as shown in Figures 9 and 10 can be obtained respectively.
In Fig. 9, a curve represents that the pi regulator of fast lock phase method provided by the invention inputs time dependent curve, and b curve represents that the pi regulator of traditional locks phase method inputs time dependent curve.By contrast it is recognised that phase-lock technique provided by the invention actuator input the time level off to 0 speed more than traditional locks phase method, dynamic response is better than traditional locks phase method.
In Figure 10, a curve represents the angle of the line voltage of traditional locks phase method and the deviation of the angle of phaselocked loop output, and b curve represents the angle of the line voltage of fast lock phase method provided by the invention and the deviation of the angle of phaselocked loop output.Can be seen that from the curve of Figure 10, when closed loop phase lock ring reaches stable state, the angular deviation of two kinds of methods is all within the scope of 0.3 degree, namely two kinds of methods all can pin the angle information of line voltage completely, and the slope that curve b is than curve a is big, namely the time reaching stable state is short, therefore adopts phase-lock technique provided by the invention can quickly and accurately follow the tracks of the angle information of line voltage.
Embodiment 7: hardware experiments interpretation of result
Building a 22kw four-quadrant PWM rectifier hardware experiment platform, phase-lock section is realized by program completely, can obtain waveform and the curve of Figure 11 and Figure 12 by observing the data of phaselocked loop part.
In Figure 11, a curve represents that the pi regulator of fast lock phase method provided by the invention inputs time dependent experimental result curve, and b curve represents that the pi regulator of traditional locks phase method inputs time dependent experimental result curve.
In Figure 12, a curve represents the angle of the line voltage of fast lock phase method provided by the invention and the deviation of the angle of phaselocked loop output, and b curve represents the angle of the line voltage of traditional locks phase method and the deviation of the angle of phaselocked loop output.
By two curve waveforms in contrast Figure 11 and Figure 12 it is recognised that fast lock phase method dynamic response performance provided by the invention is better than traditional locks phase method.
To sum up, by embodiment 3-7, embodiment 3 provides a kind of quickly three-phase voltage phase-locked loop method, on the basis of the method, embodiment 4 proposes it and simplifies mathematical model, this phase-lock technique has been carried out discussing analysis in detail respectively by embodiment 5 in Model in Time Domain and frequency-domain model, mathematically demonstrates this phase-lock technique and has the reason of rapidity and accuracy.Again after theory analysis, embodiment 6 and 7 is respectively adopted software emulation and hardware experiments and this phase-lock technique is had rapidity and accuracy is proved, and the advantage such as the rapidity have this kind of modified model phase-lock technique and accuracy has carried out detailed demonstration.
The detailed description of the invention of present invention described above, is not intended that limiting the scope of the present invention.Any technology according to the present invention is conceived made various other and is changed accordingly and deformation, should be included in the protection domain of the claims in the present invention.
Claims (10)
1. a quick three-phase voltage phase-locked loop method, it is characterised in that comprise the following steps:
(1) by a, b, c three-phase voltage sampled value Ua、UbAnd UcVoltage U is obtained by Clark conversionα、Uβ；
(2) by voltage Uα、UβVoltage U is obtained by Park conversiond、Uq；
(3) Park is converted the voltage U obtaineddFilter higher hamonic wave through one order inertia wave filter, obtain UqWith U after filteringdRatio Uq/Ud, then by Uq/UdSend into pi regulator, make U through the adjustment of pi regulatorq/UdLevel off to 0；
(4) output of pi regulator and the superimposed output angle frequency obtaining phaselocked loop of the rated value of line voltage, in order to realize closed loop control.
2. quick three-phase voltage phase-locked loop method according to claim 1, it is characterised in that described three-phase voltage sampled value Ua、UbAnd UcCan be expressed as:
Wherein, UmFor the three-phase equilibrium voltage magnitude of line voltage, ω0For first-harmonic angular frequency, the initial phase angle of a phase voltage is 0；
Clark conversion in step (1) adopts such as following formula:
Wherein, θ is the start angle of line voltage vector；
Park conversion in step (2) adopts such as following formula:
Wherein,Phase angle is exported for phaselocked loop.
3. the dynamic response performance of quickly three-phase voltage phase-locked loop method as claimed in claim 1 or 2 analyzes method, it is characterised in that comprise the following steps:
(1) simplified model of three-phase voltage phaselocked loop is set up；
(2) conventional three-phase voltage phaselocked loop and the open-loop transfer function of high speed three-phase voltage phaselocked loop are obtained according to simplified model；
(3) open-loop transfer function obtained according to sample frequency, first-harmonic angular frequency and step (2) obtains pi regulator parameter KpThe root locus of change；
(4) two root locus obtained in the same coordinate system plot step (3), and by the method for closed loop dominant apices, high order system equivalent-simplification is become typical case's second-order system, obtain the damped coefficient ξ of the conventional three-phase voltage phaselocked loop typical second-order system corresponding with high speed three-phase voltage phaselocked loop；
(5) the two damped coefficient ξ obtained according to step (4) respectively obtain the convergence time t of the conventional three-phase voltage phaselocked loop typical second-order system corresponding with high speed three-phase voltage phaselocked loop1And t2, compare t1And t2Size, it is judged that quickly whether the convergence time of three-phase voltage phaselocked loop less than conventional three-phase voltage phaselocked loop.
4. dynamic response performance according to claim 3 analyzes method, it is characterised in that step (1) including: sets up the simplification mathematical model of three-phase voltage phaselocked loop:
Wherein, the F of conventional three-phase voltage phaselocked loop1(θ)=sin Δ θ, the F of high speed three-phase voltage phaselocked loop2(θ)=tan Δ θ；
The mathematical model that simplifies according to three-phase voltage phaselocked loop obtains the frequency domain simplified model of conventional three-phase voltage phaselocked loop:
When Δ θ is only small, it is tan Δ θ by Δ θ equivalent substitution, and the mathematical model that simplifies according to three-phase voltage phaselocked loop obtains the frequency domain simplified model of high speed three-phase voltage phaselocked loop:
Wherein, θ is the start angle of line voltage vector, and the phase angle that Δ θ is line voltage is poor with phaselocked loop output angle, TsFor time constant,Phase angle, K is exported for phaselocked looppFor pi regulator parameter, ω is the rated value of line voltage.
5. dynamic response performance according to claim 4 analyzes method, it is characterised in that in step (2):
The open-loop transfer function of described conventional three-phase voltage phaselocked loop is:
The open-loop transfer function of described high speed three-phase voltage phaselocked loop is:
6. dynamic response performance according to claim 5 analyzes method, it is characterised in that step (4) including:
Draw the nyquist diagram of two root locus, obtain the Phase margin β that conventional three-phase voltage phaselocked loop is corresponding with high speed three-phase voltage phaselocked loop1And β2, the damping coefficientζ of the conventional three-phase voltage phaselocked loop typical second-order system corresponding with high speed three-phase voltage phaselocked loop is respectively obtained according to ξ=cos β1And ζ2。
7. dynamic response performance according to claim 6 analyzes method, it is characterised in that step (5) including:
The corresponding relation of the damped coefficient according to second-order system and convergence timeRespectively obtain the convergence time t of the conventional three-phase voltage phaselocked loop typical second-order system corresponding with high speed three-phase voltage phaselocked loop1And t2, compare t1And t2Size, it is judged that quickly whether the convergence time of three-phase voltage phaselocked loop less than conventional three-phase voltage phaselocked loop；Wherein, ωnRepresent the natural frequency of oscillation of second-order system.
8. dynamic response performance according to claim 4 analyzes method, it is characterised in that described method also includes:
The curve corresponding for F (θ) of calculating conventional three-phase voltage phaselocked loop and the high speed three-phase voltage phaselocked loop slope at zero crossing place is K respectively1And K2, compare K1And K2Size, it is judged that the convergence rate of two three-phase voltage phaselocked loops.
9. dynamic response performance according to claim 3 analyzes method, it is characterised in that described method also includes:
If t1Less than t2, then adopt the MAST of SaberDesigner that conventional three-phase voltage phaselocked loop and high speed three-phase voltage phaselocked loop are emulated, obtain pi regulator and input the angle of time dependent curve and line voltage and the aberration curve of the angle of phaselocked loop output；
The time dependent curve ratio dynamic responding speed compared with two three-phase voltage phaselocked loops is inputted according to pi regulator；
The aberration curve of the angle that the angle according to line voltage exports with phaselocked loop reaches angular deviation during stable state, judge whether high speed three-phase voltage phaselocked loop can lock the angle information of line voltage, and compare two three-phase voltage phaselocked loops according to two slope of a curves and reach the time of stable state.
10. dynamic response performance according to claim 3 analyzes method, it is characterised in that described method also includes:
If t1Less than t2, then set up the Hardware Verification Platform that system three-phase voltage phaselocked loop is corresponding with high speed three-phase voltage phaselocked loop, obtain pi regulator and input the angle of time dependent curve and line voltage and the aberration curve of the angle of phaselocked loop output；
The time dependent curve ratio dynamic responding speed compared with two three-phase voltage phaselocked loops is inputted according to pi regulator；
The aberration curve of the angle that the angle according to line voltage exports with phaselocked loop reaches angular deviation during stable state, judge whether high speed three-phase voltage phaselocked loop can lock the angle information of line voltage, and compare two three-phase voltage phaselocked loops according to two slope of a curves and reach the time of stable state.
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