CN105681801A - Method for realizing H.264CAVLC decoding fault tolerance function and decoder - Google Patents

Method for realizing H.264CAVLC decoding fault tolerance function and decoder Download PDF

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CN105681801A
CN105681801A CN201610192994.0A CN201610192994A CN105681801A CN 105681801 A CN105681801 A CN 105681801A CN 201610192994 A CN201610192994 A CN 201610192994A CN 105681801 A CN105681801 A CN 105681801A
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module
decoding
code stream
decoder
code
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吴琦
李煜
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Chengdu Xincheng Technology Co Ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/44Decoders specially adapted therefor, e.g. video decoders which are asymmetric with respect to the encoder
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/102Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or selection affected or controlled by the adaptive coding
    • H04N19/13Adaptive entropy coding, e.g. adaptive variable length coding [AVLC] or context adaptive binary arithmetic coding [CABAC]
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/134Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or criterion affecting or controlling the adaptive coding
    • H04N19/156Availability of hardware or computational resources, e.g. encoding based on power-saving criteria
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/169Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding
    • H04N19/17Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object
    • H04N19/176Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object the region being a block, e.g. a macroblock
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/90Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using coding techniques not provided for in groups H04N19/10-H04N19/85, e.g. fractals
    • H04N19/91Entropy coding, e.g. variable length coding [VLC] or arithmetic coding

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Computing Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Compression Or Coding Systems Of Tv Signals (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)

Abstract

The invention discloses a method for realizing an H.264CAVLC decoding fault tolerance function and a decoder. With the method and the decoder adopted, defects such as design workload and cost increase in the prior art can be eliminated. According to the method, an alternative circuit MUX is arranged in a code stream input module of the decoder; the alternative circuit MUX is provided with two input ends, wherein one input end receives code streams inputted by an upper computer, the other input end receives the all-''1...1'' fixed values of code streams; according to normal decoding, the code stream input module outputs the code streams inputted by the upper computer to decoding modules for decoding the code streams; and according to fault tolerance, when the code stream input module receives code stream error signals, the code stream input module discards residual code streams and outputs the all-''1...1'' fixed values of the code streams to the decoding modules for decoding. With the method adopted, a code stream fault tolerant processing algorithm is simplified, hardware design resources are effectively saved. The method has a practical value for the application of the productization of H.264 decoders.

Description

A kind of method and demoder realizing H.264CAVLC decoding and fault tolerance function
Technical field
The present invention relates to compression of digital video encoding and decoding technique field, the fault-tolerant technique of the CAVLC (based on the elongated coding of context-adaptive) being specifically related in H.264 decoding digital video when decoding.
Background technology
H.264/AVC video compression coding standard is that ITU-T is organized in the video compression standard promulgated for 2003, although the video compression standard HEVC of a new generation came out in 2013, but due to the complexity height that HEVC realizes so that what in existing market, video compression coding-decoding scheme great majority still adopted is H.264 coding standard.
H.264 have employed two kinds of modes at entropy code: one is CABAC (counting coding based on the scale-of-two of context-adaptive) and CAVLC (Variable Length Code based on context-adaptive). H.264 content code stream comprises an information, information of forecasting and residual information. H.264CAVLC the process decoded shows as two kinds of situations: one is that grammer element (syntaxelement) wins the decode value of code word as this grammer element of certain length according to the descriptor (descriptor) of its correspondence in code stream, and another kind also needs the code word won to find corresponding value as decode value in table searching of correspondence. Based on above-mentioned it will be seen that decoding makes mistakes shows as corresponding two kinds without situation about separating: one be decode value beyond span, to be then code word can not find corresponding value searching table to another kind.
The grammer element of decoding is needed to make concise and to the point point class declaration H.264CAVLC information of forecasting and residual information below:
As shown in table 1, table 1 has the grammer element (syntaxelement) of 10 existence " span restriction ", such as mb_skip_run etc.; The grammer element (syntaxelement) also having 8 needs " tabling look-up " in addition, such as mb_type etc., all may there is code stream without situation about separating in them.
The information of forecasting of table 1.H.264CAVLC and residual information need to decode grammer element and illustrate:
Code stream is without the consequence separated: decoding can be caused to interrupt, and the image of decoding display stops. A healthy and strong demoder needs to possess fault tolerance, and namely after code flows out mistake, decoding is not interrupted, and still exports the value of certain grammer element, until this frame decoding completes; Meanwhile, although decoded picture flower screen occurs but image still can show continuously.
In prior art, tax one the specifically value that namely conventional fault-tolerant networks still gives corresponding grammer element artificial when code stream is without solution, until having separated this frame, but the grammer element needing decoding is numerous, and dependency may be there is in front and back grammer element, which results in current fault-tolerant networks very complicated, also can take suitable design resource simultaneously, increase design cost.
Summary of the invention
It is an object of the invention to overcome above-mentioned defect, it is provided that a kind of succinct effectively, use the method for realization that hardware resource is few H.264CAVLC decoding and fault tolerance function.
In order to realize above-mentioned purpose, the technical solution used in the present invention is as follows:
A kind of method realizing H.264CAVLC decoding and fault tolerance function, it is characterized in that, in the decoding process of a certain frame, when code stream is without solution, code stream load module abandons residue code stream, then export the fixed value of code stream complete " 1 ... 1 " to decoder module to decode, until this frame decoding completes.
Realize the demoder of the H.264CAVLC method of decoding and fault tolerance function, comprising:
Master control state machine module, is responsible for the decoding process of control decoder module;
Code stream load module, to decoder module input code flow;
Decoder module, performs decoding;
Wherein, being provided with an alternative circuit MUX in described code stream load module, described alternative one of them input terminus of circuit MUX receives the code stream of upper computer input, the fixed value of another input termination code stream complete " 1 ... 1 ".
Further, decoder module comprises: lamella data module, macroblock layer module, macroblock prediction module, sub-macroblock prediction module, residual error data module.
Further, described lamella data module, macroblock layer module, macroblock prediction module, sub-macroblock prediction module and residual error data module all include some syntax element decodes modules, are provided with decoder circuit and check circuit in described syntax element decodes module.
The implementation method of decoder module, wherein, decoder module inside is provided with the syntax element decodes module that some are responsible for each grammer element of decoding, and each syntax element decodes inside modules includes decoder circuit and detection circuit, comprises the following steps:
(1) when the decoder circuit in certain syntax element decodes module runs into code stream without situation about separating, its internal detection circuitry exports decoding and makes mistakes signal and decoded signal again;
(2) decoder circuit of this syntax element decodes inside modules receives decoded signal again, abandons the decodes codeword of current mistake, and resetting decoded state is wait new code stream input decoding;
(3) makeing mistakes after signal when code stream load module receives decoding, by inner code stream alternative circuit, being exported by code stream from true bitstreams switching be the value of " 1 ... 1 " entirely;
(4) decoder circuit of syntax element decodes inside modules receives " 1 ... 1 " code stream again, solves corresponding value, and will decode signal transmission to the decoder module at place;
(5) decoding is completed information and passes to master control state machine by decoder module, and master control state machine is then pressed decoding order and started next decoder module decoding, until this frame code stream decoding completes.
The principle of design of the present patent application is as follows:
H.264 have employed two kinds of modes at entropy code: one is CABAC (counting coding based on the scale-of-two of context-adaptive) and CAVLC (Variable Length Code based on context-adaptive). The present patent application only relates to CAVLC coded system. H.264 content code stream comprises an information, information of forecasting and residual information. The present patent application has only related to the decoded bit stream of head information.
Finding through research, the descriptor that the grammer element that the present patent application need to be separated is corresponding has four classes:
1. fixed length code: f (n), u (n);
2. Columbus encodes ue (v);
3. encode derivative coding such as me (v), se (v), te (v) by Columbus;
4. the elongated entropy code of context-adaptive: ce (v);
Wherein, 1 class descriptor is not existed as shown in Table 1 without solution situation;
When being coded in code stream for " 1 " for 2 class Columbus, decode value (codenum) equals 0;
For 3 class descriptors at code stream for, time " 1 " and when decode value (codenum) equals 0, all having corresponding syntax element value (syntaxelementvalue);
For 4 classes descriptor ce (v) all for residual error decoding, obtain by tabling look-up, find through observing, when code word is complete " 1 ... 1 ", all can table look-up and obtain corresponding syntax element value.
This finds as the CAVLC decoding and fault tolerance of h264 provides a succinct effective method: the decoding of certain grammer element (syntaxelement) makes mistakes without when separating, the code word remaining for this frame stream packet being drawn together this grammer element (syntaxelement) corresponding is all replaced as " 1 ... 1 ", so namely ensures that all grammer elements (syntaxelement) can be separated below. Meanwhile, owing to entropy code eliminates dependency between data, adopt the result that there will not be decoding grammer element inconsistent in this way.
Compared with prior art, the present invention has following useful effect:
When the present invention is based on code stream complete " 1 ... 1 ", the principle that code stream can be separated, when code flows out mistake, code stream is replaced the fixed value for complete " 1 ... 1 ", and other decoder module does not change original design architecture substantially, decoding and fault tolerance function can be realized, while simplifying the algorithm of code stream fault-tolerant processing, effectively save the resource of hardware design, and the application for the commercialization of H.264 demoder has actual value.
Accompanying drawing explanation
Fig. 1 is the functional block diagram of the present invention.
Fig. 2 is the functional block diagram of lamella data decode module.
Fig. 3 is the functional block diagram of macroblock layer decoder module.
Fig. 4 is the functional block diagram of macroblock prediction decoder module.
Fig. 5 is the functional block diagram of sub-macroblock prediction decoder module.
Fig. 6 is the functional block diagram of residual error data decoder module.
Fig. 7 is the functional block diagram of syntax element decodes module.
Fig. 8 is the functional block diagram of code stream load module.
Embodiment
Below in conjunction with embodiment, the invention will be further described, and embodiments of the present invention include but not limited to the following example.
Embodiment
The present embodiment has related generally to the decoding and fault tolerance method of the CAVLC H.264 of head information part, and content comprises information of forecasting and residual information, i.e. the content of grammer table 7.3.4Slicedatasyntax to 7.3.5.3.1ResidualblockCAVLCsyntax.
For gone the CAVLC code stream decoding H.264 of head information without solution in the case of be generally two kinds of situations, one is that the code word that the descriptor (descriptor) that grammer element (syntaxelement) is corresponding is won in code stream does not need to table look-up, but there is span, then show as code stream without solution when result exceeds span. Another kind is that the code word that the descriptor (descriptor) that grammer element (syntaxelement) is corresponding is won in code stream needs to table look-up, and then shows as code stream without solution when code word can not find corresponding value in a lookup table.
For above-mentioned code stream without situation about separating, present embodiments provide a kind of new decoding and fault tolerance method, the principle that the method can be separated based on complete " 1 ... the 1 " code stream of code stream, when code flows out mistake, code stream is replaced the fixed value for complete " 1 ... 1 ", and other decoder module does not change original design architecture substantially, decoding and fault tolerance function can be realized. Compared with prior art, this fault-tolerant networks not only greatly simplifies the algorithm of code stream fault-tolerant processing, and has saved design cost.
The present embodiment additionally provides the demoder adopting above-mentioned fault-tolerant networks, this demoder mainly comprises following functions module: master control state machine module, lamella data decode module (slicedata), macroblock layer decoder module (macroblock_layer), macroblock prediction decoder module (macroblockpredicion), sub-macroblock prediction decoder module (Submacroblockprediction), residual error data decoder module (Residualdata).
As shown in Figure 1, master control state machine module is responsible for controlling the decoding process of five big decoder modules, and they are lamella data decode module (slicedata) respectively, as shown in Figure 2. Macroblock layer decoder module (macroblock_layer), as shown in Figure 3. Macroblock layer prediction decoding module (macroblockpredicion), as shown in Figure 4. Sub-macroblock prediction decoder module (Submacroblockprediction), as shown in Figure 5. Residual error data decoder module (Residualdata), as shown in Figure 6. The information that decoding completed after certain decoder module completes decoding task passes to master control state machine, and master control state machine receives after decoding completes information, is responsible for starting the decoding work of next decoder module, goes round and begins again, until a frame code stream decoding completes.
Above-mentioned five decoder modules inside comprises the submodule block of several syntax element decodes, and they are responsible for the grammer element separated belonging to this decoding layer, specific as follows:
Lamella data decode module, has two syntax element decodes modules, is mb_skip_run submodule block and mb_field_decoding_flag submodule block respectively. Only mb_skip_run submodule block may occur without situation about separating, and sends err0 signal to upper one-level lamella data decode module when decoding without when separating, and lamella data decode module then sends slice_data decoding error signal.
Macroblock layer decoder module, there are three syntax element decodes modules, it is mb_type submodule block respectively, coded_block_pattern submodule block, mb_qp_delta submodule block, these three grammer elements all may occur that err1, err2, err3 information of sending respectively, to upper one-level macroblock layer decoder module, merges into macroblock decoding error signal without situation about separating.
Macroblock prediction decoder module, has five syntax element decodes modules, is prev_intra4x4_pred_mode_flag submodule block respectively, Rem_intra4x4_pred_mode submodule block, Intra_chroma_pred_mode submodule block, Ref_idx_lX submodule block, Mvd_lX submodule block. Wherein only Intra_chroma_pred_mode submodule block, Ref_idx_lX submodule block, Mvd_lX submodule block there will be without solution situation, they send err4 respectively, err5, err6 information, to upper one-level macroblock layer prediction decoding module, merges into macroblock prediction decoding signal error.
Sub-macroblock prediction decoder module, has three syntax element decodes modules, is submb_type submodule block respectively, Ref_idx_lX submodule block, Mvd_lX submodule block. These 3 grammer elements all there will be without solution situation, and they send err7, err8, err9 information respectively to the sub-macroblock layer decoder module of upper one-level, merge into sub_macroblock prediction decoding signal error.
Residual error data decoder module, there are six syntax element decodes modules, it is coeff_token submodule block respectively, Trailing_ones_sign_flag submodule block, level_prefix submodule block, level_suffix submodule block, total_zero submodule block, run_before submodule block. wherein four grammer elements there will be without solution situation, they are coeff_token submodule block respectively, level_prefix submodule block, total_zero submodule block, run_before submodule block, they send err10 respectively, err11, err12, err13 information is to upper one-level residual error layer module, merge into residual data decoding errors signal.
Five decoding error signals of above five big decoder modules are merged into a decoding error signal at top-level module and are given code stream load module.
When code stream without solution time, each syntax element decodes module to code stream without separate handling principle such as Fig. 7, syntax element decodes module comprises decoder circuit and check circuit. Decoder circuit receiving code stream decodes, give check circuit decoded state simultaneously, when code stream is without solution, check circuit is sent decoding and is made mistakes information, send simultaneously and reset decoded signal to decoder circuit, decoder circuit receives after resetting decoded signal, abandons current decoded in error code word, again accepts the new code stream complete " 1 ... 1 " from code stream load module and decodes.
Code stream load module receives and stores the code stream having gone head information from upper computer, and code stream is inputted each decoder module and decodes.
Code stream load module inside is provided with an alternative circuit, and as shown in Figure 8: alternative circuit has two input terminuss, one of them input terminus connects the code stream having gone head information that upper computer is brought, and another input terminus is then fixing constant " 1 ... 1 ". Export the code stream that upper computer is sent here when decoding normal, when receiving the decoding error information stream_error that decoder module is brought, then export fixing constant " 1 ... 1 " and decode to each decoder module.
The decoder circuit of the syntax element decodes inside modules of each decoder module inside receives " 1 ... 1 " code stream again, solves corresponding value, and will decode signal transmission to the decoder module at place. Decoding is completed information and passes to master control state machine by this decoder module, and master control state machine then starts the decoding of another decoder module by decoding order. Until this frame code stream decoding completes.
In order to make those skilled in the art that the present patent application is had understanding more clearly and understanding, illustrate below:
As shown in Figure 3, for the grammer element mb_type decoder module of macroblock layer decoder module inside, when it is " 00111 " according to affiliated descriptor from the code word that code stream load module receives, the decoder circuit of mb_type syntax element decodes inside modules starts decoding.
Because the corresponding descriptor of mb_type is ue (v), namely adopting Columbus's coding, decode value codenum equals 6. When the sheet type slicetype belonging to this yard of stream is Pslice, then see table 2, macroblocktypevalues0to4forPandSPslices. Table look-up it will be seen that when solution Codenum out is greater than 4, mb_type is without solution. At this moment check circuit detects that code word is without solution, namely sends the signal of err_1=1, sends the information again decoded to decoder circuit simultaneously, and mb_type decoder module then abandons code word " 00111 ", the code stream that wait-receiving mode is new again.
Table 2Table7-10-Macroblocktypevalues0to4forPandSPslices
Err1 signal is merged into macroblock decoding error signal and is delivered to top layer by upper previous module macroblock layer decoder module (macroblock_layer), and top layer delivers to code stream load module the decoding error signal after combined signal.
After code stream load module receives decoding error signal=1 signal, the output switching of the alternative circuit exported by code stream is that complete " 1 ... 1 " code stream is sent. When the grammer element mb_type decoder module of macroblock layer decoder module (macroblock_layer) receives code word again for " 1 ", decoder circuit is reworked, decoding it will be seen that solution decode value Codenum out equals 0 according to Columbus, now mb_type has solution.
Hereafter, the remaining code stream of this frame all resets to " 1 ... 1 ", and each decoding element in each decoder module can solve their value according to the code stream of complete " 1 ... 1 ".The code stream making this frame in case of mistakes, still can continue decoding until this frame decoding completes.
According to above-described embodiment, the present invention just can be realized well. What deserves to be explained is; under prerequisite based on above-mentioned principle of design; for solving same technical problem; even if some making on structure basis disclosed in this invention are without substantive change or polishing; the essence of the technical scheme adopted is still the same with the present invention, therefore it also should in protection scope of the present invention.

Claims (5)

1. one kind realizes the method for H.264CAVLC decoding and fault tolerance function, it is characterized in that, in the decoding process of a certain frame, when code stream is without solution, code stream load module abandons residue code stream, then export the fixed value of code stream complete " 1 ... 1 " to decoder module to decode, until this frame decoding completes.
2. realize realizing as claimed in claim 1 the demoder of the H.264CAVLC method of decoding and fault tolerance function, it is characterised in that, comprising:
Master control state machine module, is responsible for the decoding process of control decoder module;
Code stream load module, to decoder module input code flow;
Decoder module, performs decoding;
Wherein, being provided with an alternative circuit MUX in described code stream load module, described alternative one of them input terminus of circuit MUX receives the code stream of upper computer input, the fixed value of another input termination code stream complete " 1 ... 1 ".
3. demoder according to claim 2, it is characterised in that, described decoder module comprises: lamella data module, macroblock layer module, macroblock prediction module, sub-macroblock prediction module, residual error data module.
4. demoder according to claim 3, it is characterized in that, described lamella data module, macroblock layer module, macroblock prediction module, sub-macroblock prediction module and residual error data module all include some syntax element decodes modules, are provided with decoder circuit and check circuit in each syntax element decodes module.
5. the implementation method of demoder as claimed in claim 4, it is characterised in that, comprise the following steps:
(1) when the decoder circuit in certain syntax element decodes module runs into code stream without situation about separating, its internal detection circuitry exports decoding and makes mistakes signal and decoded signal again;
(2) decoder circuit in this syntax element decodes module receives decoded signal again, abandons the decodes codeword of current mistake, and resetting decoded state is wait new code stream input;
(3) makeing mistakes after signal when code stream load module receives decoding, by inner code stream alternative circuit, being exported by code stream from true bitstreams switching be the value of " 1 ... 1 " entirely;
(4) decoder circuit of syntax element decodes inside modules receives " 1 ... 1 " code stream again, solves corresponding value, and will decode signal transmission to the decoder module at place;
(5) decoding is completed information and passes to master control state machine by decoder module, and master control state machine is then pressed decoding order and started next decoder module decoding.
CN201610192994.0A 2016-03-30 2016-03-30 Method for realizing H.264CAVLC decoding fault tolerance function and decoder Pending CN105681801A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111010575A (en) * 2019-12-17 2020-04-14 北京数码视讯科技股份有限公司 Code stream fault tolerance method and device and readable storage medium

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7061410B1 (en) * 2005-07-18 2006-06-13 Lsi Logic Corporation Method and/or apparatus for transcoding between H.264 CABAC and CAVLC entropy coding modes
CN101252685A (en) * 2008-02-22 2008-08-27 华为技术有限公司 Decoding method and apparatus
CN101807975A (en) * 2010-02-05 2010-08-18 浙江大学 Channel coding method for enhancing transmission quality of fountain code on wireless channel
CN104769675A (en) * 2013-03-27 2015-07-08 爱迪德技术有限公司 Data processing

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7061410B1 (en) * 2005-07-18 2006-06-13 Lsi Logic Corporation Method and/or apparatus for transcoding between H.264 CABAC and CAVLC entropy coding modes
CN101252685A (en) * 2008-02-22 2008-08-27 华为技术有限公司 Decoding method and apparatus
CN101807975A (en) * 2010-02-05 2010-08-18 浙江大学 Channel coding method for enhancing transmission quality of fountain code on wireless channel
CN104769675A (en) * 2013-03-27 2015-07-08 爱迪德技术有限公司 Data processing

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111010575A (en) * 2019-12-17 2020-04-14 北京数码视讯科技股份有限公司 Code stream fault tolerance method and device and readable storage medium
CN111010575B (en) * 2019-12-17 2022-08-02 北京数码视讯科技股份有限公司 Code stream fault tolerance method and device and readable storage medium

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Application publication date: 20160615