CN105632907B - A kind of production method of semiconductor devices - Google Patents
A kind of production method of semiconductor devices Download PDFInfo
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- CN105632907B CN105632907B CN201410587117.4A CN201410587117A CN105632907B CN 105632907 B CN105632907 B CN 105632907B CN 201410587117 A CN201410587117 A CN 201410587117A CN 105632907 B CN105632907 B CN 105632907B
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Abstract
The present invention provides a kind of production method of semiconductor devices, including:Substrate is provided, sequentially forms adhesion layer and electrode material layer on the substrate;Form the protective layer for the edge for covering the electrode material layer;Patterned first photoresist layer is formed on the surface of the exposed electrode material layer;Using patterned first photoresist layer and the protective layer as mask, the electrode material layer and adhesion layer are etched, to form electrode;Remove patterned first photoresist layer.Production method according to the present invention, during wet etching, avoid the generation for the adhesion layer at edge and the etch rate of the electrode material layer problem higher than the etch rate at center, therefore weak spot will not be generated at the edge of wafer, lead to stripping electrode, and then improves the yield and performance of device.
Description
Technical field
The present invention relates to technical field of semiconductors, in particular to more particularly to a kind of making side of semiconductor devices
Method.
Background technology
Gold is widely used in the electrical connection material in semiconductor devices due to its excellent transport properties and chemical inertness.
But since adsorptivity of the gold in nonmetallic materials is poor, lead to that thicker gold electrode layer cannot be prepared, to affect electricity
The electrical conduction performance of pole.In addition to this, gold adsorptivity poor on nonmetal film, has also seriously affected the essence to gold electrode
Fining-off is unfavorable for miniaturization of the gold as electrode device.Currently in order to solving the problems, such as that gold electrode adsorptivity is poor, often
When forming gold electrode using micro- synthesis technology process deposits such as magnetron sputtering and vapor deposition, one layer of adhesion layer is formed thereunder
(for example, chromium), to increase the adhesive force between gold electrode and different interfaces.
During prepared by gold electrode, it is also necessary to wet etching is carried out to it, and wet etching is for crystal round fringes
The etch rate of Au/Cr is higher than the etch rate of crystal circle center.Therefore in the weak spot of crystal round fringes, then gold electrode is likely to cause
Stripping, and then influence device performance and yield.
Therefore, it is necessary to propose a kind of production method of new semiconductor devices, to solve the above technical problems.
Invention content
A series of concept of reduced forms is introduced in Summary, this will in the detailed description section into
One step is described in detail.The Summary of the present invention is not meant to attempt to limit technical solution claimed
Key feature and essential features do not mean that the protection domain for attempting to determine technical solution claimed more.
In order to overcome the problems, such as presently, there are, the present invention provides a kind of production method of semiconductor devices, including:
Substrate is provided, sequentially forms adhesion layer and electrode material layer on the substrate;
Form the protective layer for the edge for covering the electrode material layer;
Patterned first photoresist layer is formed on the surface of the exposed electrode material layer;
Using patterned first photoresist layer and the protective layer as mask, the electrode material layer and adherency are etched
Layer, to form electrode;
Remove patterned first photoresist layer.
Further, the material of the adhesion layer is Cr.
Further, the material of the electrode material layer is gold.
Further, the protective layer is annulus shape.
Further, the method for forming the protective layer includes the following steps:
Deposition forms the protected material bed of material on the electrode material layer;
Patterned second photoresist layer is formed on the protected material bed of material, wherein patterned second photoresist layer covers
Cover the fringe region of the protected material bed of material;
Using patterned second photoresist layer as mask, the protective layer material layer is etched until the exposure electrode material
The bed of material, to form the protective layer;
Remove patterned second photoresist layer.
Further, the adhesion layer and electrode material layer are formed using magnetron sputtering technique.
Further, the material of the protective layer is oxide.
Further, the thickness of the protective layer is
Further, further include that deposition formation on the substrate is situated between before forming the adhesion layer and electrode material layer
The step of electric layer.
Further, the adhesion layer and the electrode material layer are performed etching using the method for wet etching.
In conclusion production method according to the present invention avoids the adhesion layer for edge during wet etching
The generation of the problem higher than the etch rate at center with the etch rate of electrode material layer, therefore will not be generated at the edge of wafer thin
Weakness leads to stripping electrode, and then improves the yield and performance of device.
Description of the drawings
The following drawings of the present invention is used to understand the present invention in this as the part of the present invention.Shown in the drawings of this hair
Bright embodiment and its description, principle used to explain the present invention.
In attached drawing:
Figure 1A -1D show that the manufacture craft of existing gold electrode implements the diagrammatic cross-section of obtained device successively;
Fig. 2A -2G show the diagrammatic cross-section of the embodiment of the invention the obtained device of implementation steps successively;
Fig. 3 shows the process flow chart of embodiment of the invention implementation steps successively.
Specific implementation mode
In the following description, a large amount of concrete details are given in order to provide more thorough understanding of the invention.So
And it is obvious to the skilled person that the present invention may not need one or more of these details and be able to
Implement.In other examples, in order to avoid with the present invention obscure, for some technical characteristics well known in the art not into
Row description.
It should be understood that the present invention can be implemented in different forms, and should not be construed as being limited to propose here
Embodiment.Disclosure will be made thoroughly and complete on the contrary, providing these embodiments, and will fully convey the scope of the invention to
Those skilled in the art.In the accompanying drawings, for clarity, the size and relative size in the areas Ceng He may be exaggerated.From beginning to end
Same reference numerals indicate identical element.
It should be understood that when element or layer be referred to as " ... on ", " with ... it is adjacent ", " being connected to " or " being coupled to " other members
When part or layer, can directly on other elements or layer, it is adjacent thereto, be connected or coupled to other elements or layer, or
There may be elements or layer between two parties.On the contrary, when element is referred to as " on directly existing ... ", " with ... direct neighbor ", " is directly connected to
To " or " being directly coupled to " other elements or when layer, then element or layer between two parties is not present.Art can be used although should be understood that
Language first, second, third, etc. describes various component, assembly units, area, floor and/or part, these component, assembly units, area, floor and/or portion
Dividing should not be limited by these terms.These terms are used merely to distinguish a component, assembly unit, area, floor or part and another
Component, assembly unit, area, floor or part.Therefore, do not depart from present invention teach that under, first element discussed below, component, area,
Floor or part are represented by second element, component, area, floor or part.
Spatial relationship term for example " ... under ", " ... below ", " below ", " ... under ", " ... on ",
" above " etc., herein can for convenience description and being used describe an elements or features shown in figure with it is other
The relationship of elements or features.It should be understood that other than orientation shown in figure, spatial relationship term intention further include using and
The different orientation of device in operation.For example, if the device in attached drawing is overturn, then, it is described as " below other elements "
Or " under it " or " under it " elements or features will be oriented in other elements or features "upper".Therefore, exemplary term
" ... below " and " ... under " it may include upper and lower two orientations.Device, which can be additionally orientated, (to be rotated by 90 ° or other takes
To) and spatial description language as used herein correspondingly explained.
The purpose of term as used herein is only that description specific embodiment and not as the limitation of the present invention.Make herein
Used time, " one " of singulative, "one" and " described/should " be also intended to include plural form, unless context is expressly noted that separately
Outer mode.It is also to be understood that term " composition " and/or " comprising ", when being used in this specification, determines the feature, whole
The presence of number, step, operations, elements, and/or components, but be not excluded for one or more other features, integer, step, operation,
The presence or addition of component, assembly unit and/or group.Herein in use, term "and/or" includes any of related Listed Items and institute
There is combination.
In order to thoroughly understand the present invention, detailed step will be proposed in following description, to illustrate proposition of the present invention
Technical solution.Presently preferred embodiments of the present invention is described in detail as follows, however other than these detailed descriptions, the present invention can be with
With other embodiment.
The production method of existing gold electrode is made a brief description below with reference to Figure 1A -1D.
First, as shown in Figure 1A, substrate 100 is provided, deposition forms dielectric layer 101 in the substrate 100.The substrate
100 be Silicon Wafer.
Then, as shown in Figure 1B, adhesion layer and electrode material layer 102 are sequentially formed on the dielectric layer 101.It is described viscous
Attached layer is Cr, and the electrode material layer is Au.
Then, as shown in Figure 1 C, patterned photoresist layer 103 is formed on the electrode material layer 102.
Then, as shown in figure iD, it is mask with the patterned photoresist layer 103, using the method for wet etching to institute
It states electrode material layer and adhesion layer performs etching, to form gold electrode 102a.In this step, for the Au/Cr of crystal round fringes
Etch rate it is higher than the etch rate of crystal circle center.Therefore in the weak spot of crystal round fringes, then the stripping of gold electrode is likely to cause
From, and then influence the performance and yield of device.
Presence in view of the above problems, the present invention propose a kind of new production method.
[Shi Lixingshishili ]
The production method of the gold electrode of the present invention is described in detail below with reference to Fig. 2A -2G and Fig. 3.
First, as shown in Figure 2 A, substrate 200 is provided, deposition forms dielectric layer 201 in the substrate 200.
The substrate 200 can be any semi-conducting material containing silicon, such as Silicon Wafer, or substrate of glass,
Substrate or single crystal substrates with nonmetal film material etc..
The material of the dielectric layer 201 can be silica (SiO2) or silicon oxynitride (SiON).This field may be used
Oxidation technology such as furnace oxidation, rapid thermal annealing oxidation (RTO), steam oxidation (ISSG) in situ known by technical staff
The dielectric layer of equal formation oxidation silicon material.Silicon oxynitride can be formed by executing nitriding process to silica, wherein the nitriding process
Can be high temperature furnace pipe nitridation, rapid thermal annealing nitridation or pecvd nitride, it is, of course, also possible to using other nitridation works
Skill, which is not described herein again.
Then, as shown in Figure 2 B, adhesion layer and electrode material layer 202 are sequentially formed on the dielectric layer 201.
For simplicity, adhesion layer and electrode material layer are only shown with one layer, it is conceivable that adhesion layer and electrode material
The bed of material can be the film layer of two kinds of different materials, and adhesion layer is located at the lower section of electrode material layer.
The formation process for forming the adhesion layer and the electrode material layer 202 may be used known to those skilled in the art
Any prior art, such as:The techniques such as electron beam evaporation plating, chemical vapor deposition, magnetron sputtering or physical vapour deposition (PVD).This reality
It applies in example, preferably selects magnetron sputtering.
Optionally, the material of the adhesion layer is Cr, and the electrode material layer is Au.Illustratively, the adhesion layer
Thickness isThe thickness of the electrode material layer isAbove-mentioned thickness range be only illustratively,
It can be adjusted according to actual conditions.
In one example, substrate is put into more targets to splash altogether in magnetron sputtering cavity, metal is installed on a sputtering target
Chromium target installs gold target material on a sputtering target.First metal chromium target is sputtered, formation predetermined thickness (for example,) layers of chrome as adhesion layer.Gold target material is sputtered again, formation predetermined thickness (for example,) layer gold
As electrode material layer.
Then, as shown in Figure 2 C, deposition forms the protected material bed of material 203 on the electrode material layer 202.
The protected material bed of material 203 may include any type of several dielectric substances.Non-limiting examples include oxide,
Nitride and nitrogen oxides, especially, oxide, nitride and the nitrogen oxides of silicon, but include other elements oxide,
Nitride and nitrogen oxides.Preferably, the protected material bed of material is oxide.Optionally, the thickness of the protected material bed of material 203
It is 500~1500 angstroms.It can use and include but not limited to:The method shape of chemical vapor deposition method and physical gas-phase deposite method
At the protected material bed of material 203.
Then, as shown in Figure 2 D, patterned second photoresist layer 204, wherein institute are formed on the protected material bed of material 203
State the fringe region that patterned second photoresist layer 204 covers the protected material bed of material 203.Fig. 2 D left figures are diagrammatic cross-section,
Fig. 2 D right figures are vertical view, and patterned second photoresist layer 204 is in circular ring shape it can be seen from vertical view, covers the protection
The fringe region of material layer 203.But it is not limited merely to annulus shape, it can be according to the shape of substrate or electrode material layer
Difference, such as when substrate is rectangular, then electrode material layer is also rectangular, correspondingly, positioned at patterned the of edge surrounding
Two photoresist layers can be block form.
Then, as shown in Figure 2 E, it is mask with patterned second photoresist layer 204, etches the protected material bed of material
203 until the exposure electrode material layer 202, to form the protective layer 203a for the edge for covering the electrode material layer.
Specifically, the etching to the protected material bed of material 203 can select dry etching or use wet method
Etching.Dry etching can use the anisotropic etching method based on carbon fluoride gas.Wet etching can use hydrofluoric acid molten
Liquid, such as hydrofluoric acid buffer solution (buffer solution of hydrofluoric acid (BHF)) or buffer oxide
Etching agent (buffer oxide etchant (BOE)).In this implementation, preferably use wet method lithography to the protected material bed of material
203 perform etching.
Illustratively, when the substrate is round (for example, Silicon Wafer), the protective layer is annulus shape.But not
It is only limitted to annulus shape, can also be other square frame-shapeds or polygonal annular, be specifically dependent upon the shape of electrode material layer.
After forming the protective layer 203a, patterned second photoresist layer is removed.Those skilled in the art can be used
Well known any applicable method removes patterned second photoresist layer, such as cineration technics etc..
Then, as shown in Figure 2 F, patterned first photoresist is formed on the surface of the exposed electrode material layer 202
Layer 205.Patterned first photoresist layer 205 defines the pattern for having electrode.
Then, as shown in Figure 2 G, using patterned first photoresist layer 205 and protective layer 203a as mask, institute is etched
Adhesion layer and electrode material layer 202 are stated, to form electrode 202a.
Optionally, the thickness of first photoresist layer is 20000~60000 angstroms.Definition, which can be used, covering for electrode pattern
After the first photoresist layer of diaphragm plate pair is exposed and develops, patterned first photoresist layer 205 is formed.
Illustratively, the adhesion layer and electrode material layer 202 are performed etching using the method for wet etching.At one
In example, when the adhesion layer is Cr, and electrode material layer is Au, the solution of the wet etching is chloroazotic acid, or packet
Include the solution of I2 and KI.During wet etching, due to patterned first photoresist layer 205 and protective layer 203a collectively as
Mask avoids the hair for the adhesion layer at edge and the etch rate of the electrode material layer problem higher than the etch rate at center
It is raw, therefore defect will not be generated at the edge of wafer, lead to stripping electrode problem.
Further include the steps that removal patterned first photoresist layer and protective layer later, therefore not to repeat here.
In conclusion production method according to the present invention avoids the adhesion layer for edge during wet etching
The generation of the problem higher than the etch rate at center with the etch rate of electrode material layer, therefore will not be generated at the edge of wafer thin
Weakness leads to stripping electrode, and then improves the yield and performance of device.
With reference to Fig. 3, the flow chart for the step of implementing successively according to the method for the embodiment of the present invention is shown, for letter
The flow of entire manufacturing process is shown.
In step 301, substrate is provided, sequentially forms adhesion layer and electrode material layer on the substrate;
In step 302, the protective layer for the edge for covering the electrode material layer is formed;
In step 303, patterned first photoresist layer is formed on the surface of the exposed electrode material layer;
In step 304, using patterned first photoresist layer and the protective layer as mask, the electrode material is etched
The bed of material and adhesion layer, to form electrode;
In step 305, patterned first photoresist layer is removed.
The present invention is illustrated by above-described embodiment, but it is to be understood that, above-described embodiment is only intended to
The purpose of citing and explanation, and be not intended to limit the invention within the scope of described embodiment.In addition people in the art
It is understood that the invention is not limited in above-described embodiment, introduction according to the present invention can also be made more kinds of member
Variants and modifications, these variants and modifications are all fallen within scope of the present invention.Protection scope of the present invention by
The appended claims and its equivalent scope are defined.
Claims (8)
1. a kind of production method of semiconductor devices, including:
Substrate is provided, sequentially forms adhesion layer and electrode material layer on the substrate, the material of the electrode material layer is gold,
The material of the adhesion layer is Cr;
Form the protective layer for the edge for covering the electrode material layer;
Patterned first photoresist layer is formed on the surface of the exposed electrode material layer;
Using patterned first photoresist layer and the protective layer as mask, the electrode material layer and adhesion layer are etched, with
Form electrode;
Remove patterned first photoresist layer.
2. manufacturing method according to claim 1, which is characterized in that the protective layer is annulus shape.
3. manufacturing method according to claim 1, which is characterized in that the method for forming the protective layer includes following step
Suddenly:
Deposition forms the protected material bed of material on the electrode material layer;
Patterned second photoresist layer is formed on the protected material bed of material, wherein patterned second photoresist layer covers institute
State the fringe region of the protected material bed of material;
Using patterned second photoresist layer as mask, the protective layer material layer is etched until the exposure electrode material
Layer, to form the protective layer;
Remove patterned second photoresist layer.
4. manufacturing method according to claim 1, which is characterized in that using magnetron sputtering technique formed the adhesion layer and
Electrode material layer.
5. manufacturing method according to claim 1, which is characterized in that the material of the protective layer is oxide.
6. manufacturing method according to claim 1, which is characterized in that the thickness of the protective layer is
7. manufacturing method according to claim 1, which is characterized in that formed the adhesion layer and electrode material layer it
Before, further include the steps that deposition forms dielectric layer on the substrate.
8. manufacturing method according to claim 1, which is characterized in that using the method for wet etching to the adhesion layer and
The electrode material layer performs etching.
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Citations (3)
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CN1118110A (en) * | 1994-06-22 | 1996-03-06 | Lg电子株式会社 | Method of forming metal thin film of semiconductor device |
JP2000299559A (en) * | 1999-04-12 | 2000-10-24 | Fujitsu Ten Ltd | Power module substrate |
CN101916722A (en) * | 2010-07-23 | 2010-12-15 | 上海宏力半导体制造有限公司 | Method for preventing metallic coatings at edges of wafers from peeling |
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US20050014364A1 (en) * | 2003-07-18 | 2005-01-20 | Infineon Technologies North America Corp. | Method of suppressing the effect of shining spots present at the edge of a wafer |
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Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1118110A (en) * | 1994-06-22 | 1996-03-06 | Lg电子株式会社 | Method of forming metal thin film of semiconductor device |
JP2000299559A (en) * | 1999-04-12 | 2000-10-24 | Fujitsu Ten Ltd | Power module substrate |
CN101916722A (en) * | 2010-07-23 | 2010-12-15 | 上海宏力半导体制造有限公司 | Method for preventing metallic coatings at edges of wafers from peeling |
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