CN105631127A

CN105631127A - Automatic replacing method for FPGA-to-ASIC memorizer

Info

Publication number: CN105631127A
Application number: CN201511003139.2A
Authority: CN
Inventors: 谷佳华; 张勇; 常迎辉; 曾明; 田素雷; 杨松芳; 杨振学
Original assignee: CETC 54 Research Institute
Current assignee: CETC 54 Research Institute
Priority date: 2015-12-28
Filing date: 2015-12-28
Publication date: 2016-06-01

Abstract

The invention discloses an automatic replacing method for an FPGA-to-ASIC memorizer. The method comprises the steps that an FPGA memorizer model is searched for; the type of the memorizer is confirmed; a target process database is correlated; the FPGA memorizer model is replaced with a target process database memorizer model; the replacing process of the memorizer model is corrected; an ASIC substitutive memorizer model is output; functional verification is carried out. According to the method, the process of replacing the FPGA memorizer model with the ASIC memorizer model is achieved automatically and fast, manpower cost is reduced, and the problem that the error rate of manual intervention is high is solved.

Description

A kind of FPGA turns ASIC memory automatization replacement method

Technical field

The present invention relates to a kind of storer automatization replacement method, particularly relate to a kind of FPGA and turn ASIC memory automatization replacement method, belong to integrated circuit (IC) design technical field.

Background technology

After using complicated programmable logic device part (CPLD) and Field Programmable Logic Array (FPGA) to carry out functional verification at present, realizing application specific integrated circuit (ASIC) design again is one of the most popular mode, their general character all has user's field-programmable characteristic, all supports boundary scan technique; But both have respective feature on integrated level, speed and programming mode. And the feature of ASIC is the demand towards specific user, wide in variety, few in batches, require that design is with short production cycle, the product that it is combined closely as complete machine or the system technology of integrated circuit technique and specific user, has the advantages such as volume is less, power consumption is lower, reliability raising, performance raising, confidentiality enhancing, cost reduction compared with FPGA. Therefore, utilize FPGA field-programmable characteristic, after first function module being carried out hardware checking, and then realize ASIC chip and become a kind of fashion trend.

For each the function module realized, storer (Memory) is an essential part. Owing to the storer model in FPGA is different from the storer model in ASIC, therefore realizing FPGA and turn in ASIC design flow, the replacement of storer also becomes the work of a repeatability and necessity by emulation assurance function consistence. Along with the integrated level of circuit layout is more and more higher, the replacement work of storer is more and more various, therefore urgently needing to find a kind of efficient method and solve the replacement work realizing storer in process, assurance function consistence, makes a large amount of repetitive operation complete rapidly and accurately simultaneously.

Summary of the invention

Technical problem to be solved by this invention turns ASIC memory automatization replacement method at a kind of FPGA of offer.

For solving above-mentioned technical field, the technical solution used in the present invention is:

A kind of FPGA turns ASIC memory automatization replacement method, comprises following concrete steps:

Step 1: search FPGA storer model: search the source file calling FPGA storer model in hardware description language file;

Step 2: confirm type of memory: obtain storer model parameter from the source file of the described FPGA of calling storer model, determine type of memory according to described storer model parameter;

Step 3: associated objects technology library: target setting technology library can the path of execute file;

Step 4: storer model is replaced: calls the shell script corresponding with described FPGA type of memory and is replaced by described storer model;

Step 5: revise storer model alternative Process: according to the supplementary correction storer model alternative Process performing window display;

Step 6: export ASIC and substitute storer model;

Step 7: functional verification: the input port that identical Random Test Stimulus is loaded into storer model, by comparing whether Output rusults unanimously judges that whether replacement process is accurate.

In described step 6, during output file, port title and the described FPGA storer model of described replacement ASIC memory model are consistent, and the storer model of module title and FPGA is inconsistent, and naming rule is the form of FPGA model name+asic.

The useful effect adopting technique scheme to bring is:

1. the present invention can realize replacement that FPGA storer model conversion is ASIC memory model and checking work automatically, reduces cost of labor, it is to increase working efficiency;

2. the present invention is in the process of ASIC memory model in FPGA storer model conversion, it is possible to accurately complete the replacement of storer model, reduces the mistake that manual intervention is introduced.

Accompanying drawing explanation

Fig. 1 is the schema of the present invention.

Embodiment

Embodiment 1:

As shown in Figure 1, a kind of FPGA turns ASIC memory automatization replacement method, comprises following concrete steps:

Step 6: export ASIC and substitute storer model;

In the present embodiment, running script fpga2asicxx, xx is folder title, searches in hardware description language (HardwareDescriptionLanguage) file with the file calling FPGA storer model altsyncram character string.

Type of memory has three kinds: single port RAM (spram), two-port RAM (dpram) and ROM; When after the storer model file confirming FPGA, Automatically invoked fpga2asic.pl script, calculating address port and input data port number, and judge type of memory according to address port number and input port number: 1 address port, 0 input data port is ROM; 1 address port, 1 input data port is spram; 2 address ports, 2 input data ports are dpram.

As required, intended target technology library MemoryCompiler can the path of execute file, support the target process storehouse of Duo Jia technique manufacturer, various features size.

Difference according to type of memory, script fpga2asic.pl selectivity call dpram_gen.pl, spram_gen.pl, rom_gen.pl one of them, complete the replacement of FPGA storer model to target process storehouse memorizer model; In this process, script file is also by the storer model encapsulation crust of ASIC so that it is keep consistent with module name and the port name of code in FPGA, it is achieved the seamless replacement of storer model.

In this process, print supplementary and to help to understand and improve the replacement process of storer model by the current window that performs; As: do not have the storer model file will print error message under catalogue; For larger storer model, if Aspect Ratio is inharmonious, warning message will be printed and require adjustment Aspect Ratio, avoid that storer deformity situation occurs.

Except exporting the HDL code after encapsulating, also export lib, lef, cdl, gds and test and excitation (testbench) file of storer; ASIC memory model code after having replaced is unified to be placed in mem_gen_asic folder, and the storer model of module and port title and FPGA is consistent, as the HDL code of ASIC version; Simultaneously, ASIC memory model code after having replaced also will be put in mem_gen_sim folder, the storer model of port title and FPGA is consistent, the storer model of module title and FPGA is inconsistent, naming rule is the form of FPGA model name+asic, for distinguishing two kinds of storer models in step S7;

After output file completes, Automatically invoked func_sim script carries out simulating, verifying; In testbench file, identical Random Test Stimulus is loaded into the input port of storer model, judges that whether replacement process is accurate by comparing Output rusults; Function unanimously prints " TestPass ", and function is inconsistent then prints " TestFail ".

The present invention, by searching the mode of storer model keyword under catalogue, record storage title, type of memory, port information and size, judges type of memory according to acquisition address port numbers amount and input port number. Then invocation target storehouse MemoryCompiler software, by the Data Enter of record, generates corresponding ASIC memory model.

In processing of documents script, main use BASH and PERL language, it is possible to simultaneously realize the batch processing mode that multiple storer is replaced.

The foregoing is only a kind of enforcement mode specifically of the present invention. Protection scope of the present invention is not limited thereto, and any is familiar with those skilled in the art in the technical scope that the present invention discloses, the change that can expect easily or replacement, all should be encompassed within protection scope of the present invention.

Claims

1. a FPGA turns ASIC memory automatization replacement method, it is characterised in that comprise the following steps:

Step 4: storer model is replaced: call the shell script corresponding with described FPGA type of memory and described FPGA storer model is replaced for target process storehouse memorizer model;

Step 6: export ASIC and substitute storer model;

2. a kind of FPGA according to claim 1 turns the method that ASIC memory automatization is replaced, it is characterized in that: in described step 6, during output file, port title and the described FPGA storer model of described replacement ASIC memory model are consistent, the storer model of module title and FPGA is inconsistent, and naming rule is the form of FPGA model name+asic.