CN105607694B - Self-adapting changeable redundancy 3U signal processing backboards based on VPX buses - Google Patents
Self-adapting changeable redundancy 3U signal processing backboards based on VPX buses Download PDFInfo
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- CN105607694B CN105607694B CN201510698356.1A CN201510698356A CN105607694B CN 105607694 B CN105607694 B CN 105607694B CN 201510698356 A CN201510698356 A CN 201510698356A CN 105607694 B CN105607694 B CN 105607694B
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Abstract
The invention discloses a kind of dual redundant 3U signal processing backboards based on VPX buses, the dual redundant point-to-point interconnection of high-speed data is realized by 2 road SRIOx4 and 2 road PCIex1, the dual redundant point-to-point interconnection of control command is realized by 2 road 1GE x1, the data interaction between two main control switchboards is realized by 2 road SRIOx4 and 2 road 1GEx1, realizes the Hot Spare of whole system.Entire signal processing backboard topological structure can handle the demand of task according to current demand signal, and the board value volume and range of product supported backboard is extended, thus, there is extraordinary autgmentability and flexibility, can adapt to the trend of current aerospace field development.
Description
Technical field
The invention belongs to digital signal processing technique fields, more specifically, are related to a kind of based on the adaptive of VPX buses
Redundancy 3U signal processing backboards should be can be changed.
Background technology
With the rapid development of Digital Signal Processing and embedded computer technology, in aerospace field, to flying
Steel structure (especially bus architecture), process performance, data throughput rate and the volume of row device information system payload platform
Miniaturization, robustness and output power etc. propose more stringent requirement, need payload platform have higher unfailing performance,
Broader bus bandwidth and more flexible data exchange capability.
A variety of core bus topological structures including CAN, CPCI and VME are applied to aircraft information system load
In platform, to realize that the integrated information under the conditions of aircraft payload bearing capacity is strictly limited is handled.However, based on tradition
Being classified the backboard topological structure (such as CPCI, VME platform) of shared parallel bus, to be limited to Bus Clock Rate, bus interface wide
Degree and carrying load ability, determine that its Scalable Performance is weaker, data transmission capabilities are poor, cannot be satisfied new demand.
VPX is that the next generation to meet high reliability under adverse circumstances, high bandwidth requirement that is organized to set up by VITA is high
Grade computing platform standard, is the revolutionary innovation and development of VME technologies, has high transmission bandwidth, transmission reliability height, interconnection architecture
The features such as flexibly configurable.VPX intermodules define SRIO (Serial RapidIO), PCIe (PCI Express),
Three kinds of high-speed serial bus such as 10GbEthernet, meet the high-speed data communication demand under different application.Meanwhile VPX is used
The bus bar structure of alteration switch formula replaces the main control type structure of VME so that systematic entirety can not be limited by master control borad.
In addition, VPX also supports fault-tolerant, reconstruct and interconnection extended ability, complying with standard, generalization, modularization, expansible design to need
It asks.
Although being the developing direction of future aircraft information system payload platform, VPX buses based on VPX bus protocols
Only mechanical structure, data transmission plane and power supply mode etc. are defined in agreement, do not account for system redundancy
Problem causes its functional reliability under the conditions of extreme environment to be difficult to ensure.
Invention content
It is an object of the invention to overcome the deficiencies of the prior art and provide a kind of self-adapting changeable based on VPX buses is superfluous
Remaining 3U signal processings backboard, while providing multichannel, multi-protocols high speed data transfer and large copacity power supply supply, by each
The dual redundant design of a plane makes backboard have high unfailing performance.
For achieving the above object, a kind of self-adapting changeable redundancy 3U signal processings back of the body based on VPX buses of the present invention
Plate, which is characterized in that including：14 standard cell positions can support 6 feature boards, 2 main control switchboards, 2 memory planes, 1 master
Power panel and 1 standby electricity source plate；
Wherein, in 14 standard cell positions, the 1st to the 6th slot position is function board slot position；7th to the 10th slot position
For main control switchboard slot position, and each main control switchboard occupies 2 standard cell positions；11st and the 12nd slot position is storage board slot
Position；13rd slot position is main power board slot position；14th slot position is stand-by power supply board slot position；
The physics of described 14 standard cell interdigits interconnection and logical channel by universal plane, management plane, data plane,
Control plane and extension 5 planes of plane are constituted；
Wherein, in universal plane, main power board provides power supply for each slot position, when main power board breaks down, by
Standby electricity source plate provides power supply for each slot position；Main control switchboard provides reset signal, reference clock and address for each slot position
Configure signal；
In management plane, 2 main control switchboards are respectively that each slot position provides 1 road intelligent platform management channel, and leads to
It crosses this channel monitoring and feeds back the temperature of each slot position board, voltage；
In the dataplane, 2 main control switchboards are respectively that each function board slot position 1 road SRIOx4 high-speed datas of offer are logical
Road and 1 road PCIex1 high-speed data accessory channels, realize the high-speed data communication of each slot interdigit；
In the control plane, 2 main control switchboards are respectively that each function board slot position 1 road 1GEx1 High-speed Controls of offer are logical
Road, main control switchboard control each feature board by each plane bus resource utilization power of this channel monitoring backboard
Order dynamic load and logical resource on-line reorganization, and receive the dynamic parameter that each feature board uploads；
In extending plane, each function board slot position is interconnected by cyclic annular high-speed data channel between 2 road SRIOx4 plates, is realized
The immediate data of the feature board of 2 adjacent slot positions interacts.
What the goal of the invention of the present invention was realized in：
The present invention is based on the self-adapting changeable redundancy 3U signal processing backboards of VPX buses, pass through 2 road SRIOx4 and 2 tunnels
PCIex1 realizes the dual redundant point-to-point interconnection of high-speed data, and the dual redundant point of control command is realized by 2 road 1GE x1
To an interconnection, in the dual redundant bus design of each Planar realization in addition to universal plane；Pass through 2 road SRIOx4 and 2 tunnels
1GEx1 carries out data interaction between two main control switchboards, realizes the Hot Spare of main control switchboard；Secondly, the present invention is gone back
The demand of task can be handled according to current demand signal, the board value volume and range of product supported backboard is extended, thus, have non-
Often good autgmentability and flexibility can adapt to the trend of current aerospace field development.
Meanwhile the present invention is based on the self-adapting changeable redundancy 3U signal processings backboards of VPX buses also to have below beneficial to effect
Fruit：
(1), signal processing backboard of the present invention can handle the demand of task, the board supported backboard according to current demand signal
Value volume and range of product is extended, and meets generalization, expansible design requirement.
(2), the present invention establishes core bus monitoring resource channel in the control plane, can be according to the bus of different task
Resource requirement dynamic adjusts the redundancy of each plane bus, and bus resource is made to obtain optimization collocation, is ensureing system reliability
While, improve flexibility and the working efficiency of system.
Description of the drawings
Fig. 1 is the self-adapting changeable redundancy 3U signal processing backboard topological structure figures based on VPX buses；
Fig. 2 is the interface diagram of feature board；
Fig. 3 is the interface diagram of main control switchboard；
Fig. 4 is the interface diagram of memory plane.
Specific implementation mode
The specific implementation mode of the present invention is described below in conjunction with the accompanying drawings, preferably so as to those skilled in the art
Understand the present invention.Requiring particular attention is that in the following description, when known function and the detailed description of design perhaps
When can desalinate the main contents of the present invention, these descriptions will be ignored herein.
Embodiment
For the convenience of description, first being illustrated to the relevant speciality term occurred in specific implementation mode：
VPX：It is organized in by VITA (VME International Trade Association, VME international trade associations)
The high-speed serial bus standard of new generation proposed on its VME bus foundation for 2007；
3U：3U is a kind of board dimensional standard specified in VPX agreements；
DP(Data Plane)：Data plane；
CP(Control Plane)：Control plane；
EP(Expansion Plane)：Extend plane；
MP(Management Plane)：Management plane；
UP(Utility Plane)：Universal plane；
SRIO(Serial RapidIO)：A kind of high-speed serial bus；
PCIe(Peripheral Component Interconnect Express)：Peripheral equipment interconnection；
1GE(1Gb Ethernet)：Gigabit Ethernet；
LVDS(Low-Voltage Differential Signal)：Low-voltage differential signal；
FMC(FPGA Mezzanine Card)：FPGA interlayer cards；
Fig. 1 is the self-adapting changeable redundancy 3U signal processing backboard topological structure figures based on VPX buses.
In the present embodiment, the self-adapting changeable redundancy 3U signal processing backboards based on VPX buses, meet ANSI/VITA
65-2010 OpenVPX standards, 46 VPX standards of ANSI/VITA and ANSI/VITA48 VPX standards；Using 3U height dimensions
Standard, separation 1pitch.With reference to Fig. 1, the present invention is described in detail.
As shown in Figure 1, the present invention is based on the self-adapting changeable redundancy 3U signal processing backboards of VPX buses, including：14 marks
Quasi- slot position can support 6 feature boards, 2 main control switchboards, 2 memory planes, 1 main power board and 1 standby electricity source plate；
Wherein, in 14 standard cell positions, the 1st to the 6th slot position is function board slot position, and the interface definition of feature board is as schemed
Shown in 2, compatible SLT3-PAY-2F1F2U-14.2.1, SLT3-PAY-2F2U-14.2.3 and SLT3-PAY-2F4F2U-
14.2.11 standard；
In the present embodiment, as shown in Fig. 2, providing 2 SRIOx4 and 2 PCIex1 high-speed data channels in data plane
Interface provides 2 1GEx1 High-speed Control channel interfaces in control plane, and 2 SRIOx4 adjacent slots positions height are provided expanding plane
Fast interconnecting channels interface；
7th to the 10th slot position is main control switchboard slot position, and each main control switchboard occupies 2 standard cell positions, master control
2 interfaces of power board define as shown in figure 3, corresponding with SLT3-SWH-6F6U-14.4.1 standards and SLT3-PAY-2F2U-
14.2.3 standard；
In the present embodiment, as shown in figure 3, providing 6 SRIOx4 high-speed data channels interfaces and 6 in data plane
PCIex1 high-speed data channel interfaces provide 6 1GEx1 High-speed Control channel interfaces, respectively 6 feature boards in control plane
Slot position provides the high-speed data point-to-point interconnection based on SRIOx4 and PCIex1 and the control command point-to-point based on 1GE x1 is mutual
Connection；Meanwhile 2 main control switchboards carry out data interaction by 2 SRIOx4 interfaces and 2 1GE x1 interfaces, realize that master control is handed over
Change the Hot Spare of plate；In addition, each main control switchboard also provides 2 SATAIII memory interfaces, each storage port is separately connected
1 storage board slot position；
11st and the 12nd slot position is storage board slot position, and the interface of memory plane defines as shown in figure 4, meeting SLT3-STO-
2U-14.5.1 standards, each memory plane provide 2 SATAIII memory interfaces, and providing storage for main control switchboard supports；
13rd slot position is main power board slot position, and the 14th slot position is stand-by power supply board slot position, and two power panels meet
62 standards of ANSI/VITA.
Wherein, in 6 function board slot positions and 4 main control switchboard slot positions, user can draw from self-defined pin
It is several to LVDS differential signals and single-ended signal, and outlet after being realized by 4 XMC connectors and 1 FMC connector, to
Realize the interconnection with external signal；
In 14 slot positions, only 4 main control switchboard slot positions need the main control switchboard for being inserted into customization, remaining slot position equal
The VPX COTS module products for the standard of can be inserted into, entire signal processing backboard can handle the demand of task according to current demand signal,
The board value volume and range of product supported backboard is extended；
2 main control switchboards employed in the present embodiment support 2 road SATAIII storage ports, each storage port point
It Lian Jie not 1 storage board slot position.
When with reference to dual redundant 3U signal processing backboard normal operations, the workflow of 14 standard cell positions is retouched
It states.
The physics and logical channel interconnected in 14 standard cell interdigits is by universal plane (Utility Plane, UP), management
Plane (Management Plane, MP), data plane (Data Plane, DP), control plane (Control Plane, CP)
It is constituted with 5 planes of extension plane (Expansion Plane, EP)；
Wherein, universal plane provides most basic service for each slot position, such as：Main power board provides electricity for each slot position
Source, such as 3.3V, 5V and 12V；When main power board breaks down, power supply is provided for each slot position by standby electricity source plate；And master control
Power board provides the system signals such as reset signal, reference clock, address configuration signal for each slot position；
In management plane, 2 main control switchboards are respectively that each slot position provides 1 road intelligent platform management channel, and leads to
It crosses this channel monitoring and feeds back the working conditions such as temperature, the voltage of each slot position board；
In the dataplane, 2 main control switchboards are respectively that each function board slot position 1 road SRIOx4 high-speed datas of offer are logical
Road and 1 road PCIex1 high-speed data accessory channels, realize the high-speed data communication of each slot interdigit；
In the control plane, 2 main control switchboards are respectively that each function board slot position 1 road 1GEx1 High-speed Controls of offer are logical
Road；Main control switchboard controls each feature board by each plane bus resource utilization power of this channel monitoring backboard
Order dynamic load and logical resource on-line reorganization, while receiving the dynamic parameter that each feature board uploads；
In extending plane, each function board slot position is interconnected by cyclic annular high-speed data channel between 2 road SRIOx4 plates, is realized
The immediate data of the feature board of 2 adjacent slot positions interacts.
In 5 planes, in addition to universal plane, other planes are all made of dual redundant bus design, and can be according to currently holding
The complexity and bus load of row task change, and under the premise of ensureing system reliability, adaptively dynamically adjust each plane
The redundancy of middle bus, optimization bus resource configuration, improves data transmission efficiency；
It in backboard data plane, control plane, expands in plane and management plane, the high speed data transfer of identical function is logical
Road is respectively provided with two groups, while the dynamic dispatching of pending task is realized using multi-queue feedback mechanism, builds in the control plane
Bus resource utilization rate monitoring channel has been stood, the redundancy of each plane bus is adjusted according to the bus resource demand dynamic of different task
Degree；
When the complexity of system task is relatively low, when bus load is smaller, retain each plane high speed data transfer of backboard channel
Dual redundant, reserve enough safety margins for each channel, the operating status of data channel in each plane supervised in real time
It surveys, finds rapid positioning failure, on-line reorganization and the data channel for switching seamlessly to redundancy backup when operation irregularity, it is ensured that system
Normal work；
When the complexity of system task is higher, and bus faces larger load or violent load variation, adaptive earthquake
State adjusts the redundancy in each plane data transfer channel, only retains the dual redundant in wherein critical transmissions channel, other loads compared with
Big channel reduces redundancy by on-line reorganization, and two groups of high speed data transfer channel parallels of identical function is made to work, balanced
Load improves bus resource utilization rate and data transmission efficiency.
Although the illustrative specific implementation mode of the present invention is described above, in order to the technology of the art
Personnel understand the present invention, it should be apparent that the present invention is not limited to the range of specific implementation mode, to the common skill of the art
For art personnel, if various change the attached claims limit and determine the spirit and scope of the present invention in, these
Variation is it will be apparent that all utilize the innovation and creation of present inventive concept in the row of protection.
Claims (5)
1. a kind of self-adapting changeable redundancy 3U signal processing backboards based on VPX buses, which is characterized in that including：14 standards
Slot position can support 6 feature boards, 2 main control switchboards, 2 memory planes, 1 main power board and 1 standby electricity source plate；
Wherein, in 14 standard cell positions, the 1st to the 6th slot position is function board slot position；Based on 7th to the 10th slot position
Control exchanges board slot position, and each main control switchboard occupies 2 standard cell positions；11st and the 12nd slot position is storage board slot position；The
13 slot positions are main power board slot position；14th slot position is stand-by power supply board slot position；
The physics and logical channel of 14 standard cell interdigits interconnection are by universal plane, management plane, data plane, control
Plane and extension 5 planes of plane are constituted；
Wherein, in universal plane, main power board provides power supply for each slot position, when main power board breaks down, by spare
Power panel provides power supply for each slot position；Main control switchboard provides reset signal, reference clock and address configuration for each slot position
Signal；
In management plane, 2 main control switchboards are respectively that each slot position provides 1 road intelligent platform management channel, and passes through this
The temperature of channel monitoring and feedback each slot position board, voltage；
In the dataplane, 2 main control switchboards be respectively each function board slot position provide 1 road SRIOx4 high-speed data channels and
1 road PCIex1 high-speed data accessory channels, realize the high-speed data communication of each slot interdigit；
In the control plane, 2 main control switchboards are respectively that each function board slot position provides 1 road 1GEx1 High-speed Controls channel, main
Power board is controlled by each plane bus resource utilization power of this channel monitoring backboard, and it is dynamic to carry out control command to each feature board
State loads and logical resource on-line reorganization, and receives the dynamic parameter that each feature board uploads；
In extending plane, each function board slot position is interconnected by cyclic annular high-speed data channel between 2 road SRIOx4 plates, realizes 2
The immediate data of the feature board of adjacent slot position interacts.
2. the self-adapting changeable redundancy 3U signal processing backboards according to claim 1 based on VPX buses, feature exist
In：In 6 function board slot positions and 4 main control switchboard slot positions, user draws several to LVDS from self-defined pin
Differential signal and single-ended signal, and pass through outlet after 4 XMC connectors and 1 FMC connectors realization.
3. the self-adapting changeable redundancy 3U signal processing backboards according to claim 1 based on VPX buses, feature exist
In：In 14 slot positions, 4 main control switchboard slot positions need the main control switchboard for being inserted into customization, remaining slot position can insert
Enter the VPX COTS module products of standard.
4. the self-adapting changeable redundancy 3U signal processing backboards according to claim 1 based on VPX buses, feature exist
In：2 main control switchboards support 2 road SATAIII storage ports, each storage port to be separately connected 1 memory plane
Slot position.
5. the self-adapting changeable redundancy 3U signal processing backboards according to claim 1 based on VPX buses, feature exist
In further including：Self-adapting changeable redundancy 3U signal processing backboards meet ANSI/VITA65-2010OpenVPX standards, ANSI/
VITA 46VPX standards and ANSI/VITA48VPX standards；Using 3U height dimension standards, separation 1pitch.
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| CN106647968B (en) * | 2016-12-09 | 2024-01-19 | 邦彦技术股份有限公司 | Backboard and computer system with same |
| CN107704413A (en) * | 2017-09-28 | 2018-02-16 | 中国电子科技集团公司第二十八研究所 | A kind of reinforcement type parallel information processing platform based on VPX frameworks |
| CN109672631A (en) * | 2017-10-16 | 2019-04-23 | 北京中科晶上科技股份有限公司 | High speed power board and control method based on VPX standard |
| CN107861898A (en) * | 2017-10-18 | 2018-03-30 | 湖北三江航天险峰电子信息有限公司 | A kind of High speed rear panel based on OpenVPX frameworks |
| CN109783413A (en) * | 2017-11-14 | 2019-05-21 | 北京中科晶上科技股份有限公司 | Master control borad and control method based on VPX standard |
| CN108337844B (en) * | 2017-12-12 | 2020-09-01 | 天津津航计算技术研究所 | Modularized high-speed VPX bus multi-blade server case |
| CN110166334B (en) * | 2018-11-06 | 2021-06-29 | 上海航天计算机技术研究所 | Spatial information system based on SpaceVPX standard |
| CN109933550B (en) * | 2019-03-01 | 2021-02-09 | 北京星际荣耀空间科技有限公司 | Redundant universal bus system supporting user-defined signals |
| CN110968540A (en) * | 2019-11-06 | 2020-04-07 | 北京计算机技术及应用研究所 | Redundant high-speed backplate of two stars types based on VPX |
| CN111371613A (en) * | 2020-03-03 | 2020-07-03 | 山东超越数控电子股份有限公司 | Blade server mixed insertion topological structure and system |
| CN112163395B (en) * | 2020-09-29 | 2024-05-14 | 北京计算机技术及应用研究所 | Practical backboard topological structure based on OpenVPX |
| CN112764399A (en) * | 2020-12-28 | 2021-05-07 | 浙江中控技术股份有限公司 | Ethernet backboard and communication device |
| CN113377005B (en) * | 2021-05-31 | 2022-09-16 | 四川腾盾科技有限公司 | Air management and control method, system and storage medium for redundancy airplane management computer software |
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