CN105450046A - High-efficiency differential rectification circuit applying impedance compressed network - Google Patents
High-efficiency differential rectification circuit applying impedance compressed network Download PDFInfo
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- CN105450046A CN105450046A CN201510957158.2A CN201510957158A CN105450046A CN 105450046 A CN105450046 A CN 105450046A CN 201510957158 A CN201510957158 A CN 201510957158A CN 105450046 A CN105450046 A CN 105450046A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
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Abstract
The invention discloses a high-efficiency differential rectification circuit applying an impedance compressed network. The high-efficiency differential rectification circuit comprises an upper-layer microstrip structure, an intermediate dielectric base plate and a bottom-layer metal floor, wherein the upper-layer microstrip structure is printed on the upper surface of the intermediate dielectric base plate, the bottom-layer metal floor is printed on the lower surface of the intermediate dielectric base plate, and the upper-layer microstrip structure is formed by connecting an impedance compressed network part and a differential rectification circuit part. The input impedance of the differential rectification circuit changes with the change of input power and an output load to cause impedance mismatching of an input port; and with the impedance compressed network adopted by the high-efficiency differential rectification circuit, the impedance change range is shortened, the impedance matching performance is improved, the rectification efficiency is further improved, and the energy loss is reduced.
Description
Technical field
The present invention relates to a kind of microwave rectifier circuit, be specifically related to a kind of high efficiency difference rectification circuit adopting impedance compression network.
Background technology
Along with the progress of semiconductor technology, electronic circuit becomes and becomes increasingly complex, and discloses as Moore's Law, and the component number on chip rapidly increases, and power consumption sharply increases very large.But the research progress of battery capacity is unable to catch up with the energy consumption of chip.In recent years, in order to extending battery life, make equipment energy long time running, wireless energy transfer becomes the direction of a popular research.When wired Energy Transfer inconvenience maybe can not realize, wireless energy transfer more can play critical effect.
Wireless energy transfer system comprises transmitting terminal and receiving terminal.The energy transmission efficiency of whole system depends on the efficiency of the rectification circuit of receiving terminal to a great extent, and therefore, the efficiency improving rectification circuit is significant to the performance improving whole wireless energy transfer system.The way of realization of rectification circuit has many types, as diode and output loading being in series or in parallel to form rectification circuit, bridge rectifier, or forms voltage doubling rectifing circuit.But most of rectification circuit all optimal design work under specific input power and output loading, but in fact due to the impact of surrounding environment and wireless energy transfer system application mode, the such as interference of external electromagnetic ripple, distance change during wireless charging, or the change of the circuit such as pressurizer of termination after rectification circuit, the input power of rectification circuit and output loading can change, thus cause the change of rectification circuit input impedance, cause circuit impedance mismatch, and then reduce rectification efficiency.Therefore, decrease in efficiency is quickly under other input powers and output loading for rectification circuit.So, at document " C.-J.LiandT.-C.Lee, " 2.4-GHzHigh-efficiencyadaptivepowerharvester; " IEEETrans.VeryLargeScaleIntegr. (VLSI) Syst., vol.22, no.2, pp.434-438, Feb.2014. " describe a kind of adaptive rectification circuit in, after output voltage exceedes a certain set point, commutation circuit to high-power operation state, operating power range can be increased.But such circuit needs arrange electric circuit inspection especially and control switched system, has increased considerably the complexity of system.Document " J.Xu, andD.S.Ricketts, " Anefficient, watt-levelmicrowaverectifierusinganimpedancecompressionn etwork (ICN) withapplicationsinoutphasingenergyrecoverysystems, " IEEEMicrow.WirelessCompon.Lett., vol.23, no.10, pp.542-544, Oct.2013. " impedance compression network is introduced, make the input impedance of circuit can keep almost constant under different input power condition, improve matching performance, thus under circuit can be operated in wider input power range.Nowadays, differential fed antenna shows its high efficiency advantage in the application of RECTIFYING ANTENNA, and above-mentioned impedance compression rectification circuit has single input port, can not be applied in differential antennae.
Summary of the invention
In order to overcome the shortcoming of prior art existence with not enough, the invention provides a kind of high efficiency difference rectification circuit adopting impedance compression network.
The impedance compression network of differential type combines with difference rectification circuit by the present invention first.The input impedance excursion of the impedance compression network energy compressed differential rectification circuit of differential type, improves the matching performance of rectification circuit, makes whole circuit can keep high rectification efficiency in wider input power range.Meanwhile, the impact of output loading change on rectification efficiency can also be reduced.The difference rectification circuit of this employing impedance compression network can be connected with differential fed antenna and uses.
The present invention adopts following technical scheme:
A kind of high efficiency difference rectification circuit adopting impedance compression network, comprise upper-layer micro-strip structure, intermediate medium substrate and underlying metal floor, described upper-layer micro-strip structure is printed on the upper surface of intermediate medium substrate, described underlying metal floor is printed on the lower surface of intermediate medium substrate, and described upper-layer micro-strip structure is connected and composed by impedance compression network part I and difference rectifier circuit portion II.
Described impedance compression network part I comprises the first path and the second path, described first path is made up of the first input end mouth I/P1 connected successively, the first microstrip line 1 and the 3rd microstrip line 3, second path is made up of the second input port I/P2 connected successively, the second microstrip line 2 and the 4th microstrip line 4, and described second microstrip line 2 end connects underlying metal floor by metallization via hole.
Described difference rectifier circuit portion II comprises the first commutation path and the second commutation path, the first Path Connection of described first commutation path and impedance compression network, the second Path Connection of described second commutation path and impedance compression network.
Described first commutation path is made up of the input port matching network part of the first commutation path, the rectifying part of the first commutation path and the DC filtering network portion of the first commutation path.
The input port matching network part of described first commutation path is made up of the 5th microstrip line 5 connected successively, the 7th microstrip line 7, the 9th microstrip line 9 and the first electric capacity 11, described 7th microstrip line 7 end connects underlying metal floor by metallization via hole, and described 5th microstrip line 5 is connected with the 3rd microstrip line 3;
The rectifying part of described first commutation path is made up of the 13 microstrip line 13, first diode the 15 and the 17 microstrip line 17 connected successively, described 17 microstrip line 17 connects underlying metal floor by metallization via hole, and described 13 microstrip line 13 is connected with the first electric capacity 11;
The DC filtering network portion of described first commutation path is by the 19 microstrip line 19, 21 microstrip line 21, second electric capacity 23, 25 microstrip line 25, 27 microstrip line 27, 29 microstrip line 29, 31 microstrip line the 31 and the 33 microstrip line 33 is formed, wherein the 21 microstrip line 21, 27 microstrip line 27, 29 microstrip line the 29 and the 31 microstrip line 31 is loaded on the 19 microstrip line 19 respectively, described 21 microstrip line the 21 and the 25 microstrip line 25 is connected to the two ends of the second electric capacity 23, described 33 microstrip line 33 is connected with the 19 microstrip line 19, 25 microstrip line 25 end connects underlying metal floor by metallization via hole.
Described second commutation path is made up of the input port matching network part of the second commutation path, the rectifying part of the second commutation path and the DC filtering network portion of the second commutation path;
The input port matching network part of described second commutation path is made up of the 6th microstrip line 6 connected successively, the 8th microstrip line 8, the tenth microstrip line 10 and the 3rd electric capacity 12, described 8th microstrip line 8 end connects underlying metal floor by metallization via hole, and described 6th microstrip line 6 is connected with the 4th microstrip line 4;
The rectifying part of the second commutation path is made up of the 14 microstrip line 14, second diode the 16 and the 18 microstrip line 18 connected successively, described 18 microstrip line 18 connects underlying metal floor by metallization via hole, and described 14 microstrip line 14 is connected with the 3rd electric capacity 12;
The DC filtering network portion of described second commutation path is by the 20 microstrip line 20, 22 microstrip line 22, 4th electric capacity 24, 26 microstrip line 26, 28 microstrip line 28, 30 microstrip line 30, 32 microstrip line the 32 and the 34 microstrip line 34 is formed, wherein the 22 microstrip line 22, 28 microstrip line 28, 30 microstrip line the 30 and the 32 microstrip line 32 is loaded on the 20 microstrip line 20 respectively, 26 microstrip line 26 end connects underlying metal floor by metallization via hole, described 22 microstrip line 22, 26 microstrip line 26 is connected to the two ends of the 4th electric capacity 24, described 34 microstrip line 34 is connected with the 20 microstrip line 20.
Also comprise load 35, the two ends of described load 35 are connected with the 33 microstrip line the 33 and the 34 microstrip line 34 respectively.
First diode 15 and the second diode 16 form by two Diode series encapsulation, and all adopt voltage multiplying rectifier framework to connect, wherein the positive pole of the first diode 15 is connected to the 17 microstrip line 17, and centre is connected to the 13 microstrip line 13, and negative pole is connected to the 21 microstrip line 21; The positive pole of the second diode 16 is connected to the 20 microstrip line 20, and centre is connected to the 14 microstrip line 14, and negative pole is connected to the 18 microstrip line 18.
Described 3rd and the 4th microstrip line is 50 ohm, and before difference rectification circuit is reached puncture voltage, with input power change, the multiple input impedance of change converts true impedance to.
Beneficial effect of the present invention:
(1) the impedance compression network that the present invention adopts can compress the scope of the input impedance change that rectification circuit causes because input power changes, make whole rectification circuit can improve port match performance in very wide input power range, keep high rectification efficiency;
(2) the impedance compression network that the present invention adopts can reduce the impact of output loading change on circuit rectifies efficiency, improves rectification efficiency;
(3) differential impedance compression network combines with difference rectification circuit by the present invention first, is conducive to combining with differential fed antenna, improves Circuit Matching performance.
Accompanying drawing explanation
Fig. 1 is structural representation of the present invention;
Fig. 2 is the equivalent circuit diagram of Fig. 1.
Fig. 3 is input impedance Z in Fig. 2
inthe normalized impedance figure changed along with the change of true impedance R.
Fig. 4 is that in the embodiment of the present invention, under different input power, difference rectification circuit carries out the simulation result of the input impedance before and after impedance compression.
Fig. 5 is that in the embodiment of the present invention, under different input power, difference rectification circuit carries out emulation and the measurement result of the rectification efficiency before and after impedance compression.
Fig. 6 is that when in the embodiment of the present invention, input power is respectively-5dBm, 5dBm with 15dBm, under different output loading, difference rectification circuit carries out the measurement result of the rectification efficiency before and after impedance compression.
Embodiment
Below in conjunction with embodiment and accompanying drawing, the present invention is described in further detail, but embodiments of the present invention are not limited thereto.
Embodiment
As shown in Figure 1, a kind of high efficiency difference rectification circuit adopting impedance compression network, comprise upper-layer micro-strip structure, intermediate medium substrate and underlying metal floor, described upper-layer micro-strip structure is printed on the upper surface of intermediate medium substrate, described underlying metal floor is printed on the lower surface of intermediate medium substrate, and described upper-layer micro-strip structure is connected and composed by impedance compression network part I and difference rectifier circuit portion II.
When the input power of whole rectification circuit changes, due to the nonlinear characteristic of rectifier diode, the input impedance of difference rectifier circuit portion can change, and causes impedance mismatching, produces transmitted wave, causes energy loss.And in the present invention, by connecting an impedance compression network at difference rectification circuit input end, can the input impedance of compressed differential rectification circuit, reduce impedance variation scope, improve matching performance, and then raising rectification efficiency, thus make whole rectification circuit can keep high rectification efficiency in wider input power range.In like manner, the impedance mismatching produced when output loading changes also reduces its impact brought by this impedance compression network.Compare the difference rectification circuit before adding impedance compression network, the present invention can improve the matching performance of rectification circuit and front end antenna, puies forward high-octane utilance.
Described impedance compression network part I comprises the first path and the second path, wherein the first path is made up of the first input end mouth I/P1 connected successively, the first microstrip line 1 and the 3rd microstrip line 3, and the second path is made up of the second input port I/P2 connected successively, the second microstrip line 2 and the 4th microstrip line 4.Described second microstrip line 2 end connects underlying metal floor by metallization via hole.Described 3rd microstrip line 3 and the 4th microstrip line 4 are 50 ohm line, before difference rectification circuit is reached puncture voltage, with input power change, the multiple input impedance of change converts true impedance to, and described first microstrip line 1 and the second microstrip line 2 compress for true impedance.As shown in Figure 2, wherein R represents the true impedance of the input impedance of the first (the second) commutation path of difference rectification circuit equivalence after the 3rd (four) microstrip line 3 (4) to the equivalent electric circuit of Fig. 1, Z
0represent the characteristic impedance of the first microstrip line 1 and the second microstrip line 2, (90 ° ?θ) represent the electrical length of the first microstrip line 1, and θ represents the electrical length of the second microstrip line 2.Characteristic impedance Z
0formula is met with electrical length θ
wherein R
minfor the true impedance that minimum power input is corresponding, R
maxfor the true impedance that maximal input is corresponding.In the present embodiment, the characteristic impedance of selected first microstrip line 1 and the second microstrip line 2 is 50 ohm, therefore the electrical length can trying to achieve the first microstrip line 1 is 24.1 °, the electrical length of the second microstrip line is 65.9 °, then is converted into physical length width according to the medium sheet material adopted.Input impedance Z in Fig. 2 shown in Fig. 3
inthe normalized impedance figure changed along with the change of true impedance R.When normalized true impedance r changes to 10 from 0.1, after impedance compression, normalized impedance r
inchange to 1 from 0.2, namely impedance ranges is compressed to 5:1 from 100:1, plays the effect of impedance compression.
Described difference rectifier circuit portion II comprises the first commutation path and the second commutation path, the first Path Connection of described first commutation path and impedance compression network, the second Path Connection of described second commutation path and impedance compression network.
Described first commutation path is made up of the input port matching network part of the first commutation path, the rectifying part of the first commutation path and the DC filtering network portion of the first commutation path.
The input port matching network part of described first commutation path is made up of the 5th microstrip line 5 connected successively, the 7th microstrip line 7, the 9th microstrip line 9 and the first electric capacity 11, described 7th microstrip line 7 end connects underlying metal floor by metallization via hole, and described 5th microstrip line 5 is connected with the 3rd microstrip line 3; This part makes input power can enter the first commutation path substantially.
The rectifying part of described first commutation path is made up of the 13 microstrip line 13, first diode the 15 and the 17 microstrip line 17 connected successively, described 17 microstrip line 17 connects underlying metal floor by metallization via hole, described 13 microstrip line 13 is connected with the first electric capacity 11, and this part plays effect AC signal being converted to direct current signal;
The DC filtering network portion of described first commutation path is by the 19 microstrip line 19, 21 microstrip line 21, second electric capacity 23, 25 microstrip line 25, 27 microstrip line 27, 29 microstrip line 29, 31 microstrip line the 31 and the 33 microstrip line 33 is formed, wherein the 21 microstrip line 21, 27 microstrip line 27, 29 microstrip line the 29 and the 31 microstrip line 31 is loaded on the 19 microstrip line 19 respectively, described 21 microstrip line the 21 and the 25 microstrip line 25 is connected to the two ends of the second electric capacity 23, described 33 microstrip line 33 is connected with the 19 microstrip line 19, 25 microstrip line 25 connects underlying metal floor by metallization via hole, this part plays and suppresses alternating current component and the effect by DC component.
Described second commutation path is made up of the input port matching network part of the second commutation path, the rectifying part of the second commutation path and the DC filtering network portion of the second commutation path;
The input port matching network part of described second commutation path is made up of the 6th microstrip line 6 connected successively, the 8th microstrip line 8, the tenth microstrip line 10 and the 3rd electric capacity 12, described 8th microstrip line 8 end connects underlying metal floor by metallization via hole, described 6th microstrip line 6 is connected with the 4th microstrip line 4, and this part makes input power can enter the second commutation path substantially.
The rectifying part of the second commutation path is made up of the 14 microstrip line 14, second diode the 16 and the 18 microstrip line 18 connected successively, described 18 microstrip line 18 connects underlying metal floor by metallization via hole, and described 14 microstrip line 14 is connected with the 3rd electric capacity 12; This part plays effect AC signal being converted to direct current signal.
The DC filtering network portion of described second commutation path is by the 20 microstrip line 20, 22 microstrip line 22, 4th electric capacity 24, 26 microstrip line 26, 28 microstrip line 28, 30 microstrip line 30, 32 microstrip line the 32 and the 34 microstrip line 34 is formed, wherein the 22 microstrip line 22, 28 microstrip line 28, 30 microstrip line the 30 and the 32 microstrip line 32 is loaded on the 20 microstrip line 20 respectively, 26 microstrip line 26 connects underlying metal floor by metallization via hole, described 22 microstrip line 22, 26 microstrip line 26 other end is connected to the two ends of the 4th electric capacity 24, described 34 microstrip line 34 is connected with the 20 microstrip line 20, this part plays and suppresses alternating current component and the effect by DC component.
The two ends of described load are connected with the 33 microstrip line the 33 and the 34 microstrip line 34 respectively.
First diode 15 and the second diode 16 form by two Diode series encapsulation, and all adopt voltage multiplying rectifier framework to connect, wherein the positive pole of the first diode 15 is connected to the 17 microstrip line 17, and centre is connected to the 13 microstrip line 13, and negative pole is connected to the 21 microstrip line 21; The positive pole of the second diode 16 is connected to the 20 microstrip line 20, and centre is connected to the 14 microstrip line 14, and negative pole is connected to the 18 microstrip line 18.
In the present embodiment, a kind of structure adopting the high efficiency difference rectification circuit of impedance compression network as shown in Figure 1, below an example of the present invention is only, the diode model selected in this example is the HSMS-2822 of Avago company, medium substrate used is Arlon-AD255, its thickness is 30mil, and dielectric constant is 2.55.Physical circuit size Selection is as follows: the length=15mm of the first microstrip line, wide=2.3mm; Length=the 40.2mm of the second microstrip line, wide=2.3mm; Length=the 22.5mm of the 3rd microstrip line, wide=2.3mm; Length=the 22.5mm of the 4th microstrip line, wide=2.3mm; Length=the 54mm of the 5th microstrip line, wide=0.85mm; Length=the 54mm of the 6th microstrip line, wide=0.85mm; Length=the 45mm of the 7th microstrip line, wide=2.3mm; Length=the 45mm of the 8th microstrip line, wide=2.3mm; Length=the 3mm of the 9th microstrip line, wide=2.3mm; Length=the 3mm of the tenth microstrip line, wide=2.3mm; Length=the 3mm of the 13 microstrip line, wide=2.3mm; Length=the 3mm of the 14 microstrip line, wide=2.3mm; Length=the 4.2mm of the 17 microstrip line, wide=2.3mm; Length=the 4.2mm of the 18 microstrip line, wide=2.3mm; Length=the 35.3mm of the 19 microstrip line, wide=2.3mm; Length=the 35.3mm of the 20 microstrip line, wide=2.3mm; Length=the 3mm of the 21 microstrip line, wide=2.3mm; Length=the 3mm of the 22 microstrip line, wide=2.3mm; Length=the 4.2mm of the 25 microstrip line, wide=2.3mm; Length=the 4.2mm of the 26 microstrip line, wide=2.3mm; Length=the 53.6mm of the 27 microstrip line, wide=3.3mm; Length=the 53.6mm of the 28 microstrip line, wide=3.3mm; Length=the 27.4mm of the 29 microstrip line, wide=3.4mm; Length=the 27.4mm of the 30 microstrip line, wide=3.4mm; Length=the 13.6mm of the 31 microstrip line, wide=3.3mm; Length=the 13.6mm of the 32 microstrip line, wide=3.3mm; Length=the 11.9mm of the 33 microstrip line, wide=2.3mm; Length=the 11.9mm of the 34 microstrip line, wide=2.3mm; 21 microstrip line, the 27 microstrip line, the 29 microstrip line and the 31 microstrip line are carried in the position of its left end of distance 3mm, 10.3mm, 18.6mm and 27mm on the 19 microstrip line respectively; 22 microstrip line, the 28 microstrip line, the 30 microstrip line and the 32 microstrip line are carried in the position of its left end of distance 3mm, 10.3mm, 18.6mm and 27mm on the 20 microstrip line respectively; First electric capacity=1000pF, the second electric capacity=100pF, three electric capacity=1000pF, four electric capacity=100pF; Load=2000 Ω.Circuit integrity is of a size of 94.5mm × 102mm.
That the difference rectification circuit being operated in 915MHz under different input power carries out the simulation result that the input impedance of front and back is compressed in impedance shown in Fig. 4.As we can see from the figure after impedance compression, the excursion of input impedance obviously diminishes.Can know according to analysis, the input impedance excursion before impedance compression is 5:1, is 1.37:1, thus can improves impedance matching performance after impedance compression.
Be that the difference rectification circuit being operated in 915MHz under different input power carries out emulation and the measurement result that the rectification efficiency of front and back is compressed in impedance shown in Fig. 5, ordinate numeral rectification efficiency in figure, unit is %.As seen from the figure, compared with the difference rectification circuit that difference rectification circuit with impedance compression and no resistance compress, higher rectification efficiency can be kept under the condition of, impedance mismatching lower in input power, when such as input power is 5dBm, the measurement efficiency of difference rectification circuit of no resistance compression is 39.4%, and the measurement efficiency of difference rectification circuit with impedance compression is 48.9%; Simultaneously, difference rectification circuit with impedance compression is measured efficiency and is greater than 50% in 5.5dBm to 33.1dBm scope, 3.6dB wider than the difference rectification circuit (8.8dBm to 32.8dBm) of no resistance compression, the difference rectification circuit being therefore with impedance to compress can keep high rectification efficiency in wider input power range; In figure, measurement result is consistent with simulation result, and the deviation a little of efficiency is introduced by circuit fabrication error, belongs to tolerance interval.
That the difference rectification circuit being operated in 915MHz under different output loading carries out the measurement result that the rectification efficiency of front and back is compressed in impedance shown in Fig. 6, the measurement result that input power is respectively-5dBm, 5dBm and 15dBm is shown in figure, ordinate numeral rectification efficiency, unit is %.Difference rectification circuit as can be seen from Figure with impedance compression under different output loading can keep higher rectification efficiency, possesses better commutating character.Above test result demonstrates correctness and the feasibility of design theory of the present invention.
In sum, the present invention proposes a kind of high efficiency difference rectification circuit adopting impedance compression network, this circuit is by connecting the impedance compression network of a differential type at difference rectification circuit input end, reduce the input impedance excursion of difference rectification circuit under different input power, improve matching performance, thus the rectification efficiency improved when other power points impedance mismatchings, make circuit can keep high rectification efficiency in wider input power range; Therefore this circuit also can be used for realizing rectification circuit and better mates with front end antenna, is applicable to the receiving terminal being applied to wireless energy transfer system.Moreover, this circuit is also conducive to keeping high rectification efficiency under different output loadings.
Above-described embodiment is the present invention's preferably execution mode; but embodiments of the present invention are not limited by the examples; change, the modification done under other any does not deviate from Spirit Essence of the present invention and principle, substitute, combine, simplify; all should be the substitute mode of equivalence, be included within protection scope of the present invention.
Claims (8)
1. one kind adopts the high efficiency difference rectification circuit of impedance compression network, it is characterized in that, comprise upper-layer micro-strip structure, intermediate medium substrate and underlying metal floor, described upper-layer micro-strip structure is printed on the upper surface of intermediate medium substrate, described underlying metal floor is printed on the lower surface of intermediate medium substrate, and described upper-layer micro-strip structure is connected and composed by impedance compression network part (I) and difference rectifier circuit portion (II).
2. high efficiency difference rectification circuit according to claim 1, it is characterized in that, described impedance compression network part (I) comprises the first path and the second path, described first path is made up of the first input end mouth (I/P1) connected successively, the first microstrip line (1) and the 3rd microstrip line (3), second path is made up of the second input port (I/P2) connected successively, the second microstrip line (2) and the 4th microstrip line (4), and described second microstrip line (2) end connects underlying metal floor by metallization via hole.
3. high efficiency difference rectification circuit according to claim 1, it is characterized in that, described difference rectifier circuit portion (II) comprises the first commutation path and the second commutation path, first Path Connection of described first commutation path and impedance compression network, the second Path Connection of described second commutation path and impedance compression network.
4. high efficiency difference rectification circuit according to claim 3, it is characterized in that, described first commutation path is made up of the input port matching network part of the first commutation path, the rectifying part of the first commutation path and the DC filtering network portion of the first commutation path;
The input port matching network part of described first commutation path is made up of the 5th microstrip line (5) connected successively, the 7th microstrip line (7), the 9th microstrip line (9) and the first electric capacity (11), described 7th microstrip line (7) end connects underlying metal floor by metallization via hole, and described 5th microstrip line (5) is connected with the 3rd microstrip line (3);
The rectifying part of described first commutation path is made up of the 13 microstrip line (13), the first diode (15) and the 17 microstrip line (17) connected successively, described 17 microstrip line (17) connects underlying metal floor by metallization via hole, and described 13 microstrip line (13) is connected with the first electric capacity (11);
The DC filtering network portion of described first commutation path is by the 19 microstrip line (19), 21 microstrip line (21), second electric capacity (23), 25 microstrip line (25), 27 microstrip line (27), 29 microstrip line (29), 31 microstrip line (31) and the 33 microstrip line (33) are formed, wherein the 21 microstrip line (21), 27 microstrip line (27), 29 microstrip line (29) and the 31 microstrip line (31) are loaded on the 19 microstrip line (19) respectively, described 21 microstrip line (21) and the 25 microstrip line (25) are connected to the two ends of the second electric capacity (23), described 33 microstrip line (33) is connected with the 19 microstrip line (19), 25 microstrip line (25) end connects underlying metal floor by metallization via hole.
5. high efficiency difference rectification circuit according to claim 3, it is characterized in that, described second commutation path is made up of the input port matching network part of the second commutation path, the rectifying part of the second commutation path and the DC filtering network portion of the second commutation path;
The input port matching network part of described second commutation path is made up of the 6th microstrip line (6) connected successively, the 8th microstrip line (8), the tenth microstrip line (10) and the 3rd electric capacity (12), described 8th microstrip line (8) end connects underlying metal floor by metallization via hole, and described 6th microstrip line (6) is connected with the 4th microstrip line (4);
The rectifying part of the second commutation path is made up of the 14 microstrip line (14), the second diode (16) and the 18 microstrip line (18) connected successively, described 18 microstrip line (18) connects underlying metal floor by metallization via hole, and described 14 microstrip line (14) is connected with the 3rd electric capacity (12);
The DC filtering network portion of described second commutation path is by the 20 microstrip line (20), 22 microstrip line (22), 4th electric capacity (24), 26 microstrip line (26), 28 microstrip line (28), 30 microstrip line (30), 32 microstrip line (32) and the 34 microstrip line (34) are formed, wherein the 22 microstrip line (22), 28 microstrip line (28), 30 microstrip line (30) and the 32 microstrip line (32) are loaded on the 20 microstrip line (20) respectively, 26 microstrip line (26) end connects underlying metal floor by metallization via hole, described 22 microstrip line (22), 26 microstrip line (26) is connected to the two ends of the 4th electric capacity (24), described 34 microstrip line (34) is connected with the 20 microstrip line (20).
6. the high efficiency difference rectification circuit according to any one of claim 1-5, it is characterized in that, also comprise load (35), the two ends of described load (35) are connected with the 33 microstrip line (33) and the 34 microstrip line (34) respectively.
7. high efficiency difference rectification circuit according to claim 1, it is characterized in that, first diode (15) and the second diode (16) form by two Diode series encapsulation, and all adopt voltage multiplying rectifier framework to connect, wherein the positive pole of the first diode (15) is connected to the 17 microstrip line (17), centre is connected to the 13 microstrip line (13), and negative pole is connected to the 21 microstrip line (21); The positive pole of the second diode (16) is connected to the 20 microstrip line (20), and centre is connected to the 14 microstrip line (14), and negative pole is connected to the 18 microstrip line (18).
8. the high efficiency difference rectification circuit according to any one of claim 2, it is characterized in that, described 3rd and the 4th microstrip line is 50 ohm, and before difference rectification circuit is reached puncture voltage, with input power change, the multiple input impedance of change converts true impedance to.
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Cited By (3)
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| CN106899093A (en) * | 2017-03-15 | 2017-06-27 | 华南理工大学 | A kind of use reflection power reclaims the broad power band rectification circuit of network |
| CN112701807A (en) * | 2020-12-23 | 2021-04-23 | 华南理工大学 | High-efficiency multi-tone signal rectifier capable of realizing wide input power range |
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| CN112701807A (en) * | 2020-12-23 | 2021-04-23 | 华南理工大学 | High-efficiency multi-tone signal rectifier capable of realizing wide input power range |
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