CN105325038B - Synchronization signal receiving and transmitting method, device and equipment - Google Patents

Synchronization signal receiving and transmitting method, device and equipment Download PDF

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CN105325038B
CN105325038B CN201480035195.1A CN201480035195A CN105325038B CN 105325038 B CN105325038 B CN 105325038B CN 201480035195 A CN201480035195 A CN 201480035195A CN 105325038 B CN105325038 B CN 105325038B
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CN105325038A (en
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黎超
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Huawei Technologies Co Ltd
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W56/00—Synchronisation arrangements
    • H04W56/001—Synchronization between nodes
    • H04W56/0015—Synchronization between nodes one node acting as a reference for the others
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W56/00—Synchronisation arrangements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B7/00—Radio transmission systems, i.e. using radiation field
    • H04B7/24—Radio transmission systems, i.e. using radiation field for communication between two or more posts
    • H04B7/26—Radio transmission systems, i.e. using radiation field for communication between two or more posts at least one of which is mobile
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H04L27/2601—Multicarrier modulation systems
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H04L27/2601—Multicarrier modulation systems
    • H04L27/2602—Signal structure
    • H04L27/261—Details of reference signals
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W92/00—Interfaces specially adapted for wireless communication networks
    • H04W92/16—Interfaces between hierarchically similar devices
    • H04W92/18—Interfaces between hierarchically similar devices between terminal devices

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Abstract

The invention provides a method, a device and equipment for receiving and transmitting a synchronous signal. A synchronization signal transmission device (30) according to the present invention includes: a synchronization signal generation module (31) for generating a synchronization signal according to one or more sequences, wherein the length of the one or more sequences is determined according to the length of the synchronization signal; a baseband signal obtaining module (32) for obtaining a baseband signal according to the synchronization signal generated by the synchronization signal generating module (31); and the first sending module (33) is used for sending the baseband signal obtained by the baseband signal obtaining module (32) after radio frequency conversion. In the communication scene of direct communication (D2D) between devices, the cross-correlation value between the synchronization signals provided by the invention is smaller, and the synchronization detection time can be reduced, so that the receiving end of the synchronization signals can realize rapid synchronization with the transmitting end according to the synchronization signals, and the performance of the system is further improved.

Description

Synchronization signal receiving and transmitting method, device and equipment
Technical Field
The present invention relates to communications technologies, and in particular, to a method, an apparatus, and a device for transmitting and receiving a synchronization signal.
Background
Synchronization is a key technology for communication systems, especially wireless communication systems. Whether the receiver can synchronize efficiently to the transmitter will greatly affect the performance of the communication system. The main indexes for measuring the quality of synchronization between devices in a communication system are the complexity of synchronization implementation and the performance of synchronization detection.
Among them, a Communication System of direct Device to Device (D2D) is significantly different from a typical cellular Mobile Communication System, such as Global System for Mobile Communication (GSM), in synchronization. In the communication system of D2D, a plurality of User Equipments (UEs) as transmitters may have completely different timings, and UEs as receivers need to synchronize to different transmitting UEs to receive signals from the plurality of transmitting UEs, so the communication system has higher requirements for synchronization, and the receiving UE needs to synchronize to each transmitting UE quickly and efficiently.
In the process of research on standardization of the third Generation Partnership Project (3rd Generation Partnership Project, 3GPP), a D2D Synchronization Signal (D2D Synchronization Signal, D2DSS) is introduced to achieve Synchronization between different D2D transceivers. The D2DSS comprises a Primary D2D synchronization Signal (PD 2DSS for short) and a Secondary D2D synchronization Signal (SD 2DSS for short), wherein the PD2DSS realizes the initial synchronization of the timing and the frequency between the transmitter and the receiver, and the SD2DSS realizes the fine synchronization. At present, how to generate a synchronization signal with good correlation is attracting attention.
Disclosure of Invention
Embodiments of the present invention provide a method, an apparatus, and a device for receiving and transmitting a synchronization signal, which generate a synchronization signal with good correlation in an application scenario of D2D, so as to implement distributed receiving and transmitting of the synchronization signal in a scenario of D2D, and implement fast synchronization between a synchronization signal transmitting end and a synchronization signal receiving end.
In a first aspect, an embodiment of the present invention provides an apparatus for sending a synchronization signal, including:
a synchronization signal generation module, configured to generate a synchronization signal according to one or more sequences, where lengths of the one or more sequences are determined according to a length of the synchronization signal;
a baseband signal obtaining module, configured to obtain a baseband signal according to the synchronization signal generated by the synchronization signal generating module;
and the first sending module is used for sending the baseband signal obtained by the baseband signal obtaining module out after radio frequency conversion.
With reference to the first aspect, in a first possible implementation manner of the first aspect, the sequence includes a first sequence, and the synchronization signal generating module includes:
a synchronization signal generation unit, configured to determine lengths of one or more first sequences according to the length of the synchronization signal; determining first preset values corresponding to the one or more first sequences, wherein the first preset values corresponding to each first sequence are independent from each other; and according to the first preset value, cyclically shifting the one or more first sequences to generate the synchronous signal.
With reference to the first possible implementation manner of the first aspect, in a second possible implementation manner of the first aspect, if the sequence further includes a second sequence, the synchronization signal generation module further includes:
a scrambling unit configured to generate a scrambling sequence from one or more second sequences; performing scrambling processing on the synchronization signal generated by the synchronization signal generation unit at least once by adopting the scrambling sequence;
the baseband signal obtaining module is specifically configured to:
and obtaining a baseband signal according to the synchronous signal after scrambling processing by the scrambling unit.
With reference to the second possible implementation manner of the first aspect, in a third possible implementation manner of the first aspect, the scrambling unit is specifically configured to:
determining the length of the one or more second sequences according to the length of the synchronization signal;
determining second preset values corresponding to the one or more second sequences, wherein the second preset values corresponding to each second sequence are the same or different, and the second preset values of the scrambling sequences corresponding to the synchronization sources in the group are the same;
and according to the second preset value, each second sequence is circularly shifted to generate the scrambling sequence.
With reference to the third possible implementation manner of the first aspect, in a fourth possible implementation manner of the first aspect, when the number of the scrambling sequences is multiple, a second preset value corresponding to at least one scrambling sequence is the same in a group, and second preset values corresponding to other scrambling sequences are different.
With reference to the third or fourth possible implementation manner of the first aspect, in a fifth possible implementation manner of the first aspect, one of the first preset value and the second preset value is determined according to a group identifier.
With reference to the fifth possible implementation manner of the first aspect, in a sixth possible implementation manner of the first aspect, if a preset value includes the first preset value and the second preset value, the synchronization signal generating unit and the scrambling unit are further configured to:
determining the preset value according to the following formula:
f(NGID)＝a*NGID+b
or, f (N)GID)＝(a*NGID+b)mod K
Wherein N isGIDRepresenting the group identity; a and b are predefined constants; f (N)GID) Representing the preset value; k is a system-defined constant; mod denotes the remainder operation.
With reference to the fifth or sixth possible implementation manner of the first aspect, in a seventh possible implementation manner of the first aspect, the group identifier is a function of an inter-primary-device communication synchronization signal PD2DSS identifier, or is carried in a first control instruction issued by a network, or is carried in a second control instruction issued by a transmitting device, or is implicitly indicated by the network.
With reference to any one of the first to seventh possible implementation manners of the first aspect, in an eighth possible implementation manner of the first aspect, the synchronization signal generation unit is further configured to, for different first sequences:
determining the identification ID of the synchronous signal according to a first preset value corresponding to each first sequence; or the like, or, alternatively,
determining the ID of the synchronous signal according to a first preset value corresponding to each first sequence and a primary synchronous signal PD2DSS identifier between devices; or the like, or, alternatively,
determining the ID of the synchronous signal according to any one value of first preset values of the first sequences; or the like, or, alternatively,
and determining the ID of the synchronous signal according to any one value of the first preset values of the first sequences and the PD2DSS identifier.
With reference to the first aspect and any one of the first to eighth possible implementation manners of the first aspect, in a ninth possible implementation manner of the first aspect, the baseband signal acquiring module includes:
a mapping unit, configured to map the synchronization signal to a subcarrier to obtain a frequency domain signal;
and the acquisition unit is used for acquiring a time domain signal according to the frequency domain signal acquired by the mapping unit.
With reference to the ninth possible implementation manner of the first aspect, in a tenth possible implementation manner of the first aspect, the synchronization signal includes at least one first synchronization signal and at least one second synchronization signal, and a first sequence corresponding to each of the first synchronization signals and each of the second synchronization signals is the same or different, then the mapping unit is specifically configured to:
mapping each first synchronization signal to a corresponding first position, mapping each second synchronization signal to a corresponding second position, and obtaining the baseband signal frequency domain signal, where the first position corresponding to each first synchronization signal and the second position corresponding to each second synchronization signal are located at different symbol positions in the same subframe, or the first position corresponding to each first synchronization signal and the second position corresponding to each second synchronization signal are located in different subframes.
With reference to the tenth possible implementation manner of the first aspect, in an eleventh possible implementation manner of the first aspect, the synchronization signal further includes at least one third synchronization signal, and a sequence corresponding to the third synchronization signal is the same as or different from a sequence corresponding to the first synchronization signal and the second synchronization signal, then the mapping unit is further configured to:
and mapping each third synchronization signal to a corresponding third position thereof to obtain the frequency domain signal, wherein the third position corresponding to each third synchronization signal, the first position corresponding to each first synchronization signal and the second position corresponding to each second synchronization signal are respectively located at different symbol positions in the same subframe, or the first position corresponding to each first synchronization signal, the second position corresponding to each second synchronization signal and the third position corresponding to each third synchronization signal are respectively located in different subframes.
With reference to the first aspect and any one of the first to eleventh possible implementation manners of the first aspect, in a twelfth possible implementation manner of the first aspect, the sequence is generated according to any one of an m-sequence and a ZC-sequence or a combination of both.
With reference to the first aspect and any one of the first to twelfth possible implementation manners of the first aspect, in a thirteenth possible implementation manner of the first aspect, if the sequence is an m-sequence with a length of 31, the primitive polynomial of the one or more sequences is any one of the following polynomials or any combination thereof:
Figure GPA0000215666380000071
Figure GPA0000215666380000072
Figure GPA0000215666380000073
Figure GPA0000215666380000075
Figure GPA0000215666380000076
wherein the content of the first and second substances,
Figure GPA0000215666380000077
is an integer having a value range of
Figure GPA0000215666380000078
mod 2 denotes a 2 remainder.
With reference to the first aspect and any one of the first to twelfth possible implementation manners of the first aspect, in a fourteenth possible implementation manner of the first aspect, if the sequence is an m-sequence with a length of 63, the primitive polynomial of the one or more sequences is any one of the following polynomials or any combination thereof:
Figure GPA0000215666380000079
Figure GPA00002156663800000711
Figure GPA00002156663800000712
Figure GPA00002156663800000713
Figure GPA00002156663800000714
wherein the content of the first and second substances,
Figure GPA00002156663800000715
is an integer having a value range ofmod 2 denotes a 2 remainder.
With reference to any one of the tenth to fourteenth possible implementation manners of the first aspect, in a fifteenth possible implementation manner of the first aspect, the obtaining unit is specifically configured to:
obtaining the baseband signal from the frequency domain signal by using Orthogonal Frequency Division Multiplexing (OFDM); or the like, or, alternatively,
and acquiring the baseband signal from the frequency domain signal by adopting single carrier frequency division multiple access (SC-FDMA).
With reference to the fifteenth possible implementation manner of the first aspect, in a sixteenth possible implementation manner of the first aspect, the obtaining unit is further configured to:
obtaining the baseband signal according to the following formula:
wherein t represents a time argument of said baseband signal s (t);
Figure GPA0000215666380000081
Figure GPA0000215666380000082
Δ f is the subcarrier spacing; a iskIs the value of the frequency domain data after mapping to the corresponding subcarrier;
Figure GPA0000215666380000083
whereinIndicates the number of resource blocks RB configured in the system bandwidth,indicating the size of the resource block in the frequency domain,
Figure GPA0000215666380000086
and N is the number of subcarriers configured in the system bandwidth.
With reference to the fifteenth possible implementation manner of the first aspect, in a seventeenth possible implementation manner of the first aspect, the obtaining unit is further configured to:
obtaining the baseband signal according to the following formula:
Figure GPA0000215666380000087
wherein t represents a time argument of said baseband signal s (t);
Figure GPA0000215666380000088
Δ f is the subcarrier spacing; a iskIs the value of the frequency domain data after mapping to the corresponding subcarrier;
Figure GPA0000215666380000089
wherein
Figure GPA00002156663800000810
Indicates the number of resource blocks RB configured in the system bandwidth,
Figure GPA00002156663800000811
indicating the size of the resource block in the frequency domain,
Figure GPA00002156663800000812
and N is the number of subcarriers configured in the system bandwidth.
With reference to the seventeenth possible implementation manner of the first aspect, in an eighteenth possible implementation manner of the first aspect, the apparatus further includes:
the transformation module is used for performing Discrete Fourier Transform (DFT) on the synchronous signal to obtain a transformed signal;
the obtaining unit is configured to map the transformed signal to a subcarrier by using SC-FDMA to obtain the baseband signal.
With reference to the eighteenth possible implementation manner of the first aspect, in a nineteenth possible implementation manner of the first aspect, the transformation module is specifically configured to:
obtaining the transformed signal according to the following formula:
Figure GPA00002156663800000813
wherein l represents the argument of said synchronization signal d (l); l is the length of the synchronous signal; (n) represents the transformed signal obtained after DFT is performed on the synchronous signal, n is more than or equal to 0 and less than or equal to L-1; j denotes an imaginary unit.
With reference to the first aspect and any one of the first to nineteenth possible implementation manners of the first aspect, in a twentieth possible implementation manner of the first aspect, the first sending module is specifically configured to:
converting the baseband signal by radio frequency to obtain a radio frequency signal;
and after a preset period is reached, the radio frequency signal is sent out.
In a second aspect, an embodiment of the present invention provides a synchronization signal receiving apparatus, including:
a receiving module, configured to receive a synchronization signal, where the synchronization signal is generated by a transmitting end according to one or more sequences, and lengths of the one or more sequences are determined according to the length of the synchronization signal;
and the processing module is used for detecting the synchronization signal received by the receiving module so as to obtain synchronization with a sending end of the synchronization signal.
With reference to the second aspect, in a first possible implementation manner of the second aspect, the sequence is generated according to any one of an m-sequence and a ZC-sequence or a combination of both.
With reference to the second aspect or the first possible implementation manner of the second aspect, in a second possible implementation manner of the second aspect, if the sequence is an m-sequence with a length of 31, the primitive polynomial generating the one or more sequences is any one of or any combination of the following polynomials:
Figure GPA0000215666380000091
Figure GPA0000215666380000092
Figure GPA0000215666380000093
Figure GPA0000215666380000094
Figure GPA0000215666380000095
Figure GPA0000215666380000096
wherein the content of the first and second substances,
Figure GPA0000215666380000097
is an integer having a value range of
Figure GPA0000215666380000098
mod 2 denotes a 2 remainder.
With reference to the second aspect or the first possible implementation manner of the second aspect, in a third possible implementation manner of the second aspect, if the sequence is an m-sequence with a length of 63, the primitive polynomial generating the one or more sequences is any one of or any combination of the following polynomials:
Figure GPA0000215666380000101
Figure GPA0000215666380000102
Figure GPA0000215666380000103
Figure GPA0000215666380000104
Figure GPA0000215666380000105
Figure GPA0000215666380000106
wherein the content of the first and second substances,
Figure GPA0000215666380000107
is an integer having a value range of
Figure GPA0000215666380000108
mod 2 denotes a 2 remainder.
With reference to the second aspect and any one of the first to third possible implementation manners of the second aspect, in a fourth possible implementation manner of the second aspect, the apparatus further includes a second sending module, and the processing module is further configured to:
detecting whether the receiving module receives the synchronous signal according to a preset criterion;
and if the synchronous signal is not detected, triggering the second sending module to send the synchronous signal generated by the device to other receiving ends.
In a third aspect, an embodiment of the present invention provides a device for sending a synchronization signal, including:
a first processor for generating a synchronization signal according to one or more sequences, wherein the length of the one or more sequences is determined according to the length of the synchronization signal; obtaining a baseband signal according to the synchronous signal;
and the first transmitter is used for transmitting the baseband signal obtained by the first processor after radio frequency conversion.
With reference to the third aspect, in a first possible implementation manner of the third aspect, the sequence includes a first sequence, and the first processor is specifically configured to:
determining the length of one or more first sequences according to the length of the synchronization signal;
determining first preset values corresponding to the one or more first sequences, wherein the first preset values corresponding to each first sequence are independent from each other;
and according to the first preset value, cyclically shifting the one or more first sequences to generate the synchronous signal.
With reference to the first possible implementation manner of the third aspect, in a second possible implementation manner of the third aspect, if the sequence further includes a second sequence, the first processor is further configured to:
generating a scrambling sequence from the one or more second sequences;
scrambling the synchronous signal at least once by adopting the scrambling sequence;
then, the obtaining a baseband signal according to the synchronization signal specifically includes:
and obtaining a baseband signal according to the synchronous signal after scrambling processing.
With reference to the second possible implementation manner of the third aspect, in a third possible implementation manner of the third aspect, the first processor is further specifically configured to:
determining the length of the one or more second sequences according to the length of the synchronization signal;
determining second preset values corresponding to the one or more second sequences, wherein the second preset values corresponding to each second sequence are the same or different, and the second preset values of the scrambling sequences corresponding to the synchronization sources in the group are the same;
and according to the second preset value, each second sequence is circularly shifted to generate the scrambling sequence.
With reference to the third possible implementation manner of the third aspect, in a fourth possible implementation manner of the third aspect, when the number of the scrambling sequences is multiple, a second preset value corresponding to at least one scrambling sequence is the same in a group, and second preset values corresponding to other scrambling sequences are different.
With reference to the third or fourth possible implementation manner of the third aspect, in a fifth possible implementation manner of the third aspect, one of the first preset value and the second preset value is determined according to a group identifier.
With reference to the fifth possible implementation manner of the third aspect, in a sixth possible implementation manner of the third aspect, if the preset value includes the first preset value and the second preset value, the first processor is further configured to:
determining the preset value according to the following formula:
f(NGID)＝a*NGID+b
or, f (N)GID)＝(a*NGID+b)mod K
Wherein N isGIDRepresenting the group identity; a and b are predefined constants; f (N)GID) Representing the preset value; k is a system-defined constant; mod denotes the remainder operation.
With reference to the fifth or sixth possible implementation manner of the third aspect, in a seventh possible implementation manner of the third aspect, the group identifier is a function of an identifier of a communication synchronization signal PD2DSS between primary devices, or is carried in a first control instruction issued by a network, or is carried in a second control instruction issued by a transmitting device, or is implicitly indicated by the network.
With reference to any one of the first to seventh possible implementation manners of the third aspect, in an eighth possible implementation manner of the third aspect, for different first sequences, the first processor is further configured to:
determining the ID of the synchronous signal according to a first preset value corresponding to each first sequence; or the like, or, alternatively,
determining the ID of the synchronous signal according to a first preset value corresponding to each first sequence and a primary synchronous signal PD2DSS identifier between devices; or the like, or, alternatively,
determining the ID of the synchronous signal according to any one value of first preset values of the first sequences; or the like, or, alternatively,
and determining the ID of the synchronous signal according to any one value of the first preset values of the first sequences and the PD2DSS identifier.
With reference to the third aspect and any one of the first to eighth possible implementation manners of the third aspect, in a ninth possible implementation manner of the third aspect, the first processor is configured to obtain a baseband signal according to the synchronization signal, and specifically:
the first processor is configured to map the synchronization signal to a subcarrier to obtain a frequency domain signal; and obtaining a time domain signal according to the frequency domain signal.
With reference to the ninth possible implementation manner of the third aspect, in a tenth possible implementation manner of the third aspect, the synchronization signal includes at least one first synchronization signal and at least one second synchronization signal, and if first sequences corresponding to the first synchronization signals and the second synchronization signals are the same or different, the first processor is configured to map the synchronization signals onto subcarriers to obtain a frequency domain signal, specifically:
the first processor is configured to map each of the first synchronization signals to a corresponding first position thereof, map each of the second synchronization signals to a corresponding second position thereof, and obtain the baseband signal frequency domain signal, where a first position corresponding to each of the first synchronization signals and a second position corresponding to each of the second synchronization signals are located at different symbol positions in the same subframe, respectively, or a first position corresponding to each of the first synchronization signals and a second position corresponding to each of the second synchronization signals are located in different subframes, respectively.
With reference to the tenth possible implementation manner of the third aspect, in an eleventh possible implementation manner of the third aspect, the synchronization signal further includes at least one third synchronization signal, where a sequence corresponding to the third synchronization signal is the same as or different from a sequence corresponding to the first synchronization signal and the second synchronization signal, and the first processor is configured to map the synchronization signal onto a subcarrier to obtain a frequency domain signal, specifically:
the first processor is configured to map each of the third synchronization signals to a corresponding third position thereof, so as to obtain the frequency domain signal, where the third position corresponding to each of the third synchronization signals, the first position corresponding to each of the first synchronization signals, and the second position corresponding to each of the second synchronization signals are located in different symbol positions in the same subframe, respectively, or the first position corresponding to each of the first synchronization signals, the second position corresponding to each of the second synchronization signals, and the third position corresponding to each of the third synchronization signals are located in different subframes, respectively.
With reference to the third aspect and any one of the first to eleventh possible implementation manners of the third aspect, in a twelfth possible implementation manner of the third aspect, the sequence is generated according to any one of an m-sequence and a ZC-sequence or a combination of both.
With reference to the third aspect and any one of the first to twelfth possible implementation manners of the third aspect, in a thirteenth possible implementation manner of the third aspect, if the sequence is an m-sequence with a length of 31, the primitive polynomial of the one or more sequences is any one of the following polynomials or any combination thereof:
Figure GPA0000215666380000132
Figure GPA0000215666380000133
Figure GPA0000215666380000134
Figure GPA0000215666380000135
Figure GPA0000215666380000136
wherein the content of the first and second substances,
Figure GPA0000215666380000137
is an integer having a value range of
Figure GPA0000215666380000138
mod 2 denotes a 2 remainder.
With reference to the third aspect and any one of the first to twelfth possible implementation manners of the third aspect, in a fourteenth possible implementation manner of the third aspect, if the sequence is an m-sequence with a length of 63, the primitive polynomial of the one or more sequences is any one of the following polynomials or any combination thereof:
Figure GPA0000215666380000139
Figure GPA00002156663800001310
Figure GPA00002156663800001312
Figure GPA00002156663800001313
Figure GPA00002156663800001314
wherein the content of the first and second substances,
Figure GPA0000215666380000141
is an integer having a value range of
Figure GPA0000215666380000142
mod 2 denotes a 2 remainder.
With reference to any one of the tenth to fourteenth possible implementation manners of the third aspect, in a fifteenth possible implementation manner of the third aspect, the first processor is configured to obtain a time-domain signal according to the frequency-domain signal, and specifically:
the first processor is configured to obtain the baseband signal from the frequency domain signal by using Orthogonal Frequency Division Multiplexing (OFDM); or the like, or, alternatively,
the first processor is configured to obtain the baseband signal from the frequency domain signal using single carrier frequency division multiple access, SC-FDMA.
With reference to the fifteenth possible implementation manner of the third aspect, in a sixteenth possible implementation manner of the third aspect, the first processor is configured to obtain the baseband signal from the frequency-domain signal by using OFDM, and specifically:
the first processor is configured to obtain the baseband signal according to the following formula:
Figure GPA0000215666380000143
wherein t represents a time argument of said baseband signal s (t);
Figure GPA0000215666380000144
Figure GPA0000215666380000145
Δ f is the subcarrier spacing; a iskIs the value of the frequency domain data after mapping to the corresponding subcarrier;
Figure GPA0000215666380000146
wherein
Figure GPA0000215666380000147
Indicates the number of resource blocks RB configured in the system bandwidth,
Figure GPA0000215666380000148
indicating the size of the resource block in the frequency domain,
Figure GPA0000215666380000149
and N is the number of subcarriers configured in the system bandwidth.
With reference to the fifteenth possible implementation manner of the third aspect, in a seventeenth possible implementation manner of the third aspect, the first processor is configured to obtain the baseband signal from the frequency-domain signal by using SC-FDMA, and specifically:
the first processor is configured to obtain the baseband signal according to the following formula:
Figure GPA00002156663800001410
wherein t represents a time argument of said baseband signal s (t);
Figure GPA00002156663800001411
Δ f is the subcarrier spacing; a iskIs the value of the frequency domain data after mapping to the corresponding subcarrier;
Figure GPA00002156663800001412
wherein
Figure GPA00002156663800001413
Indicates the number of resource blocks RB configured in the system bandwidth,
Figure GPA00002156663800001414
indicating the size of the resource block in the frequency domain,
Figure GPA00002156663800001415
and N is the number of subcarriers configured in the system bandwidth.
With reference to the seventeenth possible implementation manner of the third aspect, in an eighteenth possible implementation manner of the third aspect, the first processor is further configured to:
performing Discrete Fourier Transform (DFT) on the synchronous signal to obtain a transformed signal;
the first processor is configured to map the synchronization signal to a subcarrier by using SC-FDMA to obtain the baseband signal, specifically:
the first processor is configured to map the transformed signal to a subcarrier using SC-FDMA to obtain the baseband signal.
With reference to the eighteenth possible implementation manner of the third aspect, in a nineteenth possible implementation manner of the third aspect, the first processor is configured to perform DFT on the synchronization signal to obtain a transformed signal, and specifically:
the first processor is configured to obtain the transformed signal according to the following formula:
Figure GPA0000215666380000151
wherein l represents the argument of said synchronization signal d (l); l is the length of the synchronous signal; (n) represents the transformed signal obtained after DFT is performed on the synchronous signal, n is more than or equal to 0 and less than or equal to L-1; j denotes an imaginary unit.
With reference to the third aspect and any one of the first to nineteenth possible implementation manners of the third aspect, in a twentieth possible implementation manner of the third aspect, the first transmitter is specifically configured to:
converting the baseband signal by radio frequency to obtain a radio frequency signal;
and after a preset period is reached, the radio frequency signal is sent out.
In a fourth aspect, an embodiment of the present invention provides a synchronization signal receiving apparatus, including:
the receiver is used for receiving a synchronization signal, wherein the synchronization signal is generated by a transmitting terminal according to one or more sequences, and the lengths of the one or more sequences are determined according to the length of the synchronization signal;
and the second processor is used for detecting the synchronous signal received by the receiver so as to obtain the synchronization between the transmitting end and the receiving end of the synchronous signal.
With reference to the fourth aspect, in a first possible implementation manner of the fourth aspect, the sequence is generated according to any one of an m-sequence and a ZC-sequence or a combination of both.
With reference to the fourth aspect or the first possible implementation manner of the fourth aspect, in a second possible implementation manner of the fourth aspect, if the sequence is an m-sequence with a length of 31, the primitive polynomial generating the one or more sequences is any one of or any combination of the following polynomials:
Figure GPA0000215666380000161
Figure GPA0000215666380000162
Figure GPA0000215666380000163
Figure GPA0000215666380000164
Figure GPA0000215666380000165
Figure GPA0000215666380000166
wherein the content of the first and second substances,
Figure GPA0000215666380000167
is an integer having a value range ofmod 2 denotes a 2 remainder.
With reference to the fourth aspect or the first possible implementation manner of the fourth aspect, in a third possible implementation manner of the fourth aspect, if the sequence is an m-sequence with a length of 63, the primitive polynomial generating the one or more sequences is any one of or any combination of the following polynomials:
Figure GPA0000215666380000169
Figure GPA00002156663800001611
Figure GPA00002156663800001612
Figure GPA00002156663800001613
Figure GPA00002156663800001614
wherein the content of the first and second substances,
Figure GPA00002156663800001615
is an integer having a value range of
Figure GPA00002156663800001616
mod 2 denotes a 2 remainder.
With reference to the fourth aspect or any one of the first to third possible implementation manners of the fourth aspect, in a fourth possible implementation manner of the fourth aspect, the receiving device further includes a second transmitter, and the second processor is further configured to:
detecting whether the receiver receives the synchronous signal according to a preset criterion;
and if the synchronous signal is not detected, triggering the second transmitter to transmit the synchronous signal generated by the receiving equipment to other receiving ends.
In a fifth aspect, an embodiment of the present invention provides a method for sending a synchronization signal, including:
generating a synchronization signal according to one or more sequences, wherein the length of the one or more sequences is determined according to the length of the synchronization signal;
obtaining a baseband signal according to the synchronous signal;
and transmitting the baseband signal after radio frequency conversion.
With reference to the fifth aspect, in a first possible implementation manner of the fifth aspect, the sequence includes a first sequence, and the generating the synchronization signal according to one or more sequences includes:
determining the length of one or more first sequences according to the length of the synchronization signal;
determining first preset values corresponding to the one or more first sequences, wherein the first preset values corresponding to each first sequence are independent from each other;
and according to the first preset value, cyclically shifting the one or more first sequences to generate the synchronous signal.
With reference to the first possible implementation manner of the fifth aspect, in a second possible implementation manner of the fifth aspect, if the sequence further includes a second sequence, the generating a synchronization signal according to one or more sequences further includes:
generating a scrambling sequence from the one or more second sequences;
scrambling the synchronous signal at least once by adopting the scrambling sequence;
then, the obtaining a baseband signal according to the synchronization signal specifically includes:
and obtaining a baseband signal according to the synchronous signal after scrambling processing.
With reference to the second possible implementation manner of the fifth aspect, in a third possible implementation manner of the fifth aspect, the generating a scrambling sequence according to one or more second sequences includes:
determining the length of the one or more second sequences according to the length of the synchronization signal;
determining second preset values corresponding to the one or more second sequences, wherein the second preset values corresponding to each second sequence are the same or different, and the second preset values of the scrambling sequences corresponding to the synchronization sources in the group are the same;
and according to the second preset value, each second sequence is circularly shifted to generate the scrambling sequence.
With reference to the third possible implementation manner of the fifth aspect, in a fourth possible implementation manner of the fifth aspect, when the number of the scrambling sequences is multiple, a second preset value corresponding to at least one scrambling sequence is the same in a group, and second preset values corresponding to other scrambling sequences are different.
With reference to the third or fourth possible implementation manner of the fifth aspect, in a fifth possible implementation manner of the fifth aspect, one of the first preset value and the second preset value is determined according to a group identifier.
With reference to the fifth possible implementation manner of the fifth aspect, in a sixth possible implementation manner of the fifth aspect, if the preset value includes the first preset value and the second preset value, the determining, according to the group identifier, the preset value specifically is:
determining the preset value according to the following formula:
f(NGID)＝a*NGID+b
or, f (N)GID)＝(a*NGID+b)mod K
Wherein N isGIDRepresenting the group identity; a and b are predefined constants; f (N)GID) Representing the preset value; k is a system-defined constant; mod denotes the remainder operation.
With reference to the fifth or sixth possible implementation manner of the fifth aspect, in a seventh possible implementation manner of the fifth aspect, the group identifier is a function of an identifier of a communication synchronization signal PD2DSS between primary devices, or is carried in a first control instruction issued by a network, or is carried in a second control instruction issued by a transmitting device, or is implicitly indicated by the network.
With reference to any one of the first to seventh possible implementation manners of the fifth aspect, in an eighth possible implementation manner of the fifth aspect, for different first sequences, a relationship between a first preset value and an identifier ID of the synchronization signal, which correspond to each of the first preset values, is:
determining the ID of the synchronous signal according to a first preset value corresponding to each first sequence; or the like, or, alternatively,
determining the ID of the synchronous signal according to a first preset value corresponding to each first sequence and a primary synchronous signal PD2DSS identifier between devices; or the like, or, alternatively,
determining the ID of the synchronous signal according to any one value of first preset values of the first sequences; or the like, or, alternatively,
and determining the ID of the synchronous signal according to any one value of the first preset values of the first sequences and the PD2DSS identifier.
With reference to the fifth aspect or any one of the first to eighth possible implementation manners of the fifth aspect, in a ninth possible implementation manner of the fifth aspect, the obtaining a baseband signal according to the synchronization signal includes:
mapping the synchronous signal to a subcarrier to obtain a frequency domain signal;
and obtaining a time domain signal according to the frequency domain signal.
With reference to the ninth possible implementation manner of the fifth aspect, in a tenth possible implementation manner of the fifth aspect, the synchronization signals include at least one first synchronization signal and at least one second synchronization signal, and if first sequences corresponding to the first synchronization signals and the second synchronization signals are the same or different, the mapping the synchronization signals onto subcarriers to obtain frequency domain signals includes:
mapping each first synchronization signal to a corresponding first position, mapping each second synchronization signal to a corresponding second position, and obtaining the baseband signal frequency domain signal, where the first position corresponding to each first synchronization signal and the second position corresponding to each second synchronization signal are located at different symbol positions in the same subframe, or the first position corresponding to each first synchronization signal and the second position corresponding to each second synchronization signal are located in different subframes.
With reference to the tenth possible implementation manner of the fifth aspect, in an eleventh possible implementation manner of the fifth aspect, the synchronization signal further includes at least one third synchronization signal, and if a sequence corresponding to the third synchronization signal is the same as or different from a sequence corresponding to the first synchronization signal and the second synchronization signal, the mapping the synchronization signal onto a subcarrier to obtain a frequency-domain signal further includes:
and mapping each third synchronization signal to a corresponding third position thereof to obtain the frequency domain signal, wherein the third position corresponding to each third synchronization signal, the first position corresponding to each first synchronization signal and the second position corresponding to each second synchronization signal are respectively located at different symbol positions in the same subframe, or the first position corresponding to each first synchronization signal, the second position corresponding to each second synchronization signal and the third position corresponding to each third synchronization signal are respectively located in different subframes.
With reference to the fifth aspect and any one of the first to eleventh possible implementations of the fifth aspect, in a twelfth possible implementation of the fifth aspect, the sequence is generated according to any one of an m-sequence and a ZC-sequence or a combination of both.
With reference to the fifth aspect or any one of the first to twelfth possible implementation manners of the fifth aspect, in a thirteenth possible implementation manner of the fifth aspect, if the sequence is an m-sequence with a length of 31, the primitive polynomial of the one or more sequences is any one of the following polynomials or any combination thereof:
Figure GPA0000215666380000191
Figure GPA0000215666380000192
Figure GPA0000215666380000193
Figure GPA0000215666380000194
Figure GPA0000215666380000196
wherein the content of the first and second substances,
Figure GPA0000215666380000197
is an integer having a value range of
Figure GPA0000215666380000198
mod 2 denotes a 2 remainder.
With reference to the fifth aspect or any one of the first to twelfth possible implementation manners of the fifth aspect, in a fourteenth possible implementation manner of the fifth aspect, if the sequence is an m-sequence with a length of 63, the primitive polynomial of the one or more sequences is any one of the following polynomials or any combination thereof:
Figure GPA0000215666380000201
Figure GPA0000215666380000202
Figure GPA0000215666380000203
Figure GPA0000215666380000204
Figure GPA0000215666380000205
Figure GPA0000215666380000206
wherein the content of the first and second substances,is an integer having a value range of
Figure GPA0000215666380000208
mod 2 denotes a 2 remainder.
With reference to any one of the tenth to fourteenth possible implementation manners of the fifth aspect, in a fifteenth possible implementation manner of the fifth aspect, the obtaining a time-domain signal according to the frequency-domain signal includes:
obtaining the baseband signal from the frequency domain signal by using Orthogonal Frequency Division Multiplexing (OFDM); or the like, or, alternatively,
and acquiring the baseband signal from the frequency domain signal by adopting single carrier frequency division multiple access (SC-FDMA).
With reference to the fifteenth possible implementation manner of the fifth aspect, in a sixteenth possible implementation manner of the fifth aspect, the obtaining the baseband signal from the frequency-domain signal by using OFDM includes:
obtaining the baseband signal according to the following formula:
wherein t represents a time argument of said baseband signal s (t);
Figure GPA00002156663800002010
Figure GPA00002156663800002011
Δ f is the subcarrier spacing; a iskIs the value of the frequency domain data after mapping to the corresponding subcarrier;
Figure GPA00002156663800002012
wherein
Figure GPA00002156663800002013
Indicates the number of resource blocks RB configured in the system bandwidth,
Figure GPA00002156663800002014
indicating the size of the resource block in the frequency domain,
Figure GPA00002156663800002015
and N is the number of subcarriers configured in the system bandwidth.
With reference to the fifteenth possible implementation manner of the fifth aspect, in a seventeenth possible implementation manner of the fifth aspect, the obtaining the baseband signal from the frequency-domain signal by using SC-FDMA includes:
obtaining the baseband signal according to the following formula:
Figure GPA0000215666380000211
wherein t represents a time argument of said baseband signal s (t);
Figure GPA0000215666380000212
Δ f is the subcarrier spacing; a iskIs the value of the frequency domain data after mapping to the corresponding subcarrier;
Figure GPA0000215666380000213
wherein
Figure GPA0000215666380000214
Indicates the number of resource blocks RB configured in the system bandwidth,indicating the size of the resource block in the frequency domain,
Figure GPA0000215666380000216
and N is the number of subcarriers configured in the system bandwidth.
With reference to the seventeenth possible implementation manner of the fifth aspect, in an eighteenth possible implementation manner of the fifth aspect, before the mapping the synchronization signal onto a subcarrier by using SC-FDMA and obtaining the baseband signal, the method further includes:
performing Discrete Fourier Transform (DFT) on the synchronous signal to obtain a transformed signal;
then, the mapping the synchronization signal to a subcarrier by using SC-FDMA, and obtaining the baseband signal specifically includes:
and mapping the converted signal to a subcarrier by adopting SC-FDMA to obtain the baseband signal.
With reference to the eighteenth possible implementation manner of the fifth aspect, in a nineteenth possible implementation manner of the fifth aspect, the performing DFT on the synchronization signal to obtain a transformed signal includes:
obtaining the transformed signal according to the following formula:
Figure GPA0000215666380000217
wherein l represents the argument of said synchronization signal d (l); l is the length of the synchronous signal; (n) represents the transformed signal obtained after DFT is performed on the synchronous signal, n is more than or equal to 0 and less than or equal to L-1; j denotes an imaginary unit.
With reference to the fifth aspect and any one of the first to nineteenth possible implementation manners of the fifth aspect, in a twentieth possible implementation manner of the fifth aspect, the transmitting the baseband signal after radio frequency conversion includes:
converting the baseband signal by radio frequency to obtain a radio frequency signal;
and after a preset period is reached, the radio frequency signal is sent out.
In a sixth aspect, an embodiment of the present invention provides a method for receiving a synchronization signal, including:
receiving a synchronization signal, wherein the synchronization signal is generated by a transmitting terminal according to one or more sequences, and the lengths of the one or more sequences are determined according to the length of the synchronization signal;
and detecting the synchronous signal to obtain the synchronization between the sending end and the receiving end of the synchronous signal.
With reference to the sixth aspect, in a first possible implementation manner of the sixth aspect, the sequence is generated according to any one of an m-sequence and a ZC-sequence or a combination of both.
With reference to the sixth aspect or the first possible implementation manner of the sixth aspect, in a second possible implementation manner of the sixth aspect, if the sequence is an m-sequence with a length of 31, the primitive polynomial generating the one or more sequences is any one of or any combination of the following polynomials:
Figure GPA0000215666380000222
Figure GPA0000215666380000223
Figure GPA0000215666380000226
wherein the content of the first and second substances,
Figure GPA0000215666380000227
is an integer having a value range of
Figure GPA0000215666380000228
mod 2 denotes a 2 remainder.
With reference to the sixth aspect or the first possible implementation manner of the sixth aspect, in a third possible implementation manner of the sixth aspect, if the sequence is an m-sequence with a length of 63, the primitive polynomial generating the one or more sequences is any one of or any combination of the following polynomials:
Figure GPA0000215666380000229
Figure GPA00002156663800002210
Figure GPA00002156663800002211
Figure GPA00002156663800002212
Figure GPA00002156663800002213
Figure GPA00002156663800002214
wherein the content of the first and second substances,
Figure GPA00002156663800002215
is an integer having a value range of
Figure GPA00002156663800002216
mod 2 denotes a 2 remainder.
With reference to the sixth aspect and any one of the first to third possible implementation manners of the sixth aspect, in a fourth possible implementation manner of the sixth aspect, the method further includes:
detecting whether the synchronous signal is received or not according to a preset criterion;
and if the synchronous signal is not detected, the synchronous signal is used as the sending end to send the synchronous signal generated by the sending end to other receiving ends.
In the communication scenario of D2D, the cross-correlation value between the synchronization signals provided by the embodiments of the present invention is small, and the synchronization detection time can be reduced, so that the receiving end of the synchronization signal can implement fast synchronization with the transmitting end according to the synchronization signal, thereby improving the performance of the system.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a schematic diagram of a D2D communication scenario with network coverage and partial network coverage;
fig. 2 is a schematic diagram of a D2D communication scenario when there is no network coverage;
FIG. 3 is a schematic structural diagram of a first apparatus for sending synchronization signals according to the present invention;
FIG. 4 is a schematic structural diagram of a second apparatus for sending synchronization signals according to the present invention;
FIG. 5 is a schematic structural diagram of a first embodiment of a synchronization signal receiving apparatus according to the present invention;
FIG. 6 is a schematic structural diagram of a first apparatus for sending synchronization signals according to the present invention;
FIG. 7 is a diagram illustrating a first exemplary structure of a synchronization signal receiving apparatus according to the present invention;
fig. 8 is a flowchart illustrating a first method for sending a synchronization signal according to a first embodiment of the present invention;
fig. 9 is an exemplary diagram of SD2DSS in the second embodiment of the method for transmitting a synchronization signal according to the present invention;
fig. 10 is a schematic view of a communication scenario in a third embodiment of a method for sending a synchronization signal according to the present invention;
fig. 11 is an exemplary diagram of SD2DSS in the fourth embodiment of the method for transmitting a synchronization signal according to the present invention;
fig. 12 is a flowchart illustrating a fifth method for sending a synchronization signal according to an embodiment of the present invention;
fig. 13 is a flowchart illustrating a synchronization signal receiving method according to a first embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Fig. 1 is a schematic diagram of a D2D communication scenario with network coverage and partial network coverage. As shown in fig. 1, the left side of fig. 1 is a communication scenario when there is network coverage. In fig. 1, UEs served by the base station 10, i.e., UE 11, UE 12 and UE 13, receive a synchronization signal transmitted by the base station 10 in the downlink, and the UEs will synchronize with the base station 10 through the synchronization signal; further, although the UE14 and the UE 15 are also within the service range of the base station 10, the radio connection with the base station 10 fails due to some cause, for example, blocking of a wall or a building. Therefore, to initiate D2D communication between the UE14 and the UE 15, and since there is no network assistance, the UE14 itself serves as a synchronization source to transmit a D2DSS, so that the receiving UE 15 can achieve synchronization with the UE14 through the D2 DSS.
It is added that the UE 13 is in the service range of the base station 10, but it detects some UEs at the same time. For example, the UE 21 listed in fig. 1 is in its vicinity, and the UE 21 is in an out-of-network-service range. At this time, since the UE 13 is already synchronized with the base station 10, the priority of the UE 13 is higher as a possible synchronization source. UE 13 may thus assume the role of a synchronization source, initiating a D2DSS, for UE 21 to synchronize with. Likewise, it is possible for UE 21 to resume transmitting the D2DSS so that its following UE 22 acquires synchronization.
Fig. 2 is a schematic diagram of a D2D communication scenario when there is no network coverage. As shown in fig. 2, the UE 31, without receiving the synchronization signal, transmits a D2DSS to nearby UEs as a synchronization source, and its surrounding UEs, e.g., UE 32, UE 33, and UE 34, receive the D2 DSS. Further, UE 34 transmits a D2DSS to UE 35; however, the UE 30 cannot receive the D2DSS transmitted by the UE 31, and therefore, the UE 30 transmits another D2DSS to its surrounding UEs (e.g., UE 34).
In summary, in the communication mode of D2D, the transmission scenario of the synchronization signal is more complicated than that in the cellular mobile communication system, including the synchronization source (e.g. UE 13, UE 21) relaying the timing of the base station, and the transmission of the synchronization signal (e.g. UE14, UE 31, UE 30, UE 34) in the fully distributed synchronization source.
Based on the communication scenario, the following describes in detail a synchronization signal sending method, apparatus, and device provided by the embodiments of the present invention through specific embodiments.
Fig. 3 is a schematic structural diagram of a synchronization signal transmitting apparatus according to a first embodiment of the present invention. The embodiment of the invention provides a device for sending a synchronization signal, which can be integrated in signal sending equipment such as UE (user equipment) and a base station. As shown in fig. 3, the synchronization signal transmission device 30 includes: a synchronization signal generating module 31, a baseband signal acquiring module 32 and a first transmitting module 33.
The synchronization signal generation module 31 is configured to generate a synchronization signal according to one or more sequences, where lengths of the one or more sequences are determined according to the length of the synchronization signal; the baseband signal obtaining module 32 is configured to obtain a baseband signal according to the synchronization signal generated by the synchronization signal generating module 31; the first sending module 33 is configured to send out the baseband signal obtained by the baseband signal obtaining module 32 after radio frequency conversion.
The apparatus of this embodiment may be used to implement the technical solution of the method embodiment shown in fig. 8, and the implementation principle and the technical effect are similar, which are not described herein again.
In the above embodiment, the sequence includes a first sequence, and the synchronization signal generating module 31 may include: a synchronization signal generation unit, configured to determine lengths of one or more first sequences according to the length of the synchronization signal; determining first preset values corresponding to the one or more first sequences, wherein the first preset values corresponding to each first sequence are independent from each other; and according to the first preset value, cyclically shifting the one or more first sequences to generate the synchronous signal.
Further, if the sequence further includes a second sequence, the synchronization signal generating module 31 may further include: a scrambling unit configured to generate a scrambling sequence from one or more second sequences; performing scrambling processing on the synchronization signal generated by the synchronization signal generation unit at least once by adopting the scrambling sequence; the baseband signal acquisition module 32 may be specifically configured to: and obtaining a baseband signal according to the synchronous signal after scrambling processing by the scrambling unit. This embodiment can reduce the peak-to-average ratio of the synchronization signal by the above scrambling sequence.
Optionally, the scrambling unit may be specifically configured to: determining the length of the one or more second sequences according to the length of the synchronization signal; determining second preset values corresponding to the one or more second sequences, wherein the second preset values corresponding to each second sequence are the same or different, and the second preset values of the scrambling sequences corresponding to the synchronization sources in the group are the same; and according to the second preset value, each second sequence is circularly shifted to generate the scrambling sequence. In the embodiment of the present invention, the cyclic shift value (i.e. the second preset value) corresponding to the scrambling sequence is obtained according to the group identifier, and for a D2D group, the scrambling sequences used by different synchronization signals have the same cyclic shift, so that the correlation performance between the synchronization signals in the group can be improved, and the scalability is provided for the configuration of the inter-group synchronization signals. Further, when the number of the scrambling sequences is multiple, the second preset values corresponding to at least one scrambling sequence are the same in the group, and the second preset values corresponding to other scrambling sequences are different. In addition, the cyclic shift of the scrambling sequences of different D2D groups may be indicated explicitly or implicitly.
It is noted that, in any embodiment of the present invention, one of the first preset value and the second preset value is determined according to a group identifier; the sequence is generated according to any one or combination of an m sequence and a ZC sequence, namely a synchronization signal is generated according to the m sequence; or, generating a synchronous signal according to the ZC sequence; or, generating a synchronization signal from the m-sequence and the ZC sequence simultaneously.
Under a certain sequence length Q value, different root sequence numbers u correspond to different ZC sequences.
For m sequences, the sequence with the longest period can be generated by m stages of shift registers, and the length of the sequence is 2m1, i.e. the length of the m-sequence may be: 7. 15, 31, 63, 127, 255, etc. The m-sequence is a binary sequence.
On the basis, assuming that the preset values include the first preset value and the second preset value, the synchronization signal generating unit and the scrambling unit may further be configured to: determining the preset value according to the following formula:
f(NGID)＝a*NGID+b
or, f (N)GID)＝(a*NGID+b)mod K
Wherein N isGIDRepresenting the group identity; a and b are predefined constants; f (N)GID) Representing the preset value; k is a system-defined constant; mod denotes the remainder operation.
In the above embodiment, the group identifier is a function of a PD2DSS identifier, or is carried in a first control instruction issued by a network, or is carried in a second control instruction issued by a transmitting device, or is implicitly indicated by the network. Specifically, in a D2D scenario with network coverage, a first control instruction may be sent to the D2D synchronization signal transmitting end through the network, where the first control instruction carries the group identifier. Optionally, the group identifier may be an example carried in a first control instruction issued by the network: for example, in the LTE system, the first Control instruction may be Downlink Control Information (DCI) or Radio Resource Control (RRC) signaling that is sent by an Evolved Node B (eNB) through a cellular link in a Downlink. If the network configures the same group identifier for different D2D synchronization signal transmitting terminals, the D2D synchronization signal transmitting terminals belong to a group; if the network configures different group ids for different D2D synchronization signal transmitters, the D2D synchronization signal transmitters belong to different groups. Alternatively, the group identifier may be an identifier in Scheduling Assignment control Signaling (SA) for D2D, which indicates the group identifier of the UE receiving SA signaling in generating the synchronization signal.
In addition, for different first sequences, the synchronization signal generation unit may be further configured to: determining the ID of the synchronous signal according to a first preset value corresponding to each first sequence; or, determining the ID of the synchronization signal according to a first preset value and a PD2DSS identifier corresponding to each of the first sequences; or, according to any one value in the first preset values of the first sequences, determining the ID of the synchronization signal; or, determining the ID of the synchronization signal according to any one value of the first preset values of the first sequences and the PD2DSS identifier.
Alternatively, the baseband signal acquisition module 32 may include: a mapping unit, configured to map the synchronization signal to a subcarrier to obtain a frequency domain signal; and the acquisition unit is used for acquiring a time domain signal according to the frequency domain signal acquired by the mapping unit.
The mapping of the synchronization signal to a subcarrier to obtain a frequency domain signal may specifically be: and mapping each sequence included in the synchronization signal to a subcarrier to obtain a frequency domain subcarrier signal corresponding to each sequence, and further obtaining the frequency domain signal, wherein the frequency domain signal includes the frequency domain subcarrier signal. For example, 2 sequences with a length of 31 may be respectively mapped to parity subcarriers, or may occupy 31 continuous subcarriers, or may be mapped to a total of 62 subcarriers in other manners; the mapping method of the length-63 sequence to 63 subcarriers is similar to the above example, and the length-63 sequence may be mapped to 63 subcarriers consecutively, or one of the length-63 sequences may be mapped to 63 subcarriers by any other method.
In a feasible mapping manner, the synchronization signal includes at least one first synchronization signal and at least one second synchronization signal, and the first sequences corresponding to each of the first synchronization signals and each of the second synchronization signals are the same or different, then the mapping unit may specifically be configured to: mapping each first synchronization signal to a corresponding first position, mapping each second synchronization signal to a corresponding second position, and obtaining the baseband signal frequency domain signal, where the first position corresponding to each first synchronization signal and the second position corresponding to each second synchronization signal are located at different symbol positions in the same subframe, or the first position corresponding to each first synchronization signal and the second position corresponding to each second synchronization signal are located in different subframes.
In another possible mapping manner, the synchronization signal may further include at least one third synchronization signal, and a sequence corresponding to the third synchronization signal is the same as or different from a sequence corresponding to the first synchronization signal and the second synchronization signal, and then the mapping unit may further be configured to: and mapping each third synchronization signal to a corresponding third position thereof to obtain the frequency domain signal, wherein the third position corresponding to each third synchronization signal, the first position corresponding to each first synchronization signal and the second position corresponding to each second synchronization signal are respectively located at different symbol positions in the same subframe, or the first position corresponding to each first synchronization signal, the second position corresponding to each second synchronization signal and the third position corresponding to each third synchronization signal are respectively located in different subframes.
The number of sequences for generating the synchronization signal is determined by the length of the sequence available for the synchronization signal. According to the length of the synchronous signal, one or more sequences with the same length are determined to generate the synchronous signal. For example, if the length of the synchronization signal is not more than 72, then if m-sequences are used, the preferred sequence length is: 62 or 63. When the length of the synchronization signal is 62, the synchronization signal can be generated by 2 m sequences with the length of 31; or, when the length of the synchronization signal is 63, determining that the synchronization signal with the length of 63 can be generated according to an m sequence with the length of 63; other things are similar and are not listed here.
As a practical application of the embodiment of the present invention, if the sequence is an m-sequence with a length of 31, the primitive polynomial of the one or more sequences is any one of the following polynomials or any combination thereof:
Figure GPA0000215666380000281
Figure GPA0000215666380000282
Figure GPA0000215666380000283
Figure GPA0000215666380000284
Figure GPA0000215666380000285
wherein the content of the first and second substances,
Figure GPA0000215666380000287
is an integer having a value range ofmod 2 denotes a 2 remainder.
As another practical application of the embodiment of the present invention, if the sequence is an m-sequence with a length of 63, the primitive polynomial of the one or more sequences is any one of the following polynomials or any combination thereof:
Figure GPA0000215666380000289
Figure GPA00002156663800002810
Figure GPA00002156663800002811
Figure GPA00002156663800002812
Figure GPA00002156663800002813
Figure GPA00002156663800002814
wherein the content of the first and second substances,
Figure GPA00002156663800002815
is an integer having a value range of
Figure GPA00002156663800002816
mod 2 denotes a 2 remainder.
Further, the obtaining unit may be specifically configured to: obtaining the baseband signal from the frequency domain signal by using OFDM; or, obtaining the baseband signal from the frequency domain signal by SC-FDMA.
When the obtaining unit obtains the baseband signal from the frequency domain signal by using OFDM, the obtaining unit is specifically configured to: obtaining the baseband signal according to the following formula:
Figure GPA0000215666380000291
wherein t represents a time argument of said baseband signal s (t);
Figure GPA0000215666380000292
Figure GPA0000215666380000293
Δ f is the subcarrier spacing; a iskIs the value of the frequency domain data after mapping to the corresponding subcarrier;
Figure GPA0000215666380000294
whereinIndicates the number of Resource blocks (RB for short) allocated in the system bandwidth,
Figure GPA0000215666380000296
indicating the size of the resource block in the frequency domain,
Figure GPA0000215666380000297
and N is the number of subcarriers configured in the system bandwidth.
When the obtaining unit obtains the baseband signal from the frequency domain signal by using SC-FDMA, the obtaining unit is specifically configured to: obtaining the baseband signal according to the following formula:
Figure GPA0000215666380000298
wherein t represents a time argument of said baseband signal s (t);Δ f is the subcarrier spacing; a iskIs the value of the frequency domain data after mapping to the corresponding subcarrier;
Figure GPA00002156663800002910
wherein
Figure GPA00002156663800002911
Indicates the number of RBs configured in the system bandwidth,
Figure GPA00002156663800002912
indicating the size of the resource block in the frequency domain,
Figure GPA00002156663800002913
and N is the number of subcarriers configured in the system bandwidth.
Fig. 4 is a schematic structural diagram of a second apparatus for sending a synchronization signal according to the present invention. As shown in fig. 4, this embodiment is based on the embodiment shown in fig. 3, and further, the apparatus 40 may further include: the transform module 41 is configured to perform DFT on the synchronization signal to obtain a transformed signal; the obtaining unit is configured to map the transformed signal to a subcarrier by using SC-FDMA to obtain the baseband signal.
The apparatus of this embodiment may be used to implement the technical solution of the method embodiment shown in fig. 12, and the implementation principle and the technical effect are similar, which are not described herein again.
In this embodiment, the transformation module 41 may be specifically configured to: obtaining the transformed signal according to the following formula:
Figure GPA00002156663800002914
wherein l represents the argument of said synchronization signal d (l); l is the length of the synchronous signal; (n) represents the transformed signal obtained after DFT is performed on the synchronous signal, n is more than or equal to 0 and less than or equal to L-1; j denotes an imaginary unit.
On the basis of the above embodiment, the first sending module 33 may be specifically configured to: converting the baseband signal by radio frequency to obtain a radio frequency signal; and after a preset period is reached, the radio frequency signal is sent out.
In the communication scenario of D2D, the cross-correlation value between the synchronization signals generated by the synchronization signal sending apparatus provided in the embodiment of the present invention is small, and the synchronization detection time of the synchronization signal receiving end can be reduced, so that the receiving end of the synchronization signal can implement fast synchronization with the sending end according to the synchronization signal, thereby improving the performance of the system.
Fig. 5 is a schematic structural diagram of a synchronization signal receiving apparatus according to a first embodiment of the present invention. The embodiment of the invention provides a receiving device of a synchronous signal, which can be integrated in signal receiving equipment such as UE (user equipment) and a base station. As shown in fig. 5, the synchronization signal receiving apparatus 50 includes: a receiving module 51 and a processing module 52.
The receiving module 51 is configured to receive a synchronization signal, where the synchronization signal is generated by a transmitting end according to one or more sequences, and lengths of the one or more sequences are determined according to the length of the synchronization signal; the processing module 52 is configured to detect the synchronization signal received by the receiving module 51 to obtain synchronization with a transmitting end of the synchronization signal.
The receiving device of the synchronization signal in this embodiment is provided corresponding to the transmitting device shown in fig. 3 or fig. 4, that is, after receiving the synchronization signal transmitted by a certain transmitting device, the receiving device realizes synchronization with the transmitting device, and performs D2D communication. In addition, the transmitting apparatus and the receiving apparatus may be provided separately or may be integrated together in the same communication device (for example, a mobile phone), that is, one communication device may exist as both the transmitting apparatus and the receiving apparatus.
The apparatus of this embodiment may be used to implement the technical solution of the method embodiment shown in fig. 13, and the implementation principle and the technical effect are similar, which are not described herein again.
In the above embodiments, the sequence may be generated from either one of an m-sequence and a ZC-sequence or a combination of both.
Optionally, if the sequence is an m-sequence with a length of 31, the primitive polynomial for generating the one or more sequences is any one or any combination of the following polynomials:
Figure GPA0000215666380000311
Figure GPA0000215666380000312
Figure GPA0000215666380000313
Figure GPA0000215666380000314
Figure GPA0000215666380000315
Figure GPA0000215666380000316
wherein the content of the first and second substances,
Figure GPA0000215666380000317
is an integer having a value range ofmod 2 denotes a 2 remainder.
Optionally, if the sequence is an m-sequence with a length of 63, the primitive polynomial for generating the one or more sequences is any one or any combination of the following polynomials:
Figure GPA0000215666380000319
Figure GPA00002156663800003110
Figure GPA00002156663800003111
Figure GPA00002156663800003113
Figure GPA00002156663800003114
wherein the content of the first and second substances,is an integer having a value range ofmod 2 denotes a 2 remainder.
On the basis of the above, the apparatus 50 may further include a second sending module, and the processing module 52 may be further configured to: detecting whether the receiving module 51 receives the synchronization signal according to a preset criterion; and if the synchronous signal is not detected, triggering the second sending module to send the synchronous signal generated by the device to other receiving ends. Optionally, in this embodiment, the second sending module may be independently arranged, or may be integrally arranged with the receiving module 51, which is not limited in the present invention.
Fig. 6 is a schematic structural diagram of a first apparatus for sending a synchronization signal according to the present invention. The embodiment of the invention provides a sending device of a synchronization signal, which can be used in signal sending devices such as UE (user equipment) and a base station. As shown in fig. 6, the synchronization signal transmission device 60 includes: a first processor 61 and a first transmitter 62.
Wherein the first processor 61 is configured to generate a synchronization signal according to one or more sequences, wherein the length of the one or more sequences is determined according to the length of the synchronization signal; obtaining a baseband signal according to the synchronous signal; the first transmitter 62 is configured to transmit the baseband signal obtained by the first processor 61 after radio frequency conversion.
The device of this embodiment may be configured to execute the technical solutions of the method embodiments shown in fig. 8 or fig. 12, and the implementation principles and technical effects are similar, which are not described herein again.
In the above embodiment, the sequence may include a first sequence, and the first processor 61 may be specifically configured to: determining the length of one or more first sequences according to the length of the synchronization signal; determining first preset values corresponding to the one or more first sequences, wherein the first preset values corresponding to each first sequence are independent from each other; and according to the first preset value, cyclically shifting the one or more first sequences to generate the synchronous signal.
Optionally, the sequence may further include a second sequence, and then the first processor 61 may further be configured to: generating a scrambling sequence from the one or more second sequences; scrambling the synchronous signal at least once by adopting the scrambling sequence; then, the obtaining a baseband signal according to the synchronization signal specifically includes: and obtaining a baseband signal according to the synchronous signal after scrambling processing.
Further, the specific process of the first processor 61 generating the scrambling sequence according to the one or more second sequences is as follows: determining the length of the one or more second sequences according to the length of the synchronization signal; determining second preset values corresponding to the one or more second sequences, wherein the second preset values corresponding to each second sequence are the same or different, and the second preset values of the scrambling sequences corresponding to the synchronization sources in the group are the same; and according to the second preset value, each second sequence is circularly shifted to generate the scrambling sequence.
Furthermore, when the number of the scrambling sequences is multiple, the second preset values corresponding to at least one scrambling sequence are the same in the group, and the second preset values corresponding to other scrambling sequences are different.
Wherein one of the first preset value and the second preset value is determined according to a group identifier. Assuming that the preset values include the first preset value and the second preset value, the first processor 61 may further be configured to: determining the preset value according to the following formula:
f(NGID)＝a*NGID+b
or, f (N)GID)＝(a*NGID+b)mod K
Wherein N isGIDRepresenting the group identity; a and b are predefined constants; f (N)GID) Representing the preset value; k is a system-defined constant; mod denotes the remainder operation.
It should be noted that the group identifier is a function of a PD2DSS identifier, or is carried in a first control instruction issued by a network, or is carried in a second control instruction issued by a transmitting device, or is implicitly indicated by the network; the sequences are generated from either or a combination of m-sequences and ZC-sequences.
For a different first sequence, the first processor 61 may be further configured to: determining the ID of the synchronous signal according to a first preset value corresponding to each first sequence; or, determining the ID of the synchronization signal according to a first preset value and a PD2DSS identifier corresponding to each of the first sequences; or, according to any one value in the first preset values of the first sequences, determining the ID of the synchronization signal; or, determining the ID of the synchronization signal according to any one value of the first preset values of the first sequences and the PD2DSS identifier.
In the above embodiment, the first processor 61 is configured to obtain a baseband signal according to the synchronization signal, specifically: the first processor 61 is configured to map the synchronization signal to a subcarrier to obtain a frequency domain signal; and obtaining a time domain signal according to the frequency domain signal.
Further, the synchronization signal includes at least one first synchronization signal and at least one second synchronization signal, and the first sequences corresponding to each of the first synchronization signals and each of the second synchronization signals are the same or different, then the first processor 61 is configured to map the synchronization signal onto a subcarrier to obtain a frequency domain signal, specifically: the first processor 61 is configured to map each of the first synchronization signals to a corresponding first position thereof, map each of the second synchronization signals to a corresponding second position thereof, and obtain the baseband signal frequency domain signal, where the first position corresponding to each of the first synchronization signals and the second position corresponding to each of the second synchronization signals are located at different symbol positions in the same subframe, respectively, or the first position corresponding to each of the first synchronization signals and the second position corresponding to each of the second synchronization signals are located in different subframes, respectively.
Further, the synchronization signals further include at least one third synchronization signal, and a sequence corresponding to the third synchronization signal is the same as or different from a sequence corresponding to the first synchronization signal and the second synchronization signal, the first processor 61 is configured to map the synchronization signals onto subcarriers to obtain frequency domain signals, specifically: the first processor 61 is configured to map each of the third synchronization signals to a corresponding third position thereof, so as to obtain the frequency domain signal, where the third position corresponding to each of the third synchronization signals, the first position corresponding to each of the first synchronization signals, and the second position corresponding to each of the second synchronization signals are located in different symbol positions in the same subframe, respectively, or the first position corresponding to each of the first synchronization signals, the second position corresponding to each of the second synchronization signals, and the third position corresponding to each of the third synchronization signals are located in different subframes, respectively.
On the basis of the above, in a scenario, if the sequence is an m-sequence with a length of 31, the primitive polynomial of the one or more sequences is any one of the following polynomials or any combination thereof:
Figure GPA0000215666380000343
Figure GPA0000215666380000345
Figure GPA0000215666380000346
wherein the content of the first and second substances,is an integer having a value range of
Figure GPA0000215666380000348
mod 2 denotes a 2 remainder.
In another scenario, if the sequence is an m-sequence with a length of 63, the primitive polynomial of the one or more sequences is any one or any combination of the following polynomials:
Figure GPA0000215666380000349
Figure GPA00002156663800003410
Figure GPA00002156663800003411
Figure GPA00002156663800003412
Figure GPA00002156663800003413
Figure GPA00002156663800003414
wherein the content of the first and second substances,
Figure GPA00002156663800003415
is an integer having a value range of
Figure GPA00002156663800003416
mod 2 denotes a 2 remainder.
In the above embodiment, the first processor 61 is configured to obtain a time domain signal according to the frequency domain signal, specifically: a first processor 61 is configured to obtain the baseband signal from the frequency domain signal by using OFDM; alternatively, the first processor 61 is configured to obtain the baseband signal from the frequency domain signal using SC-FDMA.
As an embodiment of obtaining the baseband signal, the first processor 61 is configured to obtain the baseband signal from the frequency domain signal by using OFDM, specifically: the first processor 61 is configured to obtain the baseband signal according to the following formula:
Figure GPA00002156663800003417
wherein t represents a time argument of said baseband signal s (t);
Figure GPA00002156663800003418
Figure GPA00002156663800003419
Δ f is the subcarrier spacing; a iskIs the value of the frequency domain data after mapping to the corresponding subcarrier;
Figure GPA0000215666380000351
wherein
Figure GPA0000215666380000352
Indicates the number of RBs configured in the system bandwidth,indicating the size of the resource block in the frequency domain,
Figure GPA0000215666380000354
and N is the number of subcarriers configured in the system bandwidth.
As another embodiment of obtaining a baseband signal, the first processor 61 is configured to obtain the baseband signal from the frequency domain signal by using SC-FDMA, specifically: the first processor 61 is configured to obtain the baseband signal according to the following formula:
Figure GPA0000215666380000355
wherein t represents a time argument of said baseband signal s (t);
Figure GPA0000215666380000356
Δ f is the subcarrier spacing; a iskIs the value of the frequency domain data after mapping to the corresponding subcarrier;
Figure GPA0000215666380000357
wherein
Figure GPA0000215666380000358
Indicates the number of RBs configured in the system bandwidth,
Figure GPA0000215666380000359
indicating the size of the resource block in the frequency domain,
Figure GPA00002156663800003510
and N is the number of subcarriers configured in the system bandwidth.
In another embodiment, optionally, the first processor 61 may further be configured to: performing DFT on the synchronous signal to obtain a converted signal; the first processor 61 is configured to map the synchronization signal to a subcarrier by using SC-FDMA to obtain the baseband signal, specifically: the first processor 61 is configured to map the transformed signal onto subcarriers using SC-FDMA to obtain the baseband signal.
The first processor 61 is configured to perform DFT on the synchronization signal to obtain a transformed signal, which specifically is: the first processor 61 is configured to obtain the transformed signal according to the following formula:
Figure GPA00002156663800003511
wherein l represents the argument of said synchronization signal d (l); l is the length of the synchronous signal; (n) represents the transformed signal obtained after DFT is performed on the synchronous signal, n is more than or equal to 0 and less than or equal to L-1; j denotes an imaginary unit.
In the above embodiment, the first transmitter 62 may be specifically configured to: performing radio frequency conversion on the baseband signal obtained by the first processor to obtain a radio frequency signal; and after a preset period is reached, the radio frequency signal is sent out.
Fig. 7 is a schematic structural diagram of a first embodiment of a synchronization signal receiving apparatus according to the present invention. The embodiment of the invention provides a receiving device of a synchronization signal, which can be used in signal receiving devices such as UE (user equipment) and a base station. As shown in fig. 7, the synchronization signal receiving apparatus 70 includes: a receiver 71 and a second processor 72.
The receiver 71 is configured to receive a synchronization signal, where the synchronization signal is generated by a transmitting end according to one or more sequences, and lengths of the one or more sequences are determined according to the length of the synchronization signal; the second processor 72 is configured to detect the synchronization signal received by the receiver 71 to obtain synchronization with the transmitting end of the synchronization signal.
The apparatus of this embodiment may be used to implement the technical solution of the method embodiment shown in fig. 13, and the implementation principle and the technical effect are similar, which are not described herein again.
In the above-described embodiment, the sequence is generated from either one of an m-sequence and a ZC-sequence or a combination of both.
Optionally, if the sequence is an m-sequence with a length of 31, the primitive polynomial for generating the one or more sequences is any one or any combination of the following polynomials:
Figure GPA0000215666380000361
Figure GPA0000215666380000362
Figure GPA0000215666380000363
Figure GPA0000215666380000364
Figure GPA0000215666380000365
Figure GPA0000215666380000366
wherein the content of the first and second substances,
Figure GPA0000215666380000367
is an integer having a value range of
Figure GPA0000215666380000368
mod 2 denotes a 2 remainder.
Further, if the sequence is an m-sequence of length 63, the primitive polynomial generating the one or more sequences is any one or any combination of the following polynomials:
Figure GPA0000215666380000369
Figure GPA00002156663800003610
Figure GPA00002156663800003611
Figure GPA00002156663800003612
Figure GPA00002156663800003613
Figure GPA00002156663800003614
wherein the content of the first and second substances,
Figure GPA00002156663800003615
is an integer having a value range of
Figure GPA00002156663800003616
mod 2 denotes a 2 remainder.
On the basis of the above, the receiving device 70 may further include a second transmitter, and the second processor 72 may be further configured to: detecting whether the receiver 71 receives the synchronization signal according to a preset criterion; and if the synchronous signal is not detected, triggering the second transmitter to transmit the synchronous signal generated by the receiving equipment to other receiving ends. In this embodiment, the second transmitter may be provided independently, or may be provided integrally with the receiver 71, and the invention is not limited thereto.
Fig. 8 is a flowchart illustrating a method for sending a synchronization signal according to a first embodiment of the present invention. The embodiment of the invention provides a method for sending a synchronization signal, which is used for realizing synchronization between a sending end and a receiving end of the synchronization signal, and can be executed by a sending device of the synchronization signal, and the device can be integrated in signal sending equipment such as UE (user equipment), a base station and the like. As shown in fig. 8, the method for transmitting the synchronization signal includes:
and S301, generating a synchronization signal according to one or more sequences, wherein the length of the one or more sequences is determined according to the length of the synchronization signal.
Specifically, if the sequence includes a first sequence, S301 specifically is: determining the length of one or more first sequences according to the length of the synchronous signal; determining first preset values corresponding to one or more first sequences, wherein the first preset values corresponding to each first sequence are independent; and according to the first preset value, cyclically shifting the one or more first sequences to generate a synchronous signal.
For different first sequences, the relationship between the first preset value and the Identification (Identification, abbreviated as ID) of the synchronization signal corresponding to each first sequence includes a plurality of types, which are introduced as follows:
in a specific implementation manner, the ID of the synchronization signal is determined according to a first preset value corresponding to each first sequence. I.e. all the first preset values jointly correspond to the ID of the synchronization signal. For example, theoretically, for an m-sequence with a length of 63, the synchronization signals generated by 2 independent m-sequences can be mapped to at most 63 × 63 — 3969 IDs, i.e., 3969 different synchronization signals are obtained.
In another specific implementation manner, the ID of the synchronization signal is determined according to the first preset value and the PD2DSS identifier corresponding to each first sequence. For example, 63 IDs can be mapped to one m-sequence with a length of 63, and if there are 3 different PD2DSS sequences, 3 × 63 — 189 sync signal IDs can be mapped in total.
In another specific implementation manner, the ID of the synchronization signal is determined according to any one of the first preset values of each first sequence. I.e., any one of the first preset values can uniquely determine the ID of the synchronization signal. The purpose of this is: if there is strong interference with the adjacent synchronization source at the position of a certain first preset value, other first preset values are used for distinguishing the adjacent synchronization source. I.e. to ensure that no strong interference occurs between the synchronization signals from adjacent synchronization sources. In this implementation, for a length 63 sequence, a maximum of 63 different synchronization signals can be indicated within a group, and scrambling sequences can be used to distinguish between different groups.
In another specific implementation manner, the ID of the synchronization signal is determined according to any one of the first preset values of each first sequence and the PD2DSS identifier. I.e. the ID of the synchronization signal can be expressed as: and Nid ═ f (identified by PD2DSS), where Nid denotes the ID of the synchronization signal, x denotes the first preset value, and f denotes a function of the intra-bracket part (identified by PD2DSS and the first preset value). For example, Nid ═ x mod NmaxOr Nid ═ (x + PD2DSS identity) mod NmaxWherein N ismaxMaximum number of different sources of synchronization represented, e.g. NmaxThis parameter may be predefined by the protocol or may be indicated by signaling, 100 or 60; mod denotes the remainder operation.
In this step, the sequence may be generated from either one of the m-sequence and the ZC-sequence or a combination of both, that is, a synchronization signal is generated from the m-sequence; or, generating a synchronous signal according to the ZC sequence; or, generating a synchronization signal from the m-sequence and the ZC sequence simultaneously.
Among them, m-sequence and ZC (Zadoff-Chu is a kind of sequence named by human name) sequence are specific sequences having excellent correlation properties. The difference in the correlation between the two is: in the periodic autocorrelation of the m-sequence, in addition to the main peak,all cyclic shift values correspond to a correlation value of-1 and for m-sequences scrambled with other m-sequences, the maximum cross-correlation value is approximately:
Figure GPA0000215666380000383
q is the sequence length; in the periodic autocorrelation of ZC sequences, the correlation values corresponding to all cyclic shift values are 0 except the main peak, and the lowest cross-correlation of ZC sequences scrambled by other ZC sequences can reach the minimum
Figure GPA0000215666380000384
For ZC sequences of odd sequence length Q, the following formula is used:
Figure GPA0000215666380000381
or the like, or, alternatively,
wherein j represents an imaginary unit, u is a root sequence number of the ZC sequence, which is an integer prime to the sequence length Q, and d (n) represents a specific value of an index n corresponding to each chip in the ZC sequence.
For a ZC sequence with an even sequence length Q, it is generated according to the following formula:
Figure GPA0000215666380000391
or the like, or, alternatively,
Figure GPA0000215666380000392
wherein j represents an imaginary unit, u is a root sequence number of the ZC sequence, which is an integer prime to the sequence length Q, and d (n) represents a specific value of an index n corresponding to each chip in the ZC sequence.
Under a certain sequence length Q value, different root sequence numbers u correspond to different ZC sequences.
For m sequences, the sequence with the longest period can be generated by m stages of shift registers, and the length of the sequence is 2m1, i.e. the length of the m-sequence may be: 7. 15, 31, 63, 127, 255, etc. The m-sequence is a binary sequence.
The number of sequences for generating the synchronization signal is determined by the length of the sequence available for the synchronization signal. According to the length of the synchronous signal, one or more sequences with the same length are determined to generate the synchronous signal. For example, if the length of the synchronization signal is not more than 72, then if m-sequences are used, the preferred sequence length is: 62 or 63. When the length of the synchronization signal is 62, determining that the synchronization signal with the length of 62 can be generated according to 2 m sequences with the length of 31; or, when the length of the synchronization signal is 63, determining that the synchronization signal with the length of 63 can be generated according to an m sequence with the length of 63; other things are similar and are not listed here.
And S302, obtaining a baseband signal according to the synchronous signal.
Specifically, S302 may include: mapping the synchronous signal to a subcarrier to obtain a frequency domain signal; and obtaining a time domain signal according to the frequency domain signal.
The mapping of the synchronization signal to a subcarrier to obtain a frequency domain signal may specifically be: and mapping each sequence included in the synchronization signal to a subcarrier to obtain a frequency domain subcarrier signal corresponding to each sequence, and further obtaining the frequency domain signal, wherein the frequency domain signal includes the frequency domain subcarrier signal. For example, 2 sequences with a length of 31 may be respectively mapped to parity subcarriers, or may occupy 31 continuous subcarriers, or may be mapped to a total of 62 subcarriers in other manners; the mapping method of the length-63 sequence to 63 subcarriers is similar to the above example, and the length-63 sequence may be mapped to 63 subcarriers consecutively, or one of the length-63 sequences may be mapped to 63 subcarriers by any other method.
In a practical application scenario, for obtaining a time domain signal according to the frequency domain signal, a person skilled in the art can understand that: the frequency domain signal is modulated into a time domain signal. The modulation method may be Orthogonal Frequency Division Multiplexing (OFDM), or Single carrier frequency Division Multiple Access (SC-FDMA), and the specific modulation method is described in detail in the following embodiments.
And S303, transmitting the baseband signal after radio frequency conversion.
Specifically, S303 may include: converting the baseband signal by radio frequency to obtain a radio frequency signal; after a predetermined period, the rf signal is transmitted, for example, to a receiver.
In the communication scene of D2D, the cross-correlation value between the synchronization signals generated by the embodiments of the present invention is small, and the synchronization detection time can be reduced, so that the receiving end of the synchronization signal can implement fast synchronization with the transmitting end according to the synchronization signal, thereby improving the performance of the system.
It is noted that in any embodiment of the present invention, the synchronization source group may include a plurality of synchronization sources, i.e., devices that emit synchronization signals-a transmission source of synchronization signals or a transmitter of synchronization signals. In the D2D communication process, the transmitting end and the receiving end are relatively set up, and the receiving end may also serve as the transmitting end (i.e., a synchronization source) to send a synchronization signal generated by itself to other receiving ends, so as to facilitate synchronization between devices. In addition, the group identifier in the embodiment of the present invention is an identifier of the synchronization source group.
On the basis of the foregoing embodiment, the sequence may further include a second sequence, and then S301 may further include: generating a scrambling sequence from the one or more second sequences; scrambling the synchronous signal at least once by adopting the scrambling sequence; then S302 specifically is: and obtaining a baseband signal according to the synchronous signal after scrambling processing. Wherein the first sequence and the second sequence may be generated according to an m-sequence or a ZC-sequence or a combination of the m-sequence and the ZC-sequence as shown in table 1. This embodiment can reduce the peak-to-average ratio of the synchronization signal by the above scrambling sequence.
TABLE 1
Figure GPA0000215666380000411
Optionally, the generating the scrambling sequence according to one or more second sequences may specifically include: determining the length of the one or more second sequences according to the length of the synchronization signal; determining second preset values corresponding to the one or more second sequences, wherein the second preset values corresponding to each second sequence are the same or different, and the second preset values of the scrambling sequences corresponding to the synchronization sources in the group are the same; and according to the second preset value, each second sequence is circularly shifted to generate a scrambling sequence. In the embodiment of the present invention, the cyclic shift value (i.e. the second preset value) corresponding to the scrambling sequence is obtained according to the group identifier, and for a D2D group, the scrambling sequences used by different synchronization signals have the same cyclic shift, so that the correlation performance between the synchronization signals in the group can be improved, and the scalability is provided for the configuration of the inter-group synchronization signals. Further, when the number of the scrambling sequences is multiple, the second preset values corresponding to at least one scrambling sequence are the same in the group, and the second preset values corresponding to other scrambling sequences are different. In addition, the cyclic shift (second preset value) of the scrambling sequences of different D2D groups may be indicated explicitly or implicitly.
It should be noted that one of the first preset value and the second preset value is determined according to the group identifier. For convenience of description, the first preset value and the second preset value are collectively referred to as preset values.
Wherein, according to the group identifier, the preset value is determined, which may specifically be: the preset value is determined according to the following formula:
f(NGID)＝a*NGID+ b formula (3a)
Or the like, or, alternatively,
f(NGID)＝(a*NGID+b)mod K formula (3b)
Wherein N isGIDRepresenting a group identity; a and b are predefined constants; f (N)GID) Indicating a preset value; k is a constant defined by the system, for example, K can be the maximum number of the synchronization signals in the group indicated by the system; mod denotes the remainder operation.
It should be noted that the group identifier may be a function of the PD2DSS identifier, or carried in a first control instruction issued by the network, or carried in a second control instruction issued by the transmitting device, or implicitly indicated by the network.
Specifically, in a D2D scenario with network coverage, a first control instruction may be sent to the D2D synchronization signal transmitting end through the network, where the first control instruction carries the group identifier. Optionally, the group identifier may be an example carried in a first control instruction issued by the network: for example, in the LTE system, the first Control instruction may be Downlink Control Information (DCI) or Radio Resource Control (RRC) signaling that is sent by an Evolved Node B (eNB) through a cellular link in a Downlink. If the network configures the same group identifier for different D2D synchronization signal transmitting terminals, the D2D synchronization signal transmitting terminals belong to a group; if the network configures different group ids for different D2D synchronization signal transmitters, the D2D synchronization signal transmitters belong to different groups. Alternatively, the group identifier may be an identifier in Scheduling Assignment control Signaling (SA) for D2D, which indicates the group identifier of the UE receiving SA signaling in generating the synchronization signal.
In addition, under the condition of PD2DSS, the D2D synchronous signal transmitting terminals using the same PD2DSS belong to the same group, namely, the group identifier NGIDMay be a function of the PD2DSS identity. This method can be used for both network coverage and non-network coverage scenarios.
In a scene without network coverage, a second control instruction may also be sent to the D2D synchronization signal transmitting end through the transmitting device, where the second control instruction at least carries the group identifier N of the synchronization signalGIDIt acts like when there is a network overlay scenarioThe Evolved Node B (eNB) may be a control device or a certain higher-capability D2D UE.
The implicit indication by the network indicates that, under the condition of network coverage, various information sent by the network can be indicated, and the information is sent to the serving UE by the network. For example, under the condition of network coverage, D2D UEs in the network service range synchronize to the base station 10, as shown in fig. 1, UE 11, UE 12, and UE 13 synchronize to the base station 10 according to downlink synchronization signals (PSS and SSS) sent by the base station 10; for example, the UE 13 as the synchronization source may send out its own generated synchronization signal D2DSS, but at the same time, the UE 13 also uses its own synchronization with the base station 10 as the reference to send the generated D2DSS, that is, when there is network coverage, the synchronization reference of the D2D UE synchronization source is all the synchronization reference of the base station 10, so that the D2DSS sent by the D2DUE synchronization source can be considered to use the same (or the same) synchronization reference source. The same means that each D2D UE uses a serving base station as a synchronization reference; the same means that each D2D UE may use multiple base stations as a synchronization reference, but the multiple base stations are synchronized themselves.
In the case of network coverage, the synchronization sources of the D2DSS using the same synchronization reference source of the serving cell may be grouped, and the same group identity is used in the generation of the D2 DSS. The specific implementation method comprises the following steps: when there is network coverage, all D2D UEs using the same base station (or a plurality of base stations synchronized with each other) as a synchronization reference use the information of the synchronization reference source base station to acquire the group identity when transmitting the D2 DSS. For example, a group identifier is generated using part or all of the information of the cell identifier (physical cell identity, abbreviated as PCID) of the base station.
The cyclic shift (second preset value) of the scrambling sequence employed by the intra-group D2D UEs may be generated by the following identification.
The first method is as follows: according to
Figure GPA0000215666380000431
A group identification is generated and, in response,
Figure GPA0000215666380000432
cell identity for a base station;
the second method comprises the following steps: according to
Figure GPA0000215666380000433
A group identification is generated and, in response,
Figure GPA0000215666380000434
the value of the identifier corresponding to the PSS of the LTE base station may be 0, 1, or 2;
the third method comprises the following steps: according to
Figure GPA0000215666380000435
A group identification is generated and, in response,
Figure GPA0000215666380000436
the value of the identifier corresponding to the SSS of the LTE base station may at least include 0 to 167, and may also include a value greater than 167.
The method for generating the second preset value according to the identifier may be any mapping from the above identifier to the second preset value, that is, an above identifier can generate only one second preset value, for example, the second preset value may be equal to the certain identifier, or the second preset value may be a linear function mapping of the identifier, and the like, and is not limited herein.
On the basis of the foregoing embodiment, if the synchronization signal may include at least one first synchronization signal and at least one second synchronization signal, and the first sequences corresponding to the first synchronization signals and the second synchronization signals are the same or different, then mapping the synchronization signal onto the subcarriers, and obtaining the frequency domain signal may include: and mapping each first synchronization signal to a corresponding first position, mapping each second synchronization signal to a corresponding second position, and obtaining frequency domain signals, wherein the first position corresponding to each first synchronization signal and the second position corresponding to each second synchronization signal are respectively located at different symbol positions in the same subframe, or the first position corresponding to each first synchronization signal and the second position corresponding to each second synchronization signal are respectively located at different subframes.
Further, if the synchronization signal may further include at least one third synchronization signal, and a sequence corresponding to the third synchronization signal is the same as or different from a sequence corresponding to the first synchronization signal and the second synchronization signal, the mapping the synchronization signal onto the subcarrier to obtain the frequency domain signal may further include: and mapping each third synchronization signal to a corresponding third position thereof to obtain a frequency domain signal, wherein the third position corresponding to each third synchronization signal, the first position corresponding to each first synchronization signal and the second position corresponding to each second synchronization signal are respectively located at different symbol positions in the same subframe, or the first position corresponding to each first synchronization signal, the second position corresponding to each second synchronization signal and the third position corresponding to each third synchronization signal are respectively located at different subframes.
Next, the above embodiments will be further explained by different application scenarios.
As a practical application of the embodiment of the present invention, if the sequence is an m-sequence with a length of 31, the primitive polynomial of the one or more sequences is any one of the following polynomials or any combination thereof:
Figure GPA0000215666380000441
wherein the content of the first and second substances,
Figure GPA0000215666380000442
is an integer having a value range of
Figure GPA0000215666380000443
mod 2 denotes a 2 remainder. In formula (4), any primitive polynomial is a sequence represented by 0 and 1.
Here, the generation of the synchronization signal is described by taking SD2DSS as an example. Assuming that the length of the SD2DSS is 62, the SD2DSS can be generated from two m-sequences (i.e., first sequences) of length 31, which are denoted as s, respectively0And s1If d is the same as SD2DSSAAnd dBTwo parts of which，dAAnd s0And s1And d andBand s0And s1The relationships are respectively shown as follows:
dA(n)＝sA(n)
dB(n)＝sB(n)
Figure GPA0000215666380000444
Figure GPA0000215666380000445
is that
Figure GPA0000215666380000446
On the basis of (1) making m0Is obtained by the left cyclic shift of (a),
Figure GPA0000215666380000447
is that
Figure GPA0000215666380000448
On the basis of (1) making m1Obtained by left cyclic shift of (i.e. a
Figure GPA0000215666380000449
Wherein the content of the first and second substances,
Figure GPA0000215666380000451
and
Figure GPA0000215666380000452
the m-sequences are of length 31, and may be the same or different,
Figure GPA0000215666380000453
generating
Figure GPA0000215666380000454
Andprimitive polynomial xkEither or both of the formulas (4) may be used. In any one of the primitive polynomials of formula (4), the initial value may be set to: where x (0) is 0, x (1) is 0, x (2) is 0, x (3) is 0, and x (4) is 1, the initial value may be a nonzero value (i.e., 1), and may be set as: x (0) ═ 1, x (1) ═ 0, x (2) ═ 0, x (3) ═ 0, x (4) ═ 0, and so on. In addition, according to the formula
Figure GPA0000215666380000456
Sequences denoted by 0 and 1 may be mapped to sequences denoted by +1 and-1, and sequences denoted by +1 and-1 are the first sequence and the second sequence in the embodiment of the present invention.
Fig. 9 is an exemplary diagram of SD2DSS according to the second embodiment of the method for transmitting synchronization signals. As shown in FIG. 9, SD2DSS is a signal comprising at least 2 positions occurring at a smaller interval, a first sequence s at a first position and a second positionAAnd sBThe position of occurrence is exchanged; the position intervals may be different symbol positions in one subframe (1ms) or may be separated by several subframes. Alternatively, the transmission period of the SD2DSS is long, typically over 100 milliseconds (ms), for example 2.56 seconds(s), which corresponds to 256 radio frames. The embodiment of the invention periodically transmits the SD2DSS with a longer period so as to increase the probability that the receiving end receives the SD2DSS transmitted by the synchronization source.
It should be noted that fig. 9 is only an exemplary diagram, s, of SD2DSSAAnd sBThe positions mapped to the frequency domain subcarriers may be consecutively and adjacently arranged as shown in fig. 9, or the odd and even subcarriers may be alternately arranged, or other arrangement methods may be used. It is ensured that two s of length 31AAnd sBIt is sufficient to correspond to different positions of a total of 62 positions. And, sAAnd sBThe corresponding two positions, the first SD2DSS position and the SD2DSS position shown in fig. 9, may be interchanged.
Further, the synchronization signal may be scrambled with a scrambling sequence, i.e. a scrambling sequence
Figure GPA0000215666380000457
In the above formula, c0And c1Is generated according to the m-sequence with the length of 31, and the primitive polynomial corresponding to the m-sequence with the length of 31 is any one or two of the formulas (4).
It is important to point out that the scrambling sequence c is described above0Is to
Figure GPA0000215666380000458
Obtained by cyclic shift with respect to group identity, scrambling sequence c1Is to
Figure GPA0000215666380000459
The cyclic shift acquisition on the group identifier is performed, specifically:
in the formula (8), NGIDAnd representing group identification, wherein specific values of the group identification are indicated in a group in an explicit or implicit mode, and the indication method is explained in more detail in the following embodiments. f. ofk(NGID) Is NGIDMay be formula (3a) or formula (3b), for example, one embodiment is: f. ofk(NGID)＝NGIDAnother embodiment is: f (N)GID)＝NGIDmod K, e.g., K may represent the maximum number of sync sources in a group, or the maximum number of transitions that a sync source can support, etc., where f1(NGID) And f2(NGID) May be the same or different.
Further, a part of the synchronization signal generated according to the formula (7) may be scrambled twice, that is:
Figure GPA0000215666380000461
in formula (9), z1From length 31 m-sequence generationThe m-sequence with the length of 31 is specifically expressed as
Figure GPA0000215666380000463
And may be any of the formulas (4). z is a radical of1Is to be
Figure GPA0000215666380000464
Obtained by performing a cyclic shift with respect to the group identification function, as shown in equation (10):
Figure GPA0000215666380000465
in the formula (10), g (N)GID) Is about NGIDMay be formula (3a) or formula (3b), for example one embodiment is: g (N)GID)＝NGIDAnother embodiment is: f (N)GID)＝NGIDmod K, where K may represent the number of sync sources in a group, or the maximum number of hops a sync source may support, etc. The Peak to Average power ratio (PAPR) of the transmitted synchronization signal can be further reduced by the secondary scrambling of the scrambling sequence obtained according to equation (10).
As a more specific example, the synchronization signal of the embodiment of the present invention is obtained according to the following formula:
Figure GPA0000215666380000466
alternatively, the first and second electrodes may be,
Figure GPA0000215666380000471
as can be seen from equation (11a), for an application scenario with multiple groups, the same group identification N is used when all the synchronization sources in each group transmit SD2DSSGIDGenerating an SD2 DSS; and when there is a new UE to send its generated SD2DSSTo synchronize a source, it needs to first acquire the N indicated in the group to which it belongsGIDInformation, then using the same N as in the groupGIDTo generate the SD2 DSS.
In equation (11b), the SD2DSS signal determined by the synchronization signal is generated from two sequences, one of which is generated and placed at the even sequence position d (2n) and the other of which is generated and placed at the odd sequence position d (2n + 1). Equation (11b) is only an example, and two sequences may be mapped to sequence positions to generate an SD2 DSS.
In the formula (11b), d (2n) is represented by c0(n) performing a scrambling process, c0And (n) the same cyclic shift (second preset value) is arranged in the group, so that the normalized cross-correlation values are all-1, and the quick synchronization between the transmitting end and the receiving end of the synchronization signal can be realized. In addition, d (2n +1) adopts
Figure GPA0000215666380000472
And
Figure GPA0000215666380000473
performing a scrambling process, wherein c1(n) have the same cyclic shift within the group (second preset value),and
Figure GPA0000215666380000475
respectively correspond to z1(n) generating a second different default value of m by cyclic shifting0And m1For realizing m0And m1Effective mutual detection. For example, when d (2n) is disturbed at a first position, m0Cannot be detected (no specific value can be obtained), but in this scenario d (2n) is not disturbed at the same time at the second position, i.e. m1Can be detected by the signal at the second position d (2 n); m is1After the detection, the value of m is substituted into the first position of d (2n +1) to detect m0(because of this secondM of position0Is arranged at
Figure GPA0000215666380000476
And at the same time it is disturbed with a small probability). Therefore, the situation that partial cyclic shift values cannot be detected in partial interference scenes can be avoided.
For example, as shown in FIG. 10, in the first group, UE41 is a first level synchronization source, which uses NGIDGenerate its SD2DSS in a 0 manner, UE 42 and UE 43 join the first group and listen to the SD2DSS sent by UE41 to achieve synchronization with UE 41; similarly, UE 40 is another independent primary synchronization source that acquires the group identification information of the first group and then uses N as well before transmitting the SD2DSSGIDGenerating its own SD2DSS in a 0-wise manner; UE 44 is a second-level synchronization source, and after receiving two synchronization signals transmitted by UE41 and UE 40 at the same time, synchronizes to one or more synchronization sources according to a predetermined policy (e.g., selecting the synchronization position with the largest signal energy, or selecting the weighted position of the two synchronization positions for synchronization). The transmission process of the SD2DSS of the second group on the right side of fig. 10 is similar, and the second group has only one independent first-level synchronization source UE 51 and two second-level synchronization sources UE 52 and UE 53. The UE 45 in the middle of the two groups can receive the synchronization signals from the first group and the second group at the same time, and particularly which group to join to can be selected autonomously according to the behavior of the UE, for example, according to the contents transmitted by the first group and the second group, the UE 45 decides which group to join according to its interest in the contents.
In addition, in the first group, although UE 40, UE41 and UE 44 all emit SD2DSS and the group identifications they use are the same, the SD2DSS they each emit may be different, so as to distinguish the received synchronization signals from the UEs with which they are synchronized. The signal generation of the SD2DSS may be any one of formula (5), formula (7) or formula (9), and the generation of its corresponding first sequence may use different cyclic shifts.
Since the cyclic shift values (i.e., the second preset values) of the scrambling sequences within each group are the same, the cross-correlation of the synchronization signals within the group is equal to the cross-correlation after the cyclic shift of the first sequence. And the first sequence is an m-sequence, and the correlation value between the sequences after cyclic shifts of different sizes of the m-sequence is-1, and is independent of the length of the sequence, so that the cross-correlation value between the SD2DSS and the SD2DSS generated by different synchronization sources according to the method in the same group is-1.
That is, in the first group, the 3 SD2DSS corresponding sequences transmitted by UE 40, UE41 and UE 44 have a cross-correlation value of-1; similarly, in the second group, the 3 corresponding sequences of SD2DSS transmitted by UE 51, UE 52 and UE 53 have a cross-correlation value of-1. Therefore, the invention can greatly reduce the cross correlation of the SD2DSS in the group and improve the synchronous detection performance.
It should be noted that, within a D2D group, the number of synchronous sources is usually limited, and is typically tens, or even only a few or a dozen. In addition, in fig. 10, the UE 45 at the edge of two lines can receive the SD2DSS from the UE 44 and the UE 52 at the same time, and the two synchronization signals come from two different groups, and the cross correlation between them is relatively poor, which is determined by the overlapping area of the two groups.
As an important step of the present invention, the D2D synchronization source group establishment and identification is described below.
The first method comprises the following steps: the PD2DSS used within a group is the same and the group identification is differentiated according to the PD2 DSS. For example, PD2DSS uses Primary Synchronization Signal (PSS) in LTE, and there are 3 different PD2DSS signals (as shown in Table 2), which are adopted in LTE
Figure GPA0000215666380000491
Representing a group identity. Therefore, a UE in the group of the D2D synchronization source that is to transmit the synchronization signal only needs to detect the PD2DSS in the D2DSS transmitted by other D2D synchronization sources to determine which group it is closest to. Then, when a new UE (e.g., UE 40 in fig. 10) transmits SD2DSS, the SD2DSS is transmitted with the group identification of the group. This method belongs to an implicit indication method. The method is suitable for the scene with network coverage and the scene without network coverage.
The second method comprises the following steps: when there is network coverage, the base station, e.g., eNB, indicates the group identity to which it belongs to the transmitter of the D2D synchronization source through signaling (DCI or RRC) in the cellular link. The second method is an explicit indication method.
The third method comprises the following steps: in the absence of network coverage, the information of the group identity to which it belongs is indicated to the transmitter of the D2D sync source by a control device or a D2D UE with a higher level of capability. This control device or high-level-capability D2D UE now functions to coordinate the organization of the distributed network synchronization sources. The third method is an explicit indication method.
And as for the group identification of the synchronization source group, it may be indicated directly or indirectly to the receiver of D2D. The indication method can be as follows: an indication that is indirect through the identification of the D2 DSS; or by control signaling sent at the D2D transmitter to the D2D receiver.
TABLE 2
Figure GPA0000215666380000492
As another practical application of the embodiment of the present invention, if the sequence is an m-sequence with a length of 63, the primitive polynomial of the one or more sequences is any one of the following polynomials or any combination thereof:
Figure GPA0000215666380000501
wherein the content of the first and second substances,is an integer having a value range of
Figure GPA0000215666380000503
mod 2 denotes a 2 remainder. In any one of the primitive polynomials of equation (12), the initial value may be set to: where x (0) is 0, x (1) is 0, x (2) is 0, x (3) is 0, x (4) is 0, and x (5) is 1, the initial value may be a nonzero value (i.e., 1), and may be set as: x (0) is 1, x (1)) 0, 1, etc.
The application scenario is still described by taking the generation of SD2DSS as an example. Assuming that the length of the SD2DSS is 63, the SD2DSS can be generated according to an m sequence (i.e., a first sequence) with the length of 63, and d represents the SD2DSS, then:
on the basis of the formula (13a), further, a synchronization signal configured independently at another position is added, and the two signals are combined together to increase the total number of synchronization source identifiers indicated by the whole synchronization signal.
In the formula (13a) and the formula (13b),and
Figure GPA0000215666380000507
the generation mode of the method is the same as that of the previous application scene, and the difference of the two application scenes is as follows: the length of the synchronization signal and the primitive polynomial used to generate the synchronization signal, the primitive polynomial in this application scenario being any one or more of equations (12). Wherein, the first position and the second position are respectively provided with a sequence with the length of 63, and the two sequences can be the same or different; and the cyclic shift values (i.e. the first preset values) corresponding to the two sequences are configured independently.
Optionally, the synchronization signal generated according to equation (13a) and equation (13b) is scrambled as shown in equation (14a) and equation (14 b):
Figure GPA0000215666380000511
Figure GPA0000215666380000512
in the formula (14a) and the formula (14b), c0And c1The generation mode of the method is the same as that of the last application scene. On the basis of formula (13a) and formula (13b), c0And c1Is the scrambling sequence used for generating SD2DSS, and the scrambling sequence is cyclically shifted according to the group identifier, which is not described herein again.
Further, the synchronization signal generated according to the formula (14b) is secondarily scrambled:
Figure GPA0000215666380000513
an example of the synchronization signal generated according to equation (15) is shown in fig. 11, where the interval between the first position and the second position, i.e. the first interval, and the interval between the second position and the third position, i.e. the second interval, are the same or different in size, and are not limited herein, and the specific sizes of the two intervals may be set according to actual requirements. S in the formula2Can be s0Or s1Can also be according to s0And s1Obtained, may also differ from s0And s1；c2May be c0Or c1Can also be according to c0And c1Obtained, may also differ from c0And c1；m2And m3At m0And m1Taking the median value and m2Is not equal to m3I.e. m2And m3The values of (a) may be: m is2＝m0，m3＝m1Or, m2＝m1，m3＝m0. In this embodiment, the identification of the synchronization signal SD2DSS is represented by m0And m1Joint indication, can indicate a larger identification range of SD2 DSS. In addition, the method of scrambling twice or more of equation (14a) is similar to that described above and will not be described herein again.
The method for generating the synchronization signal provided by the embodiment of the present invention is explained in detail through two practical applications, but the present invention is not limited to the two scenarios, and the method for generating the synchronization signal in different scenarios is similar, and is not described in detail here.
In the above embodiment, obtaining the time-domain signal from the frequency-domain signal may include: obtaining a baseband signal from the frequency domain signal by adopting OFDM; or, SC-FDMA is adopted to obtain a baseband signal from the frequency domain signal.
As an embodiment of obtaining the baseband signal, obtaining the baseband signal from the frequency domain signal using OFDM may include obtaining the baseband signal according to the following formula:
Figure GPA0000215666380000521
wherein t represents the time argument of the baseband signal s (t);
Figure GPA0000215666380000522
Figure GPA0000215666380000523
Δ f is the subcarrier spacing; a iskIs the value of the frequency domain data after mapping to the corresponding subcarrier;wherein
Figure GPA0000215666380000525
Indicates the number of RBs configured in the system bandwidth,
Figure GPA0000215666380000526
indicating the size of the resource block in the frequency domain,
Figure GPA0000215666380000527
and N is the number of subcarriers configured in the system bandwidth.
As another example of obtaining the baseband signal, using SC-FDMA from the frequency domain signal, obtaining the baseband signal may include obtaining the baseband signal according to the following formula:
Figure GPA0000215666380000528
wherein t represents the time argument of the baseband signal s (t);
Figure GPA0000215666380000529
Δ f is the subcarrier spacing; a iskIs the value of the frequency domain data after mapping to the corresponding subcarrier;
Figure GPA00002156663800005210
wherein
Figure GPA00002156663800005211
Indicates the number of RBs configured in the system bandwidth,indicating the size of the resource block in the frequency domain,
Figure GPA00002156663800005213
and N is the number of subcarriers configured in the system bandwidth. The method for acquiring the baseband signal is also suitable for signal transmission based on an LTE uplink SC-FDMA modulation mode.
Optionally, before the synchronization signal is mapped to the subcarrier by using SC-FDMA and the baseband signal is obtained, the synchronization signal sending method may further include: performing Discrete Fourier Transform (DFT) on the synchronous signal to obtain a transformed signal; then, mapping the synchronization signal to the subcarrier by using SC-FDMA, and obtaining the baseband signal specifically comprises: and mapping the converted signal to a subcarrier by adopting SC-FDMA to obtain a baseband signal. The PAPR value of the synchronous signal can be further reduced by carrying out DFT processing on the synchronous signal; for embodiments in which the DFT processing step is not performed, the detection of the synchronization signal may be simplified, and whether to perform DFT processing on the synchronization signal may be determined according to specific requirements.
Specifically, the DFT is performed on the synchronization signal according to the following formula to obtain a transformed signal:
wherein l represents the argument of the synchronization signal d (l); l is the length of the synchronous signal; (n) represents a transformed signal obtained by performing DFT on the synchronization signal, n is greater than or equal to 0 and is less than or equal to L-1; j denotes an imaginary unit.
Fig. 12 is a flowchart illustrating a fifth method for sending a synchronization signal according to an embodiment of the present invention. As shown in fig. 12, this embodiment is based on the embodiment shown in fig. 8, and further, the sending method of the synchronization signal may include:
and S701, generating a synchronous signal according to one or more sequences.
S702, DFT processing is carried out on the synchronous signals to obtain transformed signals.
Wherein the step is an optional step. The synchronization signal generated in S701 may be directly mapped onto the subcarriers, i.e., S703 is performed.
And S703, mapping the transformed signal to a subcarrier to obtain a frequency domain signal.
And S704, obtaining a time domain signal according to the frequency domain signal.
The time domain signal in this step is the baseband signal in the embodiment shown in fig. 8.
S705, the baseband signal is sent out after being processed by radio frequency conversion.
Here, the rf conversion mainly implements frequency modulation, transmission filtering, transmission power amplification, and the like at a transmitting end of the synchronization signal, and aims to convert a generated baseband signal into a radio signal transmitted at a specific frequency so as to be directly transmitted through a corresponding antenna.
The processing method and the actual effect of each step in this embodiment can refer to the above embodiments, and are not described herein again.
Fig. 13 is a flowchart illustrating a synchronization signal receiving method according to a first embodiment of the present invention. The embodiment of the invention provides a method for receiving a synchronization signal, which is used for synchronization between a sending end and a receiving end of the synchronization signal and can be executed by a receiving device of the synchronization signal, and the device can be integrated in signal receiving equipment such as UE (user equipment), a base station and the like. As shown in fig. 13, the method for receiving the synchronization signal includes:
s801, receiving a synchronization signal, wherein the synchronization signal is generated by a transmitting end according to one or more sequences, and the length of the one or more sequences is determined according to the length of the synchronization signal.
S802, the synchronization signal is detected to obtain the synchronization between the sending end and the receiving end of the synchronization signal.
The synchronization of the transmitting end and the receiving end may include time and frequency synchronization, and the like.
The embodiment of the present invention is a receiving end embodiment corresponding to the transmitting end embodiment, and specific actions and effects may refer to the description of the transmitting end embodiment.
As a receiving end of the synchronization signal, firstly, the synchronization signal provided by the present invention, for example, SD2DSS is received; then, detecting the synchronous signal at the position of the synchronous signal to obtain synchronous parameters, such as time and frequency parameters; and then, receiving and demodulating the control information and the data information according to the synchronization parameters.
In the above embodiment, the sequence may include: either one of the m-sequence and the ZC-sequence or a combination of both.
In one embodiment, if the sequence is an m-sequence of length 31, the primitive polynomial to generate the one or more sequences is any one or any combination of the following polynomials:
Figure GPA0000215666380000541
Figure GPA0000215666380000542
Figure GPA0000215666380000543
Figure GPA0000215666380000544
Figure GPA0000215666380000545
Figure GPA0000215666380000546
wherein the content of the first and second substances,
Figure GPA0000215666380000547
is an integer having a value range of
Figure GPA0000215666380000548
mod 2 denotes a 2 remainder.
In another embodiment, if the sequence is an m-sequence of length 63, the primitive polynomial to generate the one or more sequences is any one or any combination of the following polynomials:
Figure GPA0000215666380000549
Figure GPA00002156663800005411
Figure GPA00002156663800005412
Figure GPA00002156663800005413
Figure GPA00002156663800005414
wherein the content of the first and second substances,is an integer having a value range of
Figure GPA00002156663800005416
mod 2 denotes a 2 remainder.
Optionally, the synchronization signal receiving method may further include: detecting whether a synchronous signal is received or not according to a preset criterion; and if the synchronous signal is not detected, the synchronous signal is used as the sending end to send the synchronous signal generated by the sending end to other receiving ends. In this embodiment, when the receiving end detects whether the strength of the synchronization signal is lower than the predefined threshold value according to the preset criterion, for example, at the predefined position, and the synchronization signal is not detected, the device serving as the synchronization signal receiving end may serve as the synchronization signal transmitting end.
Those of ordinary skill in the art will understand that: all or a portion of the steps of implementing the above-described method embodiments may be performed by hardware associated with program instructions. The program may be stored in a computer-readable storage medium. When executed, the program performs steps comprising the method embodiments described above; and the aforementioned storage medium includes: various media that can store program codes, such as ROM, RAM, magnetic or optical disks.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.

Claims (14)

1. A method for transmitting a synchronization signal, comprising:
a D2D device to determine a first sequence and a second sequence; the first sequence is obtained by performing cyclic shift according to a first preset value based on the m sequence, and the second sequence is obtained by performing cyclic shift according to a second preset value based on the m sequence; the D2D devices belong to a group, the group having a plurality of synchronization sources;
the D2D device generating a synchronization sequence with the first sequence using the second sequence as a scrambling sequence; wherein the second preset values of the scrambling sequences of the synchronous sources in the group are the same;
the D2D device generating a synchronization signal according to the synchronization sequence;
the D2D device transmits a signal corresponding to the synchronization signal.
2. The method of claim 1, wherein the first preset value and/or the second preset value is determined according to a group identity.
3. The method of claim 2, wherein the group identification is a function of a primary inter-device communication synchronization signal (PD 2DSS) identification.
4. The method according to one of claims 1-3, comprising:
the length of the synchronization signal is equal to the sum of the length of the first sequence and the length of the second sequence.
5. A method according to one of claims 1-3, characterized in that:
the D2D device transmitting a signal corresponding to the synchronization signal, including:
obtaining a baseband signal according to the synchronous signal;
and transmitting the baseband signal after radio frequency conversion.
6. A method according to claim 2 or 3, characterized in that said group identity is sent by means of control instructions.
7. A method according to claim 2 or 3, characterized in that the group identity is generated from at least one of the following parameters:
the cell identification of the base station, the identification corresponding to the primary synchronization sequence used by the base station, and the identification corresponding to the secondary synchronization sequence used by the base station.
8. A transmission apparatus of a synchronization signal, comprising:
a processor for determining a first sequence and a second sequence; the first sequence is obtained by performing cyclic shift according to a first preset value based on the m sequence, and the second sequence is obtained by performing cyclic shift according to a second preset value based on the m sequence; the sending device of the synchronization signal belongs to a group, and the group has a plurality of synchronization sources;
the processor is configured to generate a synchronization sequence from the second sequence as a scrambling sequence together with the first sequence; wherein the second preset values of the scrambling sequences of the synchronous sources in the group are the same;
the processor is used for generating a synchronous signal according to the synchronous sequence;
a transmitter for transmitting a signal corresponding to the synchronization signal.
9. The apparatus of claim 8, wherein the first preset value and/or the second preset value is determined according to a group identification.
10. The device of claim 9, wherein the group identification is a function of a primary inter-device communication synchronization signal (PD 2DSS) identification.
11. The apparatus according to one of claims 8 to 10, wherein the length of the synchronization signal is equal to the sum of the length of the first sequence and the length of the second sequence.
12. The apparatus according to one of claims 8 to 10, wherein:
the processor is further configured to obtain a baseband signal according to the synchronization signal;
the transmitter, configured to transmit a signal corresponding to the synchronization signal, includes:
and the transmitter transmits the baseband signal after radio frequency conversion.
13. The apparatus of claim 9, wherein the group identifier is sent via control instructions.
14. The apparatus according to claim 9 or 10, wherein the group identity is generated from at least one of the following parameters:
the cell identification of the base station, the identification corresponding to the primary synchronization sequence used by the base station, and the identification corresponding to the secondary synchronization sequence used by the base station.
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