CN105306987B - A kind of device for controlling TS stream interface bit rate outputs - Google Patents

A kind of device for controlling TS stream interface bit rate outputs Download PDF

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Publication number
CN105306987B
CN105306987B CN201510692402.7A CN201510692402A CN105306987B CN 105306987 B CN105306987 B CN 105306987B CN 201510692402 A CN201510692402 A CN 201510692402A CN 105306987 B CN105306987 B CN 105306987B
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stream
output
packets
input
clock
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CN105306987A (en
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潘武聪
邓峰
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Guowei group (Shenzhen) Co., Ltd.
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Shenzhen State Micro Technology Co Ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/41Structure of client; Structure of client peripherals
    • H04N21/418External card to be used in combination with the client device, e.g. for conditional access
    • H04N21/4181External card to be used in combination with the client device, e.g. for conditional access for conditional access
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/43Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
    • H04N21/438Interfacing the downstream path of the transmission network originating from a server, e.g. retrieving encoded video stream packets from an IP network
    • H04N21/4385Multiplex stream processing, e.g. multiplex stream decrypting
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/43Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
    • H04N21/442Monitoring of processes or resources, e.g. detecting the failure of a recording device, monitoring the downstream bandwidth, the number of times a movie has been viewed, the storage space available from the internal hard disk
    • H04N21/4424Monitoring of the internal components or processes of the client device, e.g. CPU or memory load, processing speed, timer, counter or percentage of the hard disk space used

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Databases & Information Systems (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Two-Way Televisions, Distribution Of Moving Picture Or The Like (AREA)

Abstract

The invention discloses a kind of devices for controlling TS stream interface bit rate outputs, described device is arranged between the input of TS streams, output interface, receiving module is flowed including TS, input TS stream bit rate monitoring modules, export TS stream clock generation modules, TS flows output control module, described device receives the TS packets of TS stream output interface outputs, and form the data format of new TS packets, into after row buffering in preset delay time, TS stream input interfaces are flow to according to the new TS stream output clock outputs TS generated inside device.The invention enables CAM can control TS stream interface bit rate outputs, and does not need to the devices such as STB and set a large amount of buffering areas, fully solve the problems such as Transmission between STB and CAM, transmission jitter.

Description

A kind of device for controlling TS stream interface bit rate outputs
Technical field
The present invention relates to the TS streams using MPEG2 standards(Transport Stream)Stablize the control technology of transmission, especially It is related to Conditional Access of Digital Television(CA)CAM exports TS and flow to STB in system(Set Top Box/ set-top boxes)Output code Rate controls and CAM(Condition Access Module/ Conditional Access Modules/CAM cards)Realize PVR(Personal Video Recorder)And Timeshift(Time shifting broadcasting)TS stream bit rate output controls in new application.
Background technology
In digital television system, the clock stringent synchronization of the synchronization mechanism requirement encoder and decoder of audio and video, solution Temporal information needed for code device system is encoded in PCR (Program Clock Reference) and SCR (System Clock Reference) and pass through TS steaming transfer.
It is decoder normally decoded key to avoid decoder buffer overflow, because overflow can cause TS loss of data, It causes decoder that can not be completely received audio and video TS packets, the TS packets comprising PCR and SCR temporal informations, leads to decoder not It can completely decode, flating or Huaping phenomenon occur, influence the normal display of digital TV terminal.
In the system of digital television condition receiver and card separation, the TS packets of STB decoders receive " non-full " of buffering area State does not have physical interface to be output to CAM, and CAM cannot control the output of TS packets to STB with the condition of " non-full ".CAM must be controlled TS packets processed are constant by the delay of CAM, are just avoided that the risk of the reception buffer overflow of STB decoders.
Under conventional implementation of the prior art, the mode that CAM input TS flow clock as output TS stream clocks is driven Dynamic TS packets output, it is constant in TS steaming transfer code checks, preferably reduce the risk of transmission jitter.It is non-in TS steaming transfer code checks Under constant speed conditions, conventional implementation there is a possibility that transmission jitter, i.e., in code check is sudden in the period of of becoming faster, if CAM is dealt with improperly, and STB has the risk for receiving overflow.
Under conventional implementation, the mode that CAM input TS flow clock as output TS stream clocks drives TS packets to export, by In the hysteresis quality of CAM processing TS packets, STB there is a possibility that suspend TS stream input clocks in no TS steaming transfer task, deposit Remained in CAM in TS packets can not export, part TS packet transmission jitters the problem of.
In the new application for realizing PVR and time shifting broadcasting in CAM, the key of realization is:How appropriate TS stream is generated Clock is exported to drive the output of TS packets to STB;How to ensure that the delay of TS stream transmission procedures is fixed, avoid transmission jitter and reception Overflow risk.
Therefore, how to develop and design a kind of device for controlling TS stream interface bit rate outputs, it has also become need what is solved at present One of technical barrier.
Invention content
The present invention proposes a kind of device for controlling TS stream interface bit rate outputs to solve above-mentioned problem of the prior art, Described device is arranged between the input of TS streams, output interface, including:
TS flows receiving module, for receiving the TS packets of TS stream output interface outputs, records each TS packets and completely buffers to institute State the temporal information in device;
TS stream bit rate monitoring modules are inputted, the TS stream bit rate clocks of monitoring TS stream output interface outputs extract TS stream bit rates Clock relative to the system clock of described device average divide coefficient;
TS stream clock generation modules are exported, frequency division coefficient lower limiting value including predeterminable highest output TS stream bit rates and most The frequency division coefficient upper limit value of low output TS code checks, for defining the TS stream output clocks of internal generation(MOCLK)Range of code rates; The output TS stream clock generation modules export the frequency division coefficient lower limiting value of TS stream bit rates or input TS according to preset highest The average divide coefficient of stream bit rate monitoring module extraction generates TS stream output clocks;
TS flows output control module, and including predeterminable fixed delay time, the TS streams output control module control is every A TS packets in described device with preset fixed delay time into after row buffering, by 188 byte contents of TS packets with the TS The code check of stream output clock, which is exported to TS, flows input interface.
The present apparatus can also further set an input TS stream bit rate logging modle, for recording input TS stream bit rate prisons Depending on the average divide coefficient of the TS stream bit rates of module extraction, when current average divide coefficient is less than the average mark of record storage During frequency coefficient, current average divide coefficient is replaced into stored average divide coefficient.
When input TS stream bit rates logging modle record average divide coefficient in the range of the lower limiting value and upper limit value, The output TS stream clock generation modules divide the system clock with average divide coefficient, when generating TS stream outputs Clock;
When input TS stream bit rates logging modle record average divide coefficient outside the range of the lower limiting value and upper limit value, The output TS stream clock generation modules divide the system clock with preset lower limiting value, when generating TS stream outputs Clock.
The TS stream receiving modules of the present apparatus further comprise the reference time counter list for calibrating the temporal information Member, which uses more bit cycle counters, when the counting clock of the counter is the system Clock, counting precision reach nanosecond.TS packet tail monitoring units are further included, for the packet tail after monitoring TS packets since initial position The rising edge of the TS stream bit rate clocks of corresponding TS streams input interface input, and load reference time counter at the packet tail moment The real-time counting value of unit output, obtains completely buffering to the temporal information of described device for current input TS packets.TS streams receive Module includes TS bag data recording units, in the byte content of packet tail moment buffer-stored TS packets.
TS stream output control modules further include TS stream output time comparing units, according to preset fixed delay time, meter The output initial time of the TS packets after each buffering is calculated, and sends the output of TS packets to TS stream output control modules and starts letter Number.
The frequency for the system clock that the present apparatus uses is up to 100,000,000 grades per second, when buffering the timing of time information as TS packets Clock, monitoring input TS stream bit rate signals(MICLK)Sampling clock, the internal TS stream output clocks generated(MOCLK)Frequency dividing Reference clock.
The input of TS that the present apparatus is installed stream, output interface can be set-top box, ahb bus interface, USB interface, Internet interfaces transmit the input of TS streams, output interface relative to CAM.
Compared with prior art, the present invention has the advantages that:
1. the present invention has been fully taken into account in digital television conditional access system, CAM and STB interface compatibility sex chromosome mosaicisms.Cause It is STB in TS packet procedures are transmitted, STB does not need to temporarily transmit TS packets toward CAM for some reason, while during by TS stream inputs Clock stops.When CAM flows the realization method of output clock using TS stream input clocks as TS, in STB stopping times clock to recovered clock During there are problems that TS packet transmission jitters.The present invention is by the way of inside generation TS stream output clocks so that TS packets are defeated The clock for going out to fully rely on internal generation is driven, and the TS stream input clocks of external STB is not depended on, so as to avoid stopping in STB Only inlet flow clock case lower part TS packets transmission jitter problem.
2. the present invention considers to be directed between STB and CAM in TS steaming transfer, if input TS packets use different scrambling class Type, CAM take difference to the descrambling of different scrambling attribute TS packets, and the TS packets of different attribute are defeated from being input to after CAM is handled Delay between going out is not fixed, and there are problems that transmission jitter.The fixed delay that the present invention supports each input TS packets configurable is defeated The function of going out ensures that each input TS packets are transferred to the TS stream input interfaces of STB after the identical residence time, ensures each TS Packet is fixed by the transmission delay of CAM.The realization method does not require STB decoders to open up the buffering area of large capacity, and CAM is used " mode pushed away " TS packets are exported to STB by treated, and STB is preferably avoided to receive buffering area and the wind of overflow or underflow occurs Danger.
3. the present invention considers that CAM is realizing PVR or Timeshift(Time shifting broadcasting)During function, each TS packets output How the determining of initial time, TS stream output clocks lead to the problem of.Invention defines a kind of data formats of new TS packets (Include " 188 byte content " and " corresponding TS packets completely buffer the temporal information at moment ").The broadcasting stage is being realized, according to adjacent The difference of the temporal information for completely buffering the moment of TS packets extracts an average divide coefficient relative to system clock, with system System clock obtains the clock of control TS stream outputs after being divided according to the frequency division coefficient of extraction;Using the completely slow of each TS packets The temporal information for rushing the moment relatively determines the initial time of its output.Based on above-mentioned TS bag datas form, CAM supports processing TS flows source:Other than supporting typical STB, the sources such as ahb bus interface, USB interface, Internet interfaces are supported in also extension TS input datas.
Description of the drawings
Fig. 1 is the structure diagram of the present invention.
Specific embodiment
Below in conjunction with drawings and examples, the module that the present invention will be described in detail as CAM is arranged on STB10(Machine top Box)Relative to the operation principle and process between the input interface and output interface of CMA transmission TS streams.
As shown in Figure 1, the device 20 of the control TS stream interface bit rate outputs of the present invention, monitoring STB10 output interface outputs TS stream bit rate clocks(MICLK), extract TS stream bit rate clocks(MICLK)Relative to system clock(CLK_sys)MICLK point The minimum value of frequency coefficient, using the minimum value of MICLK average divide coefficients to system clock(CLK_sys)It is generated after being divided Internal TS streams output clock(MOCLK), controlling the TS packets of buffering can export after pre-set fixed delay time to STB's Input interface makes TS flow back into STB.
System clock in the present apparatus 20(CLK_sys)It is a high frequency clock, frequency 100M/S(100000000 is per second) Rank, elapsed time clock, monitoring input TS stream bit rate signals as record TS packet buffer time information(MICLK)Sampling when Clock, the internal TS stream interfaces output clock generated(MOCLK)Divided reference clock.
The present apparatus includes 5 modules, respectively TS stream receiving modules 201, input TS stream bit rates monitoring module 202, TS streams Output control module 203, input TS stream bit rates logging modle 204 and output TS stream clocks generation module 205.
TS stream receiving modules 201 are used for receiving the TS streams of the output interface output of STB, and the TS each TS packets flowed are buffered to In the present apparatus, and by each TS package definitions for new TS packets data format after, by TS flow output control module 203 export.
TS stream receiving modules 201 are specific to contain three submodules, respectively reference time counter unit 2011, TS again Packet tail monitoring unit 2012, TS bag datas recording unit 2013.
Reference time counter unit 2011 is the cycle counter of bit more than one, the real-time counting value of counter (Counter_reference)Linear expression temporal information.The counting clock of the counter is the system clock of the present apparatus(CLK_ sys), counting precision reaches ns(Nanosecond)Rank provides the reference time of degree of precision.
TS packet tails monitoring unit 2012 monitors TS packet tails(188th byte)Corresponding STB inputs TS stream bit rate clocks (MICLK)The rising edge of signal.It is effective in the byte content of TS packets(MIVAL=1)In the case of, TS packet tails monitoring unit 2012 Using system clock(CLK_sys)Synchronous TS stream bit rate clocks MICLK obtains internal signal MICLK_ff, i.e., " MICLK " is believed Number use system clock(CLK_sys)Typical digital circuit cross clock domain processing is done, extracts each internal signal MICLK_ff Rising edge pulse(MICLK_ff_rise_edge_x).TS packet tails monitoring unit 2012 monitors each TS packets from initial position (MISTART=1)The rising edge pulse of the 188th MICLK_ff signal after beginning(MICLK_ff_rise_edge_188).TS Packet tail monitoring unit 2012 is at the TS packet tail moment(MICLK_ff_rise_edge_188=1)Load reference time counter list The real-time counting value of 2011 output of member, obtains completely buffering to the temporal information of the present apparatus for current input TS packets.
The record of TS bag datas recording unit 2013 enters 188 byte content of present apparatus TS packets.With TS packet tail monitoring units 2012 realization principle is similar, and TS bag datas recording unit 2013 is in the corresponding sampling instant of 188 byte content of TS packets (MICLK_ff_rise_edge_x=1, x=[1:188]), by the TS packet byte contents of the TS stream output interfaces of STB(MDI[7: 0])The memory space being buffered in TS bag datas recording unit 2013, in the time letter that packet tail moment storage TS packets completely buffer Cease byte content.Two mutually independent FIFO are used in TS bag datas recording unit 2013(First Input First Output)Memory stores the temporal information byte content for completely buffering the moment of TS packets and 188 byte contents of TS packets respectively.
By above three unit, the STB TS packets exported can be defined as newly by TS streams receiving module 201 in the present apparatus The data format of the TS packets of type, i.e., comprising " 188 byte content " and " corresponding TS packets delay completely in the data format of novel TS packets Rush the temporal information at moment ", then exported in the TS of 188 bytes in novel TS packets further according to new TS stream output clocks Hold, not the byte contents such as including temporal information.
The frequency division coefficient configuration register that TS stream bit rates monitoring module 202 includes input TS stream bit rate clock samplings is inputted, The number of the effective TS byte contents of accumulative continuous adjacent is represented for parameter N, N to be configured.In the instruction of the TS byte contents of input In the case of signal is effective, input TS stream bit rates monitoring module 202 monitors that the adjacent number that adds up of the TS stream output interfaces of STB is N Effective TS byte contents span time, extract in the span time comprising system clock (CLK_sys) number statistical value M, The result that M/N is divided exactly is the current average bit rate for inputting TS packets relative to system clock(CLK_sys)MICLK average divides system Number.Above-mentioned indication signal is including MICLK/MOSTRT/MOVAL etc..
It is similar with the realization principle of TS packet tails monitoring unit 2012 and TS bag datas recording unit 2013, continuously it is superimposed phase Adjacent number is N(N=2/4/8/16/32/64/128)Effective TS byte contents correspond to MICLK_ff_rise_edge_x(x=[1: 2]/ [1:4] / [1:8]/ [1:16]/ [1:32]/ [1:64] / [1:128])Span time (Delta_Tn), Delta_Tn correspondence system clocks(CLK_sys)Number aggregate-value is M, and M/N is divided exactly operation and obtained relative to system clock(CLK_ sys)MICLK average divide coefficients.
TS stream bit rates logging modle 204 is inputted by the MICLK average divides coefficient of the current TS packet newly monitored and input Historical record value in TS stream bit rates logging modle 204 compares, if the MICLK average divide coefficients of the TS packets newly monitored are small In inputting the historical record value in TS stream bit rates logging modle 204, then the MICLK average divide coefficient quilts of the TS packets newly monitored Input TS stream bit rates logging modle 204 is updated, covers historical record value.
It exports TS stream clocks generation module 205 and includes two frequency division coefficient threshold values that can be configured:Highest exports TS The frequency division coefficient upper limit value of the frequency division coefficient lower limiting value of code check and minimum output TS code checks.The two threshold values need to meet " most Height output frequency corresponds to frequency division coefficient lower limiting value " less than " minimum output frequency corresponds to frequency division coefficient upper limit value ".Wherein highest is defeated The frequency division coefficient lower limiting value for going out TS code checks is for " certain type STB interfaces support highest MICLK code checks " or " certain standard gauge MICLK maximum transmission bandwidths as defined in model " and propose.Have for the output of input TS stream bit rates monitoring module 202 of the present apparatus Before imitating MICLK average divide coefficients, output TS is supplied to flow the initial frequency division coefficient of clock generation module 205, generated initial The MOCLK clocks of change.
Export frequency division coefficient lower limiting value, minimum output TS that TS stream clocks generation module 205 exports TS code checks according to highest In the MICLK average divides coefficient of 204 record of frequency division coefficient upper limit value and input TS stream bit rates logging modle of code check generates The TS stream output clocks of portion's control(MOCLK).If the MICLK average divide coefficients of input TS stream bit rates logging modle 204 exist In the interval range of two threshold values, then corresponding system clocks of MOCLK in TS code streams clock generation module 205(CLK_sys) Frequency division parameter is otherwise exported using " the MICLK average divides coefficient of 204 record of input TS stream bit rates logging modle " using highest The frequency division coefficient lower limiting value of TS code checks.
Input TS code check rate monotonic incremental stages of the TS stream clocks generation module 205 in STB are exported, input TS stream bit rates Monitoring module 202 extracts MICLK average divides coefficient in monotone decreasing, if what TS stream bit rates logging modle 204 recorded MICLK average divides coefficient meets " two frequency division coefficient threshold values(The frequency division coefficient lower limiting value, minimum of highest output TS code checks Export the frequency division coefficient upper limit value of TS code checks)" interval range, then use system clock(CLK_sys)Obtained TS streams are divided to connect Mouth output clock(MOCLK)In the state of monotonic increase.
Output TS stream clocks generation module 205 monitors that the code check of the input TS stream clocks of STB is incremented by state in real time, in time more New frequency division coefficient exports clock so as to improve the TS stream interfaces of internal generation(MOCLK)Code check, ensure the internal output generated The code check of TS stream clocks (MOCLK) is in monotonic increase or hold mode(Will not taper off state), avoid the TS by the present apparatus The risk of stream output obstruction.
TS stream output control modules 203 include configurable fixed delay parameter(Delay_cfg), for controlling each TS Wrap the residence time in the present apparatus.The base unit of delay is system clock (CLK_sys) period.That is fixed delay parameter With postponing, residence time of each TS packets in the present apparatus is Delay_Time (Delay_Time=system clock CLK_sys weeks Phase × Delay_cfg).
TS stream output control modules 203 include TS stream output times comparing unit 2031, for judging that the present apparatus is each delayed Rush the output initial time of TS packets.The record value for completely buffering the moment of some TS packet is in TS bag datas recording unit 2013 Counter_a;TS stream output times comparing unit 2031 reads the completely slow of the TS packets from TS bag datas recording unit 2013 The record value Counter_a at moment is rushed, is calculated using (Counter_b=Counter_a-Delay_cfg) formula and obtains the TS packets Output initial time value Counter_b, if Counter_b be equal to 2011 real-time counting of current reference time counter unit Output valve(Counter_reference), i.e. equation(Counter_b=Counter_reference)At the time of establishment, TS streams Output time comparing unit(2031)Generate the output enabling signal of corresponding TS packets.
TS stream output control modules 203 control the TS packets for being buffered in the present apparatus to export to STB.Output time ratio is flowed according to TS Compared with the output enabling signal for each TS packets that unit 2031 exports, the TS streams generated with exporting TS stream clocks generation module 205 connect Mouth output clock(MOCLK)Code check, 188 byte contents that corresponding TS packets are read from TS bag datas recording unit 2013 believe Breath is sequentially output to the TS of STB and flows input interface.
In addition to the specific example of above-mentioned STB, the present apparatus can also be handled carries out TS flow data interactions with CAM cards below TS flows source, specifically includes and supports TS input datas in sources such as ahb bus interface, USB interface, Internet interfaces etc..
It should be understood that the above-mentioned description for specific embodiment is more detailed, can not therefore be considered to this The limitation of invention patent protection range, scope of patent protection of the invention should be determined by the appended claims.

Claims (10)

1. a kind of device for controlling TS stream interface bit rate outputs, which is characterized in that described device is arranged on the input of TS streams, output connects Between mouthful, including:
TS flows receiving module(201), for receiving the TS packets of TS stream output interface outputs, record each TS packets and completely buffer to institute State the temporal information in device;
Input TS stream bit rate monitoring modules(202), the TS stream bit rate clocks of monitoring TS stream output interface outputs, extraction TS stream bit rates Clock relative to the system clock of described device average divide coefficient;
Export TS stream clock generation modules(205), frequency division coefficient lower limiting value including predeterminable highest output TS stream bit rates and The frequency division coefficient upper limit value of minimum output TS code checks;The output TS stream clock generation modules export TS streams according to preset highest When the frequency division coefficient lower limiting value of code check or the average divide coefficient of input TS stream bit rates monitoring module extraction generate TS stream outputs Clock;
TS flows output control module(203), including predeterminable fixed delay time, the TS streams output control module control is every A TS packets in described device with preset fixed delay time into after row buffering, the code check that output clock is flowed with the TS exports Input interface is flowed to TS.
2. device as described in claim 1, which is characterized in that described device further includes input TS stream bit rate logging modles (204), TS stream bit rate monitoring modules are inputted for recording(202)The average divide coefficient of the TS stream bit rate clocks of extraction, when work as When preceding average divide coefficient is less than the average divide coefficient of record storage, current average divide coefficient is replaced and has been deposited The average divide coefficient of storage.
3. device as claimed in claim 2, which is characterized in that when input TS stream bit rate logging modles(204)Record is averaged For frequency division coefficient in the range of the lower limiting value and upper limit value, the output TS flows clock generation module with average divide coefficient pair The system clock is divided, and generates TS stream output clocks;
When input TS stream bit rate logging modles(204)The average divide coefficient of record is in the lower limiting value and the range of upper limit value Outside, the output TS stream clock generation modules divide the system clock with preset lower limiting value, generate TS stream outputs Clock.
4. device as described in claim 1, which is characterized in that the frequency of the system clock is up to 100,000,000 grades per second.
5. device as claimed in claim 3, which is characterized in that the TS flows receiving module(201)It is described including being used to calibrate The reference time counter unit of temporal information(2011).
6. device as claimed in claim 5, which is characterized in that the reference time counter unit is using more bit cycle meters Number device, the counting clock of the counter is the system clock, and counting precision reaches nanosecond.
7. device as claimed in claim 5, which is characterized in that the TS flows receiving module(201)It is monitored including TS packets tail Unit(2012), it is defeated for the corresponding TS streams input interface of packet tail of the 188th byte after monitoring TS packets since initial position The rising edge of TS stream bit rate clocks entered, and load reference time counter unit at the packet tail moment(2011)What is exported is real-time Count value obtains completely buffering to the temporal information of described device for current input TS packets.
8. device as described in claim 1, which is characterized in that the TS flows receiving module(201)It is recorded including TS bag datas Unit(2013), in packet header to 188 byte contents of buffer-stored TS packets between the packet tail moment, the TS is stored at the packet tail moment Wrap the temporal information byte content completely buffered.
9. device as claimed in claim 8, which is characterized in that the TS flows output control module(203)It flows and exports including TS Moment comparing unit(2031), according to preset fixed delay time, system clock, buffer-stored TS packets time, calculate every The output initial time of TS packets after a buffering, and flow output control module to the TS(203)It sends the output of TS packets and starts letter Number.
10. the device as described in claim 1 to 9 any one, which is characterized in that the TS streams input, output interface are machine Top box, ahb bus interface, USB interface, Internet interfaces transmit input, the output interface of TS streams relative to CAM.
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