CN105182076A - Two-port network phase shift real-time testing method based on vector network analyzer - Google Patents

Two-port network phase shift real-time testing method based on vector network analyzer Download PDF

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CN105182076A
CN105182076A CN201510600863.7A CN201510600863A CN105182076A CN 105182076 A CN105182076 A CN 105182076A CN 201510600863 A CN201510600863 A CN 201510600863A CN 105182076 A CN105182076 A CN 105182076A
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phase
port
delay
electric delay
vector network
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CN105182076B (en
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胡江
朱侗
郑中万
唐丽蓉
陈駃
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University of Electronic Science and Technology of China
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Abstract

The invention provides a two-port network phase shift real-time testing method based on a vector network analyzer. The testing method comprises the following steps: 1) recording the initial zero phase state of an unanswered delay section; 2) testing the transmission coefficient curve map of a two-port network; 3) marking the initial phase [theta] 0 of a required frequency point f0 on the curve; 4) using the power delay function of a vector network analyzer to realize phase delay compensation; recording the times n that the phase returns to the initial phase [theta]0 before the compensation of the power delay is equal to the delay of the unanswered delay section, and computing the actual inserted phase shift of the two-port network. According to the invention, the test data is processed by a combination of test values based on the vector network analyzer and a basic theory so that accurate phase shift values are attained. In this manner, the test task of accurately measuring a two-port network phase shift can be achieved and the method can be widely applied in a test process to test the microwave components equivalent to two-port networks.

Description

Based on the two-port network phase shift method for real-timely testing of vector network analyzer
Technical field
The invention belongs to modern microwave technical field of measurement and test, particularly a kind of base is based on the two-port network phase shift method for real-timely testing of vector network analyzer.
Background technology
Any one microwave system is all be formed by connecting by various microwave device and microwave transmission line, and the characteristic of microwave transmission line can describe with generalized transmission line equation, and the characteristic of microwave device then available equivalents network describes.The equivalent parameters describing Microwave Net has S parameter, Y parameter, A parameter and Z parameter etc.S parameter is exactly be based upon the network parameter on incident wave, reflection wave relation basis, be suitable for Microwave circuit analysis, with the reflected signal of device interface and be transmitted to another port from this port signal to describe circuit network, can directly obtain with network analyzer measurement.As long as know the scattering parameters of network, just it can be transformed into other matrix parameter.Because of S parameter, there is visual and clear physical significance and be easy to the advantages such as measurement, so current most of components and parts all adopt scattering parameter to describe its characteristic.Wherein, two-port network is the mensuration of most typical Microwave Net, the scattering parameter of any one one port network or multiport network, can have been come by the assay method of Two-port Network Parameters.
To two-port network as shown in Figure 1, its scattering parameter S is defined as follows:
S i j = b i a j | a k = 0 , k ≠ j
In above formula, a ithe incident wave of the i-th port, b ithe outgoing wave of the i-th port, a iand b iall relative to for cross section, this is called reference surface or the end face of the i-th port with reference to cross section.
Physical significance according to the known scattering parameter of definition: S iithe reflection coefficient of the port i when every other port termination matched load, S ijfrom port j to the transmission coefficient of port i when every other port termination matched load.
The insertion phase shift of two-port network is the difference of voltage (or electric current) phase place inserting load before and after network, and two-port network is when matching status, and inserting phase shift is θ iforward transmission coefficient S 21phase angle, i.e. θ i=∠ S 21.
Vector network analyzer is the test macro of a complicated electromagnetic wave energy, be made up of parts such as testing source, power divider, directional coupler, standing-wave ratio (SWR) bridge, test receiver, detecting device, processor and displays, be mainly used to the performance parameter of testing high-frequency element, circuit and system.Vector network analyzer directly can measure the S parameter of two-port network, can be converted into other forms of characterisitic parameter easily again.The basic thought that vector network analyzer measures Two-port Network Parameters is: according to the definition of four S parameter, design specific signal separation unit incident wave, reflection wave, transmission wave are separated, again incident wave, reflection wave, transmission wave frequency are transformed to fixed intermediate frequency by Microwave Linear, finally utilize intermediate frequency amplitude phase measuring method to measure incident wave, reflection wave, the amplitude of transmission wave and phase place.After vector network analyzer records two-port network S parameter, according to formula θ i0=tan -1s 21directly obtain phase shift.And the phase-shift phase of reality should be θ i=2n π+tan -1s 21, namely vector network analyzer can not determine actual formula θ iin n value, but directly got n=0, therefore used vector network analyzer can not determine concrete phase-shift phase.
The phase shift of current use vector network analyzer test two-port network, because of cannot accurately record insertion phase-shift value, many by using simulation software to estimate, can only do phase shift and analyze qualitatively and assess, can not the result of quantitative.
Summary of the invention
The vector network analyzer that the object of the invention is to overcome prior art accurately cannot test the deficiency that two-port network inserts phase shift, a kind of test value adopted based on vector network analyzer is proposed, theory in conjunction with basis processes test data, and then try to achieve phase-shift value accurately, complete accurately test two-port network and insert the two-port network phase shift method for real-timely testing based on vector network analyzer of the test assignment of phase shift.
Element or device for electric signal being postponed a period of time are called lag line.Lag line should have smooth amplitude versus frequency characte and certain phase-shift characterisitc (or time delay frequency characteristic) in passband, and have suitable matched impedance, decay is little.In recent years, along with developing rapidly of electronics industry, these type of components and parts are applied to the fields such as precise guidance, satellite communication and modern radar system.Phase-delay quantity is index to be measured very important in the technical indicator of lag line.Electric signal postpones to be incorporated in two-port network phase shift test by the present invention, utilize in electric delay compensation process, the compensation rate of electric delay equals the state of the retardation postponing section to calculate the actual phase shift amount of two-port network, completes accurately test two-port network and inserts the test assignment of phase shift.
Above object of the present invention is achieved through the following technical solutions: based on the two-port network phase shift method for real-timely testing of vector network analyzer, comprise the following steps:
S1, calibrate vector network analyzer, record does not connect the initial zero phase state postponing section;
S2, by the test port of two of two-port network ports access vector network analyzers, the transmission coefficient S of test two-port network 21, and draw S 21curve map;
S3, at S 21on curve, mark required frequency f 0initial phase θ 0;
S4, carry out phase delay compensation by electric delay function in vector network analyzer, when the compensation rate of electric delay equals the retardation postponing section, record phase place before this and get back to initial phase θ 0frequency n, computing relay phase place, is the actual phase shift amount of the two-port network of insertion:
Further, the acquisition methods of retardation that in step S4, the compensation rate of electric delay equals to postpone section is: continuing to increase in electric delay compensation rate process, S 21the phase slope of curve map becomes positive slope by initial negative slope, and the now compensation of electric delay has exceeded the phase retardation postponing section, stops carrying out electric delay compensation; Readjustment electric delay compensation rate has critical conditions, i.e. a f before phase slope changes 0the phase place at place is 0 °, now S 21the state of curve is identical with the phase state of non-access delay section, and namely the compensation rate of electric delay equals the retardation postponing section.
Further, three phase cyclings are at least included in described vector network analyzer bandwidth.
The invention has the beneficial effects as follows: the method for testing that the present invention proposes solves vector network analyzer accurately cannot test the awkward situation that two-port network inserts phase shift, adopt the test value based on vector network analyzer, theory in conjunction with basis processes test data, and then try to achieve phase-shift value accurately, complete accurately test two-port network and insert the test assignment of phase shift, this method of testing is simple simultaneously, can be widely used in being equivalent in the microwave device test process of two-port network.
Accompanying drawing explanation
Fig. 1 is two-port network schematic diagram;
Fig. 2 does not connect vector network analyzer initial phase when postponing section;
The phase diagram of non-electricity consumption delay disposal when Fig. 3 is 8GHz;
When Fig. 4 is 8GHz, electric delay compensates the phase place of 1 λ;
When Fig. 5 is 8GHz, electric delay compensates the phase place of 2 λ;
When Fig. 6 is 8GHz, electric delay compensates the phase place of 3 λ;
When Fig. 7 is 8GHz, electric delay compensates the phase place of 4 λ;
When Fig. 8 is 8GHz, electric delay compensates the phase place of 5 λ;
When Fig. 9 is 8GHz, electric delay compensates the phase place of 6 λ;
When Figure 10 is 8GHz, electric delay compensates the phase place of 7 λ;
When Figure 11 is 8GHz, electric delay compensates the phase place of 8 λ;
When Figure 12 is 8GHz, electric delay compensates to critical zero phase figure;
When Figure 13 is 8GHz, electric delay compensates the phase diagram exceeding and postpone section delay slope and change;
The phase diagram of non-electricity consumption delay disposal when Figure 14 is 16GHz;
When Figure 15 is 16GHz, electric delay compensates the phase diagram of 1 λ;
When Figure 16 is 16GHz, electric delay compensates the phase diagram of 2 λ;
When Figure 17 is 16GHz, electric delay compensates the phase diagram of 3 λ;
When Figure 18 is 16GHz, electric delay compensates the phase diagram of 4 λ;
When Figure 19 is 16GHz, electric delay compensates the phase diagram of 5 λ;
When Figure 20 is 16GHz, electric delay compensates the phase diagram of 6 λ;
When Figure 21 is 16GHz, electric delay compensates the phase diagram of 7 λ;
When Figure 22 is 16GHz, electric delay compensates the phase diagram of 8 λ;
When Figure 23 is 16GHz, electric delay compensates the phase diagram of 9 λ;
When Figure 24 is 16GHz, electric delay compensates the phase diagram of 10 λ;
When Figure 25 is 16GHz, electric delay compensates the phase diagram of 11 λ;
When Figure 26 is 16GHz, electric delay compensates the phase diagram of 12 λ;
When Figure 27 is 16GHz, electric delay compensates the phase diagram of 13 λ;
When Figure 28 is 16GHz, electric delay compensates the phase diagram of 14 λ;
When Figure 29 is 16GHz, electric delay compensates the phase diagram of 15 λ;
When Figure 30 is 16GHz, electric delay compensates the phase diagram of 16 λ;
When Figure 31 is 16GHz, electric delay compensates to critical zero phase figure;
When Figure 32 is 16GHz, electric delay compensates the phase diagram exceeding and postpone section delay slope and change.
Embodiment
In order to make object of the present invention, technical scheme and advantage clearly understand, below in conjunction with drawings and Examples, the present invention is further elaborated.Should be appreciated that specific embodiment described herein only in order to explain the present invention, be not intended to limit the present invention.
Vector network analyzer directly can measure the S parameter of two-port network, takes suitable result display format directly can read phase-shift phase.Vector network analyzer is simple to operate, simple interface, test result can according to test Man's Demands be set to multiple format, result clear and be easy to read.Namely phase shift method of testing of the present invention is based on above-mentioned vector network analyzer.
Lag line is a kind of element or device that electric signal can be postponed a period of time.In all kinds of electronic device and Communication System Design, in order to coordinate some function needs, usually needing to use lag line, reaching signal the object of signal delay one section of special time.Phase-delay quantity is index to be measured very important in the technical indicator of lag line.In embodiments of the invention, namely the concentric cable of the certain length used is equivalent to the two-port network in above-mentioned explanation, as shown in Figure 1.
Based on the two-port network phase shift method for real-timely testing of vector network analyzer, comprise the following steps:
S1, calibrate vector network analyzer, record does not connect the initial zero phase state postponing section;
S2, by the test port of two of two-port network ports access vector network analyzers, the transmission coefficient S of test two-port network 21, and draw S 21curve map;
S3, at S 21on curve, mark required frequency f 0initial phase θ 0;
S4, carry out phase delay compensation by electric delay function in vector network analyzer, when the compensation rate of electric delay equals the retardation postponing section, record phase place before this and get back to initial phase θ 0frequency n, computing relay phase place, is the actual phase shift amount of the two-port network of insertion:
Further, the acquisition methods of retardation that in described step S4, the compensation rate of electric delay equals to postpone section is: continuing to increase in electric delay compensation rate process, S 21the phase slope of curve map becomes positive slope by initial negative slope, and the now compensation of electric delay has exceeded the phase retardation postponing section, stops carrying out electric delay compensation; Readjustment electric delay compensation rate has critical conditions, i.e. a f before phase slope changes 0the phase place at place is 0 °, now S 21the state of curve is identical with the phase state of non-access delay section, and namely the compensation rate of electric delay equals the retardation postponing section.
Further, three phase cyclings are at least included in described vector network analyzer bandwidth.
Calculating institute's measured frequency respectively is below that 8GHz and 16GHz is to verify the reliability of algorithm of the present invention.
Before testing, needing the selection that test bandwidth is described, owing to needing the change observing bandwidth inner circumferential issue during test phase, therefore needing in bandwidth, at least to include three phase cyclings when selecting.Calibrate vector network analyzer, its frequency of operation is 5GHz-20GHz, and record does not connect the initial zero phase state postponing section, as shown in Figure 2, after completing, concentric cable is accessed the test port of vector network analyzer, tests its S 21curve.The concrete steps that this method of testing is described are chosen, as shown in Fig. 3-32 in test result.
(1) Fig. 3 is the phase curve figure not carrying out a delay disposal; Add mark as previously mentioned at 8GHz place and determine initial phase θ 1=-59.39 °.Electricity consumption delay feature compensates, as phase retardation θ 1first time is when becoming initial phase, phase compensation 1 λ, as shown in Figure 4.Continuous electric delay compensates, and as shown in Fig. 5 ~ 11, can find that the phase cycling in bandwidth constantly reduces from Fig. 5 ~ 11; Figure 12 is the curve map that the present embodiment electric delay compensates to critical zero phase, and Figure 13 is that the present embodiment electric delay compensates the curve map exceeding and postpone section delay slope and change; Contrast Figure 11 and Figure 13 can find that phase slope becomes positive slope by negative slope, the now compensation of electric delay has exceeded the phase retardation postponing section, stops strengthening electric delay compensation rate, and readjustment electric delay compensation rate enters critical conditions, namely 8GHz place phase place is 0 °, S now 21as shown in figure 12, comparison diagram 2 and Figure 12 find that state is now identical with the phase state of non-access delay section to phase curve, and namely electric delay compensation rate is the phase retardation postponing section; Before obtaining critical conditions, phase retardation θ gets back to initial phase θ 1number of times be n 1=8; Therefore the phase place can obtaining this lag line of process delay when 8GHz is:
θ delay1＝8×360°+|-59.39°|＝2939.39°；
(2) with 8GHz place same operation, Figure 14 is the phase diagram that non-electricity consumption delay disposal is; The initial phase θ when 16GHz 2=-117.12 °.Electricity consumption delay feature compensates, as phase retardation θ 2first time is when becoming initial phase, phase compensation 1 λ; As shown in figure 15.Continuous electric delay compensates, and as shown in Figure 16 ~ 30, the phase cycling that can find in bandwidth from Figure 16-30 constantly reduces; Figure 31 is that the present embodiment electric delay compensates to critical zero phase curve map; Figure 32 is that the present embodiment electric delay compensates the curve map exceeding and postpone section delay slope and change.Contrast Figure 30 and Figure 32 can find that phase slope becomes positive slope by negative slope, the now compensation of electric delay has exceeded the phase retardation postponing section, stops strengthening electric delay compensation rate, and readjustment electric delay compensation rate enters critical conditions, namely 16GHz place phase place is 0 °, S now 21as shown in figure 31, comparison diagram 2 and Figure 31 find that state is now identical with the phase state of non-access delay section to phase curve, and namely electric delay compensation rate is the phase retardation postponing section; Before obtaining critical conditions, phase retardation θ gets back to initial phase θ 1number of times be n 1=16; Therefore the phase place can obtaining this lag line of process delay when 16GHz is:
θ delay2＝16×360°+|-117.12°|＝5877.12°
Because institute's measured frequency is the relation of 2 times therefore the relation of phase retardation is also 2 times, can the accuracy of validation test method by the result calculated.
Those of ordinary skill in the art will appreciate that, embodiment described here is to help reader understanding's principle of the present invention, should be understood to that protection scope of the present invention is not limited to so special statement and embodiment.Those of ordinary skill in the art can make various other various concrete distortion and combination of not departing from essence of the present invention according to these technology enlightenment disclosed by the invention, and these distortion and combination are still in protection scope of the present invention.

Claims (3)

1., based on the two-port network phase shift method for real-timely testing of vector network analyzer, it is characterized in that, comprise the following steps:
S1, calibrate vector network analyzer, record does not connect the initial zero phase state postponing section;
S2, by the test port of two of two-port network ports access vector network analyzers, the transmission coefficient S of test two-port network 21, and draw S 21curve map;
S3, at S 21on curve, mark required frequency f 0initial phase θ 0;
S4, carry out phase delay compensation by electric delay function in vector network analyzer, when the compensation rate of electric delay equals the retardation postponing section, record phase place before this and get back to initial phase θ 0frequency n, computing relay phase place, is the actual phase shift amount of the two-port network of insertion:
2. the two-port network phase shift method for real-timely testing based on vector network analyzer according to claim 1, it is characterized in that, in step S4, the compensation rate of electric delay equals to postpone the acquisition methods of retardation of section and is: continuing to increase in electric delay compensation rate process, S 21the phase slope of curve map becomes positive slope by initial negative slope, and the now compensation of electric delay has exceeded the phase retardation postponing section, stops carrying out electric delay compensation; Readjustment electric delay compensation rate has critical conditions, i.e. a f before phase slope changes 0the phase place at place is 0 °, now S 21the state of curve is identical with the phase state of non-access delay section, and namely the compensation rate of electric delay equals the retardation postponing section.
3. the two-port network phase shift method for real-timely testing based on vector network analyzer according to claim 1 and 2, is characterized in that, at least include three phase cyclings in vector network analyzer bandwidth.
CN201510600863.7A 2015-09-18 2015-09-18 Two-port network phase shift method for real-timely testing based on vector network analyzer Expired - Fee Related CN105182076B (en)

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