CN105141315A - Multifunctional anti-radiation serial-parallel conversion device - Google Patents
Multifunctional anti-radiation serial-parallel conversion device Download PDFInfo
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- CN105141315A CN105141315A CN201510575953.5A CN201510575953A CN105141315A CN 105141315 A CN105141315 A CN 105141315A CN 201510575953 A CN201510575953 A CN 201510575953A CN 105141315 A CN105141315 A CN 105141315A
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Abstract
The invention provides a multifunctional anti-radiation serial-parallel conversion device. A particle impurity channel is formed between a first hollow cover body and a second hollow cover body. A clean air-flow channel is formed between a reverse osmosis membrane of the first hollow cover body and an air outlet. The end surface of the reverse osmosis membrane is an arc-shaped surface or a shrunken surface which enables particle impurities to be separated from the reverse osmosis membrane under an outward force. By adopting the above structure, the multifunctional anti-radiation serial-parallel conversion device overcomes the defects in the prior art that impurity particles usually adhere to a serial-parallel conversion circuit and influence the performance of the serial-parallel conversion circuit, and in the impurity particle removing process, the removing difficulty is high for an existing device for removing the impurity particles.
Description
Technical field
The invention belongs to serioparallel exchange technical field, be specifically related to a kind of serioparallel exchange device of multi-functional Flouride-resistani acid phesphatase.
Background technology
Serioparallel exchange electronic equipment is more vulnerable to glitch, also will study the single particle phenomenon that high energy particle causes, just introduce the measure of Flouride-resistani acid phesphatase thus while of therefore not only will considering the impact of total radiation dose in the design process of serioparallel exchange electronic system.Under the measure introducing Flouride-resistani acid phesphatase, the setting of parts will inevitably be increased, in addition along with the raising of integrated level, string turns and the trend toward miniaturization of circuit is also more and more higher, the inevitable like this temperature that string will be made to turn also circuit raises, thus affect the normal operation of equipment, so just need the air allowing string turn also circuit surrounding environment to keep flowing, take away string constantly to turn and the heat of circuit, but due in air often with a large amount of impurity particle things, these impurity particle things be often attached to string turn and circuit in, so also to turn string and the performance of circuit brings bad impact.Often to remove difficulty when removal of impurity particle large for the device of existing removal of contamination particle in addition.
Summary of the invention
Object of the present invention provides a kind of serioparallel exchange device of multi-functional Flouride-resistani acid phesphatase, granule foreign path is formed between first hollow cover body and the second hollow cover body, form clean gas path between the reverse osmosis membrane of the first described hollow cover body and air outlet, the end face of described reverse osmosis membrane to allow granule foreign order about down the surface by the arcuate surface that reverse osmosis membrane is separated or tapering shape in outward force.The impurity particle thing that such structure avoids prior art is often attached to string and turns and to turn string in circuit and the performance of circuit brings bad impact, the device of existing removal of contamination particle often removes the large defect of difficulty when removal of impurity particle.
In order to overcome deficiency of the prior art, the invention provides a kind of solution of serioparallel exchange device of multi-functional Flouride-resistani acid phesphatase, specific as follows:
A kind of serioparallel exchange device of multi-functional Flouride-resistani acid phesphatase, comprise serial-parallel conversion circuit, described serial-parallel conversion circuit is placed in removal of contamination equipment, the device source region ring-shaped gate of described serial-parallel conversion circuit is surrounded, removal of contamination equipment described in addition contains the first hollow cover body 108 and the second hollow cover body 109 be arranged in the first hollow cover body 108, in the first described hollow cover body 108, motor 1010 is installed, the motor drive shaft of described motor 1010 is installed with the first supply fan 102, one of the first described hollow cover body 108 is air intake vent, the other end of the first described hollow cover body 108 is granule foreign export mouths, described granule foreign export mouth upper cover the meshed lid 106 of band, one of the second described hollow cover body 109 is air intake vent, the air intake vent position cover of the second described in addition hollow cover body 109 is around reverse osmosis membrane 103, the second described hollow cover body 109 is also provided with air outlet, described air outlet is through the first described hollow cover body 108, the second supply fan 107 into motor 1010 starts is installed in the second described in addition hollow cover body 109, the second described supply fan 107 is all installed on the motor drive shaft of motor 1010 with reverse osmosis membrane 103, other second supply fan 107 is arranged between motor 102 and reverse osmosis membrane 103, described serial-parallel conversion circuit is arranged in the second hollow cover body 109, granule foreign path 105 is formed between the first described hollow cover body 108 and the second hollow cover body 109, form clean gas path 104 between the reverse osmosis membrane 103 of the first described hollow cover body 108 and air outlet, the end face of described reverse osmosis membrane 103 to allow granule foreign order about down the surface by the arcuate surface that reverse osmosis membrane 103 is separated or tapering shape in outward force.
Described ring-shaped gate can be replaced by the straight grid of Poly bag source and drain.
Described serial-parallel conversion circuit comprises TTL interface 101, described TTL interface 101 is with Clock Signal pin, the input pin of the data DATA of the first control signal SEL pin and TTL signal, described TTL interface 101 is connected with the serial shift register 2 of 26bit, the serial shift register 2 of described 26bit is connected with the data latches 3 of 26bit, the serial shift register 2 of described 26bit comprises 2 bit shift register 4 that order is connected successively, one 12 bit shift register the 5 and the 2 12 bit shift register 6, and the data latches 3 of 26bit comprises the 2 bit data latchs 7 that order is successively connected, one 12 bit data latch the 8 and the 2 12 bit data latch 9, the serial shift register 2 of described 26bit is subject to the control of the second control signal DARY, 2 described bit shift register 4, one 12 bit shift register the 5 and the 2 12 bit shift register 6 is respectively with 2 bit data latchs 7, one 12 bit data latch 8 is connected with the 2 12 bit data latch 9, described, one 12 bit data latch 8 and the 2 12 bit data latch 9 also select 1 selector 10 to be connected with 2 of 12bit, 2 of described 12bit selects 1 selector 10 by the control of the 3rd control signal T_R, 2 of described 12bit selects 1 selector 10 to be also connected with differential driver 11, 2 described in addition bit data latchs 7 are also by being connected with differential driver 11 with door 12.
0V ~ 5V serial data of input through TTL interface 101, is converted to parallel data by described serial-parallel conversion circuit, then by differential driver 11 voltage transitions, exports the complementary signal of 0V ~-5V, as follows particularly:
First control signal SEL is used for control data and receives or data maintenance, and when namely SEL is high level, circuit is in data retention mode, does not receive new data; When SEL is low level, circuit is in data receiving state, and receive the data of the input pin of the data DATA of TTL signal at the trailing edge of clock signal clk, serial shift register carries out corresponding shifting function;
At the rising edge of the second control signal DARY, by the Data import in serial shift register in data latches, circuit exports new data;
3rd control signal T_R is for selecting the changeover control signal exporting transmitting and receiving state: when T_R is high level, select the A1 ~ A12 data in output the 1 bit data latch 8; When T_R is low level, select the B1 ~ B12 data in output the 2 12 bit data latch 9; Output signal includes S1 ~ S12, rf_sw1, rf_sw2, and S1 ~ S12, rf_sw1, rf_sw2 are through the-5V ~ 0V signal after voltage transitions, and each output is made up of one group of complementary signal, namely S1 signal is made up of S1 [+] and S1 [-] Wherein [+] signal of S1 ~ S12 and C1 ~ C12 homophase, [-] signal of S1 ~ S12 is then antiphase, and namely C1 is high level, then S1 [+]=0V, S1 [-]=-5V ..., rf_sw1 is that the complementary signal that T_R signal is corresponding exports; Rf_sw2 is first ST0 data of serial data, and second ST1 data are through exporting with complementary signal behind the door, ST0 and ST1 is first signal T0 of corresponding serial input signals, the normal voltage driver output of second signal T1.
Described serial-parallel conversion circuit is Top-Down Design, technique adopts the P trap CMOS technology of brilliant garden 1.2umSPDMN+ substrate N-extension, circuit voltage is ± 5V, namely the P trap CMOS technology of brilliant garden 1.2umSPDMN-substrate is adopted, the PCM device static state of serial-parallel conversion circuit is withstand voltage is N_BVd=13V, P_BVd=14V, the dynamically resistance to of PMOS is pressed onto 12V;
Choosing of epitaxy layer thickness adopts outside conventional N+ substrate N-;
And on domain, the structure of Flouride-resistani acid phesphatase has been carried out to all MOS device, namely all MOS device adopt ring-shaped gate or the straight grid structure of Poly bag source and drain, and owing to adopting ring-shaped gate, therefore the W of all MOS device of inside increases, L still adopts 1.2um, and typical sizes design is as follows:
NMOS typical sizes is 24u/1.2um, PMOS typical sizes is 50u/1.2um.
Described motor 1010 is installed in the first hollow cover body 108.
The end face of reverse osmosis membrane 103 of the present invention to allow granule foreign order about down the surface by the arcuate surface that reverse osmosis membrane 103 is separated or tapering shape in outward force; Granule foreign so more can be allowed to be separated by reverse osmosis membrane 103 under outward force orders about.
Accompanying drawing explanation
Fig. 1 is circuit connection diagram of the present invention.
Fig. 2 is the structural representation of removal of contamination parts of the present invention.
Fig. 3 is phantom of the present invention.
Embodiment
Below in conjunction with accompanying drawing, summary of the invention is described further:
With reference to Fig. 1, Fig. 2, shown in Fig. 3, the serioparallel exchange device of multi-functional Flouride-resistani acid phesphatase, comprise serial-parallel conversion circuit, described serial-parallel conversion circuit is placed in removal of contamination equipment, the device source region ring-shaped gate of described serial-parallel conversion circuit is surrounded, removal of contamination equipment described in addition contains the first hollow cover body 108 and the second hollow cover body 109 be arranged in the first hollow cover body 108, in the first described hollow cover body 108, motor 1010 is installed, the motor drive shaft of described motor 1010 is installed with the first supply fan 102, one of the first described hollow cover body 108 is air intake vent, the other end of the first described hollow cover body 108 is granule foreign export mouths, described granule foreign export mouth upper cover the meshed lid 106 of band, one of the second described hollow cover body 109 is air intake vent, the air intake vent position cover of the second described in addition hollow cover body 109 is around reverse osmosis membrane 103, the second described hollow cover body 109 is also provided with air outlet, described air outlet is through the first described hollow cover body 108, the second supply fan 107 into motor 1010 starts is installed in the second described in addition hollow cover body 109, the second described supply fan 107 is all installed on the motor drive shaft of motor 1010 with reverse osmosis membrane 103, other second supply fan 107 is arranged between motor 102 and reverse osmosis membrane 103, described serial-parallel conversion circuit is arranged in the second hollow cover body 109.
Granule foreign path 105 is formed between the first described hollow cover body 108 and the second hollow cover body 109, clean gas path 104 is formed between the reverse osmosis membrane 103 of the first described hollow cover body 108 and air outlet, the second described supply fan 107 is for motor 1010 starts and rotate, second supply fan 107 during turning the air-flow with granule foreign via in reverse osmosis membrane 103 inspiration clean gas path 104, reverse osmosis membrane 103 intercepts granule foreign in clean gas path 104 outside, granule foreign to order about and by separation on reverse osmosis membrane 103 in the outward force that produces of reverse osmosis membrane 103 rotated, granule foreign is allowed to be separated by reverse osmosis membrane 103 thus, and in granule foreign path 105, be exported the outside of removal of contamination equipment, cannot be mixed in clean gas path 104, thus achieve the effect of eliminating particle impurity.
Described ring-shaped gate can be replaced by the straight grid of Poly bag source and drain.
Described serial-parallel conversion circuit comprises TTL interface 101, described TTL interface 101 is with Clock Signal pin, the input pin of the data DATA of the first control signal SEL pin and TTL signal, described TTL interface 101 is connected with the serial shift register 2 of 26bit, the serial shift register 2 of described 26bit is connected with the data latches 3 of 26bit, the serial shift register 2 of described 26bit comprises 2 bit shift register 4 that order is connected successively, one 12 bit shift register the 5 and the 2 12 bit shift register 6, and the data latches 3 of 26bit comprises the 2 bit data latchs 7 that order is successively connected, one 12 bit data latch the 8 and the 2 12 bit data latch 9, the serial shift register 2 of described 26bit is subject to the control of the second control signal DARY, 2 described bit shift register 4, one 12 bit shift register the 5 and the 2 12 bit shift register 6 is respectively with 2 bit data latchs 7, one 12 bit data latch 8 is connected with the 2 12 bit data latch 9, described, one 12 bit data latch 8 and the 2 12 bit data latch 9 also select 1 selector 10 to be connected with 2 of 12bit, 2 of described 12bit selects 1 selector 10 by the control of the 3rd control signal T_R, 2 of described 12bit selects 1 selector 10 to be also connected with differential driver 11, 2 described in addition bit data latchs 7 are also by being connected with differential driver 11 with door 12.
0V ~ 5V serial data of input through TTL interface 101, is converted to parallel data by described serial-parallel conversion circuit, then by differential driver 11 voltage transitions, exports the complementary signal of 0V ~-5V, as follows particularly:
First control signal SEL is used for control data and receives or data maintenance, and when namely SEL is high level, circuit is in data retention mode, does not receive new data; When SEL is low level, circuit is in data receiving state, and receive the data of the input pin of the data DATA of TTL signal at the trailing edge of clock signal clk, serial shift register carries out corresponding shifting function;
At the rising edge of the second control signal DARY, by the Data import in serial shift register in data latches, circuit exports new data;
3rd control signal T_R is for selecting the changeover control signal exporting transmitting and receiving state: when T_R is high level, select the A1 ~ A12 data in output the 1 bit data latch 8; When T_R is low level, select the B1 ~ B12 data in output the 2 12 bit data latch 9; Output signal includes S1 ~ S12, rf_sw1, rf_sw2, and S1 ~ S12, rf_sw1, rf_sw2 are through the-5V ~ 0V signal after voltage transitions, and each output is made up of one group of complementary signal, namely S1 signal is made up of S1 [+] and S1 [-] Wherein [+] signal of S1 ~ S12 and C1 ~ C12 homophase, [-] signal of S1 ~ S12 is then antiphase, and namely C1 is high level, then S1 [+]=0V, S1 [-]=-5V ..., rf_sw1 is that the complementary signal that T_R signal is corresponding exports; Rf_sw2 is first ST0 data of serial data, and second ST1 data are through exporting with complementary signal behind the door, ST0 and ST1 is first signal T0 of corresponding serial input signals, the normal voltage driver output of second signal T1.
Described serial-parallel conversion circuit is Top-Down Design, technique adopts the P trap CMOS technology of brilliant garden 1.2umSPDMN+ substrate N-extension, circuit voltage is ± 5V, namely adopt the P trap CMOS technology of brilliant garden 1.2umSPDMN-substrate, do not adopt epitaxial wafer, the concentration of the N-epitaxial wafer selected at present is close with conventional N-substrate concentration, therefore process devices characteristic should be close, the PCM device static state of serial-parallel conversion circuit is withstand voltage is N_BVd=13V, P_BVd=14V, and the dynamically resistance to of PMOS is pressed onto 12V;
Choosing of epitaxy layer thickness adopts outside conventional N+ substrate N-;
And on domain, the structure of Flouride-resistani acid phesphatase has been carried out to all MOS device, namely all MOS device adopt ring-shaped gate or the straight grid structure of Poly bag source and drain, and owing to adopting ring-shaped gate, therefore the W of all MOS device of inside increases, L still adopts 1.2um, and typical sizes design is as follows:
NMOS typical sizes is 24u/1.2um, PMOS typical sizes is 50u/1.2um.
MOS size increases, and driving force is strengthened and gate capacitance increase, is all conducive to anti-single particle overturn.
Operation principle of the present invention is: open motor, the second supply fan 107 described in motor drives and the first supply fan 102 realize rotating, the second described supply fan 107 forms suction when rotating between the second described supply fan 107 and reverse osmosis membrane 103, thus the air-flow in the external world in reverse osmosis membrane 103 inspiration clean gas path 104, and granule foreign is completely cut off outside reverse osmosis membrane 103 through reverse osmosis membrane 103, granule foreign to order about and by separation on reverse osmosis membrane 103 in the outward force that produces of reverse osmosis membrane 103 rotated, granule foreign is allowed to be separated by reverse osmosis membrane 103 thus, thus lead into granule foreign path 105, and in granule foreign path, form suction in conjunction with the first supply fan 102, granule foreign is allowed to be derived by granule foreign, the meshed lid 106 of described band can prevent human body metacarpus enter this equipment damage by supply fan.The end face of described reverse osmosis membrane 103 to allow granule foreign order about down the surface by the arcuate surface that reverse osmosis membrane 103 is separated or tapering shape in outward force; Granule foreign so more can be allowed to be separated by reverse osmosis membrane 103 under outward force orders about.Reverse osmosis membrane 103 is connected on connecting rod 110 in addition, connecting rod 110 and motors, and described reverse osmosis membrane 103 is set up on stainless steel wire 111.
The above, it is only preferred embodiment of the present invention, not any pro forma restriction is done to the present invention, although the present invention discloses as above with preferred embodiment, but and be not used to limit the present invention, any those skilled in the art, do not departing within the scope of technical solution of the present invention, make a little change when the technology contents of above-mentioned announcement can be utilized or be modified to the Equivalent embodiments of equivalent variations, in every case be do not depart from technical solution of the present invention content, according to technical spirit of the present invention, within the spirit and principles in the present invention, to any simple amendment that above embodiment is done, equivalent replacement and improvement etc., within the protection range all still belonging to technical solution of the present invention.
Claims (6)
1. the serioparallel exchange device of a multi-functional Flouride-resistani acid phesphatase, it is characterized in that comprising serial-parallel conversion circuit, described serial-parallel conversion circuit is placed in removal of contamination equipment, the device source region ring-shaped gate of described serial-parallel conversion circuit is surrounded, removal of contamination equipment described in addition contains the first hollow cover body and the second hollow cover body be arranged in the first hollow cover body, in the first described hollow cover body, motor is installed, the motor drive shaft of described motor is installed with the first supply fan, one of the first described hollow cover body is air intake vent, the other end of the first described hollow cover body is granule foreign export mouth, described granule foreign export mouth upper cover the meshed lid of band, one of the second described hollow cover body is air intake vent, the air intake vent position cover of the second described in addition hollow cover body is around reverse osmosis membrane, the second described hollow cover body is also provided with air outlet, described air outlet is through the first described hollow cover body, the second supply fan into motor starting is installed in the second described in addition hollow cover body, the second described supply fan and reverse osmosis membrane are all installed on the motor drive shaft of motor, other second supply fan is arranged between motor and reverse osmosis membrane, described serial-parallel conversion circuit is arranged in the second hollow cover body, granule foreign path is formed between the first described hollow cover body and the second hollow cover body, form clean gas path between the reverse osmosis membrane of the first described hollow cover body and air outlet, the end face of described reverse osmosis membrane to allow granule foreign order about down the surface by the arcuate surface that reverse osmosis membrane is separated or tapering shape in outward force.
2. the serioparallel exchange device of multi-functional Flouride-resistani acid phesphatase according to claim 1, is characterized in that described ring-shaped gate can be replaced by the straight grid of Poly bag source and drain.
3. the serioparallel exchange device of multi-functional Flouride-resistani acid phesphatase according to claim 1, it is characterized in that described serial-parallel conversion circuit comprises TTL interface, described TTL interface is with Clock Signal pin, the input pin of the data DATA of the first control signal SEL pin and TTL signal, described TTL interface is connected with the serial shift register of 26bit, the serial shift register of described 26bit is connected with the data latches of 26bit, the serial shift register of described 26bit comprises 2 bit shift register that order is connected successively, one 12 bit shift register and the 2 12 bit shift register, and the data latches of 26bit comprises the 2 bit data latchs that order is successively connected, one 12 bit data latch and the 2 12 bit data latch, the serial shift register of described 26bit is subject to the control of the second control signal DARY, 2 described bit shift register, one 12 bit shift register and the 2 12 bit shift register are respectively with 2 bit data latchs, one 12 bit data latch is connected with the 2 12 bit data latch, the one 12 described bit data latch also selects 1 selector to be connected with 2 of 12bit with the 2 12 bit data latch, 2 of described 12bit selects 1 selector by the control of the 3rd control signal T_R, 2 of described 12bit selects 1 selector to be also connected with differential driver, 2 described in addition bit data latchs are also by being connected with differential driver with door.
4. the serioparallel exchange device of multi-functional Flouride-resistani acid phesphatase according to claim 3, it is characterized in that described serial-parallel conversion circuit by 0V ~ 5V serial data of input through TTL interface, be converted to parallel data, again by differential driver voltage transitions, export the complementary signal of 0V ~-5V, as follows particularly:
First control signal SEL is used for control data and receives or data maintenance, and when namely SEL is high level, circuit is in data retention mode, does not receive new data; When SEL is low level, circuit is in data receiving state, and receive the data of the input pin of the data DATA of TTL signal at the trailing edge of clock signal clk, serial shift register carries out corresponding shifting function;
At the rising edge of the second control signal DARY, by the Data import in serial shift register in data latches, circuit exports new data;
3rd control signal T_R is for selecting the changeover control signal exporting transmitting and receiving state: when T_R is high level, select the A1 ~ A12 data in output the 1 bit data latch; When T_R is low level, select the B1 ~ B12 data in output the 2 12 bit data latch; Output signal includes S1 ~ S12, rf_sw1, rf_sw2, and S1 ~ S12, rf_sw1, rf_sw2 are through the-5V ~ 0V signal after voltage transitions, and each output is made up of one group of complementary signal, namely S1 signal is made up of S1 [+] and S1 [-] Wherein [+] signal of S1 ~ S12 and C1 ~ C12 homophase, [-] signal of S1 ~ S12 is then antiphase, and namely C1 is high level, then S1 [+]=0V, S1 [-]=-5V ..., rf_sw1 is that the complementary signal that T_R signal is corresponding exports; Rf_sw2 is first ST0 data of serial data, and second ST1 data are through exporting with complementary signal behind the door, ST0 and ST1 is first signal T0 of corresponding serial input signals, the normal voltage driver output of second signal T1.
5. the serioparallel exchange device of multi-functional Flouride-resistani acid phesphatase according to claim 4, it is characterized in that described serial-parallel conversion circuit is Top-Down Design, technique adopts the P trap CMOS technology of brilliant garden 1.2umSPDMN+ substrate N-extension, circuit voltage is ± 5V, namely the P trap CMOS technology of brilliant garden 1.2umSPDMN-substrate is adopted, the PCM device static state of serial-parallel conversion circuit is withstand voltage is N_BVd=13V, P_BVd=14V, and the dynamically resistance to of PMOS is pressed onto 12V;
Choosing of epitaxy layer thickness adopts outside conventional N+ substrate N-;
And on domain, the structure of Flouride-resistani acid phesphatase has been carried out to all MOS device, namely all MOS device adopt ring-shaped gate or the straight grid structure of Poly bag source and drain, and owing to adopting ring-shaped gate, therefore the W of all MOS device of inside increases, L still adopts 1.2um, and typical sizes design is as follows:
NMOS typical sizes is 24u/1.2um, PMOS typical sizes is 50u/1.2um.
6. the serioparallel exchange device of multi-functional Flouride-resistani acid phesphatase according to claim 1, is characterized in that described motor is installed in the first hollow cover body.
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| CN1665144A (en) * | 2004-03-01 | 2005-09-07 | 恩益禧电子股份有限公司 | Semiconductor device |
| US20050220089A1 (en) * | 2004-03-31 | 2005-10-06 | Nec Electronics Corporation | Demultiplexer circuit |
| CN101783098A (en) * | 2009-01-16 | 2010-07-21 | 晶锜科技股份有限公司 | Serial transmission device and signal transmission method |
| CN103877797A (en) * | 2014-03-19 | 2014-06-25 | 西安交通大学 | Gas dust-removing and sampling device |
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