CN105097714A - Packaging structure for FBAR device and manufacturing method thereof - Google Patents
Packaging structure for FBAR device and manufacturing method thereof Download PDFInfo
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- CN105097714A CN105097714A CN201510325187.7A CN201510325187A CN105097714A CN 105097714 A CN105097714 A CN 105097714A CN 201510325187 A CN201510325187 A CN 201510325187A CN 105097714 A CN105097714 A CN 105097714A
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Abstract
The invention provides a packaging structure for an FBAR device. The packaging structure comprises a substrate, at least one first groove, bonding pads, second grooves, a first electrode layer, a second electrode layer and at least one FBAR device plate, wherein the at least one first groove is formed in the upper surface of the substrate; one bonding pad is formed on two sides of the first groove respectively; each second groove is formed in the surface of the corresponding bonding pad; the FBAR device is bonded with the bonding pads, and the electrodes of the FBAR device are arranged in the first groove; the first electrode layer is formed on the lower surface of the substrate, and overlays the tops and the side walls of the second grooves at the same time; and the second electrode layer is formed on the lower surface of the first electrode layer. Correspondingly, the invention also discloses a manufacturing method of the packaging structure for the FBAR device. Through the implementation of the packaging structure for the FBAR device and the manufacturing method of the packaging structure for the FBAR device, the difficulty of the packaging technology can be reduced, and the production technology and production cycle are optimized, so that the packaging cost is greatly reduced.
Description
Technical field
The present invention relates to semiconductor packages manufacturing technology field, especially relate to a kind of FBAR device encapsulation structure and manufacture method thereof.
Background technology
Along with the development of film and minute manufacturing technology, electronic device forward is microminiaturized, the direction of highly dense multiplexing, high-frequency and low-power consumption develops rapidly.The thin film bulk acoustic resonator (FBAR) that development in recent years is got up adopts the harmonic technology of a kind of advanced person, it by the inverse piezoelectric effect of piezoelectric membrane, electric energy conversion is become sound wave and forms resonance, and this harmonic technology can be used for making the advanced components and parts such as film frequency shaping device.FBAR device has that volume is little, operating frequency is high, efficiency is high, insertion loss is low, Out-of-band rejection is large, high power capacity, low-temperature coefficient and good antistatic impact capacity and the plurality of advantages such as semiconductor technology is compatible.Utilize FBAR technology can make the multiple high performance frequency devices such as filter, oscillator, duplexer.FBAR technology can provide more perfect power handling capability, insertion loss and selectance characteristic.
In prior art, FBAR device adopts chip grade packaging structure to encapsulate mostly, and encapsulation process is: full wafer wafer, by after scribing process, is cut into little wafer (Die), then the wafer of well cutting is classified, more independently wafer is encapsulated separately.After having encapsulated, also to carry out sequence of operations, as solidification (PostMoldCure), cut muscle and shaping (Trim & Form), technique such as plating (Plating) and printing etc.Finally complete final encapsulating structure.Because the method needs each wafer after to cutting to encapsulate separately, therefore cause the problem that the production cycle is long, manufacture craft is loaded down with trivial details, production cost is higher, production efficiency is low.
Summary of the invention
In order to overcome above-mentioned defect of the prior art, the invention provides a kind of encapsulating structure of FBAR device, described encapsulating structure comprises substrate, at least one first groove, pad, the second groove, the first electrode layer, the second electrode lay and at least one FBAR device;
The upper surface of described substrate forms at least one first groove;
Described first groove both sides respectively form a pad;
Described second groove type is formed on the surface of described pad;
Described FBAR device and described pad bonding, and the electrode of FBAR device is placed in described first groove;
Described first electrode layer is formed on the lower surface of described substrate, covers top and the sidewall of described second groove simultaneously;
Described the second electrode lay is formed on the lower surface of described first electrode layer.
According to an aspect of the present invention, this encapsulating structure also comprises metal level and at least one pit, and described dimple-shaped is formed on the surface of described pad; Described metal level is formed on described pad, fills described pit, the top simultaneously covering described second groove and sidewall.
According to another aspect of the present invention, the depth bounds of pit described in this encapsulating structure is 1 μm ~ 2 μm, and live width scope is 1 μm ~ 5 μm.
According to a further aspect of the invention, the material of metal level described in this encapsulating structure comprises one in gold, copper, silver, nickel, platinum or its combination in any.
According to a further aspect of the invention, this encapsulating structure also comprises insulating barrier, and described insulating barrier is formed on the surface of described first groove.
According to a further aspect of the invention, the material of insulating barrier described in this encapsulating structure is SiO
2.
According to a further aspect of the invention, the depth bounds of the first groove described in this encapsulating structure is 5 μm ~ 10 μm.
According to a further aspect of the invention, the depth bounds of the second groove described in this encapsulating structure is 80 μm ~ 200 μm, width range is 2 μm ~ 10 μm.
According to a further aspect of the invention, the material of substrate described in this encapsulating structure comprises one in silicon, glass, pottery or its combination in any.
According to a further aspect of the invention, the material of the first electrode layer described in this encapsulating structure comprises one in gold, copper, silver, nickel, platinum or its combination in any; The material of described the second electrode lay comprises one in gold, copper, silver, nickel, platinum or its combination in any.
Present invention also offers a kind of method for cutting wafer, for forming multiple above-mentioned encapsulating structure on wafer, then carrying out wafer cutting according to the position of described encapsulating structure.
Present invention also offers a kind of manufacture method of FBAR device encapsulation structure, comprise the following steps:
Form at least one first groove at the upper surface of substrate, and respectively form a pad in described first groove both sides;
The surface of described pad is formed the second groove;
By at least one FBAR device and described pad bonding, the electrode of FBAR device is made to be placed in described first groove;
Carry out thinning to the lower surface of described substrate, described second groove is exposed completely;
The lower surface of described substrate is formed the first electrode layer, and described first electrode layer covers top and the sidewall of described second groove;
The lower surface of described first electrode layer forms the second electrode lay.
According to an aspect of the present invention, after the upper surface of substrate forms at least one first groove, this manufacture method also comprises: on the surface of described first groove, form insulating barrier.
According to another aspect of the present invention, the material of insulating barrier described in this manufacture method is SiO
2.
According to a further aspect of the invention, after described first groove both sides respectively form a pad, this manufacture method also comprises: on the surface of described pad, form at least one pit.
According to a further aspect of the invention, the depth bounds of pit described in this manufacture method is 1 μm ~ 2 μm, and live width scope is 1 μm ~ 5 μm.
According to a further aspect of the invention, after the upper surface of described pad forms the second groove, this manufacture method also comprises: on the surface of pad, form metal level, and described metal level fills described pit, the top simultaneously covering described second groove and sidewall.
According to a further aspect of the invention, the material of metal level described in this manufacture method comprises one in gold, copper, silver, nickel, platinum or its combination in any.
According to a further aspect of the invention, the depth bounds of the first groove described in this manufacture method is 5 μm ~ 10 μm.
According to a further aspect of the invention, the depth bounds of the second groove described in this manufacture method is 80 μm ~ 200 μm, width range is 2 μm ~ 10 μm.
According to a further aspect of the invention, the material of substrate described in this manufacture method comprises one in silicon, glass, pottery or its combination in any.
According to a further aspect of the invention, the material of the first electrode layer described in this manufacture method comprises one in gold, copper, silver, nickel, platinum or its combination in any; The material of described the second electrode lay comprises one in gold, copper, silver, nickel, platinum or its combination in any.
The encapsulating structure of a kind of FBAR device provided by the invention and manufacture method thereof, adopt the packaging technology of pad and FBAR device bonding, and on the surface of pad, increase bowl configurations to improve the bonding degree of pad, reduce the difficulty of packaging technology simultaneously.The method is simple unique, be easy to grasp, be convenient to the comprehensive penetration and promotion of industry.
The method of a kind of wafer cutting provided by the invention, wafer adopts the Making programme first encapsulating and cut afterwards.Be different from the traditional handicraft of first cutting and encapsulating afterwards, in the present invention, wafer directly enters packaging process, multiple encapsulating structure can be formed on the wafer simultaneously and then obtain independently encapsulating structure by the mode of cutting, and without the need to encapsulating one by one after cutting wafer.Thus, the present invention can effectively optimized production process, greatly shorten production cycle and packaging cost is declined to a great extent.
Accompanying drawing explanation
By reading the detailed description done non-limiting example done with reference to the following drawings, other features, objects and advantages of the present invention will become more obvious:
Fig. 1 is the encapsulating structure schematic diagram according to a kind of FBAR device provided by the invention;
Fig. 2 is the manufacture method flow chart according to a kind of FBAR device encapsulation structure provided by the invention;
Fig. 3 is the structural representation according to the first groove in a kind of FBAR device encapsulation structure provided by the invention;
Fig. 4 is the structural representation according to pad and pit in a kind of FBAR device encapsulation structure provided by the invention;
Fig. 5 is the structural representation according to the second groove and insulating barrier in a kind of FBAR device encapsulation structure provided by the invention;
Fig. 6 is the structural representation according to metal level in a kind of FBAR device encapsulation structure provided by the invention;
Fig. 7 is the schematic diagram according to FBAR device architecture in a kind of FBAR device encapsulation structure provided by the invention;
Fig. 8 is the structural representation according to FBAR device and pad bonding in a kind of FBAR device encapsulation structure provided by the invention;
Fig. 9 be according to complete in a kind of FBAR device encapsulation structure provided by the invention thinning after structural representation;
Figure 10 is the structural representation according to the first electrode layer in a kind of FBAR device encapsulation structure provided by the invention;
Figure 11 is the structural representation according to the second electrode lay in a kind of FBAR device encapsulation structure provided by the invention.
In accompanying drawing, same or analogous Reference numeral represents same or analogous parts.
Embodiment
For a better understanding and interpretation of the present invention, below in conjunction with accompanying drawing, the present invention is described in further detail.
The invention provides a kind of FBAR device encapsulation structure.Please refer to Fig. 1, Fig. 1 is the encapsulating structure schematic diagram according to a kind of FBAR device provided by the invention.As shown in the figure, described encapsulating structure comprises:
Substrate 100, at least one first groove 101, pad 102, second groove 103, first electrode layer 106, the second electrode lay 107 and at least one FBAR device 200;
The upper surface of described substrate 100 forms at least one first groove 101;
Described first groove 101 both sides respectively form a pad 102;
Described second groove 103 is formed on the surface of described pad 102;
Described FBAR device 200 and described pad 102 bonding, and the electrode of FBAR device 200 is placed in described first groove 101;
Described first electrode layer 106 is formed on the lower surface of described substrate 100, covers top and the sidewall of described second groove 103 simultaneously;
Described the second electrode lay 107 is formed on the lower surface of described first electrode layer 106.
Particularly, described encapsulating structure comprises substrate 100, at least one first groove 101, pad 102, second groove 103, first electrode layer 106, the second electrode lay 107 and at least one FBAR device 200.Wherein, the upper surface of substrate 100 forms the first groove 101, and in the present embodiment, the material of substrate 100 comprises one in silicon, glass, pottery or its combination in any.The depth bounds of the first groove 101 is 5 μm ~ 10 μm.First groove 101 both sides respectively form a pad 102, and described pad 102 is for carrying out bonding with FBAR device 200.Second groove 103 is formed at the upper surface of pad 102, described second groove 103 for make encapsulating structure and the external world carry out interconnected, exchange signal.In the present embodiment, the width range of the second groove is 2 μm ~ 10 μm, depth bounds is 80 μm ~ 200 μm.FBAR device 200 and described pad 102 bonding, be positioned over by the electrode of FBAR device 200 in first groove 101, wherein, the electrode of described FBAR device comprises the first electrode 201 and the second electrode 202.First electrode layer 106 is formed on the lower surface of substrate 100, covers top and the sidewall of the second groove 103 simultaneously; The second electrode lay 107 is formed on the lower surface of the first electrode layer 106.In the present embodiment, the material of the first electrode layer 106 comprises one in gold, copper, silver, nickel, platinum or its combination in any, and the material of the second electrode lay 107 comprises one in gold, copper, silver, nickel, platinum or its combination in any.
Preferably, the encapsulating structure of described FBAR device also comprises metal level 105 and at least one pit 104, and pit 104 is formed on the surface of described pad 102, for strengthening the bonding degree of pad 102 and FBAR device 200.In the present embodiment, the depth bounds of described pit 104 is 1 μm ~ 2 μm, and live width scope is 1 μm ~ 5 μm.Metal level 105 is formed on pad 102, fills pit 104, covers top and the sidewall of the second groove 103 simultaneously, and this metal level 105 is for the bonding of pad 102 with FBAR device 200.In the present embodiment, metal level 105 material comprises one in gold, copper, silver, nickel or platinum or its combination in any.
Preferably, described FBAR device encapsulation structure also comprises insulating barrier 108, and described insulating barrier 108 is formed on the surface of the first groove 101, for increasing the first groove 101 both sides pad 102 between electric isolution degree.In the present embodiment, the material of insulating barrier 108 is SiO
2.
Present invention also offers a kind of method for cutting wafer, for forming multiple encapsulating structure on wafer, then carrying out wafer cutting according to the position of the plurality of encapsulating structure, to obtain multiple independently encapsulating structure.In the present embodiment, first encapsulate on full wafer wafer, to form the encapsulating structure of multiple above-mentioned FBAR device, then the encapsulating structure obtaining multiple independently FBAR device is cut to full wafer wafer.
Present invention also offers a kind of manufacture method of FBAR device encapsulation structure.Please refer to Fig. 2, Fig. 2 is the manufacture method flow chart according to a kind of FBAR device encapsulation structure provided by the invention.As shown in Figure 2, this manufacture method comprises:
In step sl, surface forms at least one first groove 101 on the substrate 100, and respectively forms a pad 102 in described first groove 101 both sides;
In step s 2, the second groove 103 is formed at the upper surface of described pad 102;
In step s3, by least one FBAR device 200 and described pad 102 bonding, the electrode of FBAR device is made to be placed in the first groove 101;
In step s 4 which, carry out thinning to the lower surface of substrate 100, the second groove 103 is exposed completely;
In step s 5, the lower surface of substrate 100 forms the first electrode layer 106
In step s 6, the lower surface of the first electrode layer 106 forms the second electrode lay 107.
Below in conjunction with Fig. 3 to Figure 11 and Fig. 1, above-mentioned steps is described.
Particularly, in step sl, as shown in Figure 3, at least one first groove 101 of surface etch first on the substrate 100, wherein, when encapsulating FBAR device, this at least one first groove 101 is for the formation of resonant cavity.In the present embodiment, described substrate 100 material comprises one in silicon, glass, pottery or its combination in any.First groove 101 can adopt the mode of dry etching to be formed, such as RIE or ICP-RIE etc., and process gas used is CF
4, SF
6, C
2f
6, CL
2, BCL
3deng.Preferably, the depth bounds of the first groove 101 is 5 μm ~ 10 μm.As shown in Figure 4, then, respectively etch a pad 102 in the both sides of the first groove 101, described pad 102 can adopt dry etching to be formed, and described pad 102 is for carrying out bonding with FBAR device 200 (please refer to Fig. 7).Preferably, the surface of pad 102 forms at least one pit 104, this at least one pit 104 adopts the mode of dry etching to be formed, such as RIE or ICP-RIE etc., and process gas used is CF
4, SF
6, C
2f
6, CL
2, BCL
3deng.Preferably, the depth bounds of described pit 104 is 1 μm ~ 2 μm, and live width scope is 1 μm ~ 5 μm.Described pit 104 is for strengthening the bonding degree of described pad 102 and FBAR device 200.
Preferably, after formation first groove 101, the surface of described first groove 101 forms insulating barrier 108 (please refer to Fig. 5).This insulating barrier 108 first adopts hot health mode that is long or deposition to be formed in the first groove 101 surface, secondly removes unnecessary portion of material by the step of photoetching and etching.Preferably, the material of described insulating barrier 108 is SiO
2.Described insulating barrier 108 for increasing the first groove both sides pad 102 between electric isolution degree.
In step s 2, as shown in Figure 5, the surface of pad 102 etches the second groove 103.Described second groove 103 adopts deep reaction ion etching (DRIE) technology to be formed, and etching gas is SF
6, C
4f
8, O
2, CF
4deng.Preferably, the width range of described second groove 103 is 2 μm ~ 10 μm, and depth bounds is 80 μm ~ 200 μm, and depth-to-width ratio is between 10:1 to 100:1.The etching that deep reaction ion etching (DRIE) technology employing etching and passivation hocket groove, can reduce the roughness of groove 103 sidewall, make sidewall more smooth, and the damage of the method to substrate 100 is less.
Preferably, as shown in Figure 6, after formation second groove 103, described pad 102 forms metal level 105, this metal level 105 is for the bonding of pad 102 with FBAR device 200.In the present embodiment, the material of described metal level 105 is gold (Au).In other embodiments, the material of described metal level 105 can also be one in gold, copper, silver, nickel or platinum or its combination in any.Metal level 105 can be formed by the mode of sputtering or evaporation.In the present embodiment, described metal level 105 is layer gold (representing with Au layer below), for strengthening the adhesion between Au layer and substrate 100, forms TiW layer (not shown) between Au layer and substrate 100, wherein, described TiW layer can be realized by the mode of sputtering.The concrete technology step forming Au layer and TiW layer is as follows: (1) sputters or evaporation Au layer and TiW layer on a surface of the substrate, and the thickness of Au layer 105 is 1 μm ~ 2 μm, and the thickness of TiW layer is 500 dust ~ 5000 dusts; (2) photoetching: because of the existence of the second groove 103, need adopt deep hole gluing technology, and before gluing, adopt solvent (acetone, EBR) to carry out prewetting of substrate 100 surface, photoresist thickness is generally between 10 μm ~ 30 μm; (3) etch: adopt wet-etching technology to fall excess metal, etching Au adopts Au etching liquid, and etching TiW can adopt ammoniacal liquor, hydrogen peroxide etching liquid, and over etching amount is generally 20% ~ 50%; (4) remove photoresist: adopt wet method degumming process, the solution that removes photoresist can select NMP, ACT, sulfuric acid, hydrogen peroxide etc.
In step s3, first, as shown in Figure 7, provide FBAR device 200, described FBAR device has Au layer on the surface of bonding.The electrode of this FBAR device 200 comprises the first electrode 201 and the second electrode 202; Then, as shown in Figure 8, pad 102 and FBAR device 200 are carried out bonding, and wherein, the electrode of FBAR device 200 is placed in the first groove 101.In the present embodiment, what bonding adopted is Au-Au bonding, and bonding pressure is between 5 ~ 20KN, and temperature is set between 300 ~ 400 DEG C, and bonding time is 30min ~ 120min.
In step s 4 which, as shown in Figure 9, by carrying out thinning to the lower surface of described substrate 100, exposing described second groove 103, making it to be conducted with the external world.Wherein, thinning point of corase grind and fine grinding two step are carried out, and the residual thickness of thinning back substrate 100 is general less than the depth bounds of the second groove 103 10 μm ~ 30 μm, to ensure that the second groove 103 exposes completely.
In step s 5, as shown in Figure 10, the lower surface of substrate 100 forms the first electrode layer 106, described first electrode layer 106 carries out interconnected for the electrode of FBAR device 200 and the external world.In the present embodiment, be ensure the electrode of FBAR device 200 and effective UNICOM of outer signals, described first electrode layer 106 also needs to cover the top of the second groove 103 and sidewall.In the present embodiment, because the cost of electroplating technology is lower, and electro-coppering has the features such as compact structure, purity is high, conductivity is high, electromigration resisting property is strong, and therefore, the material of described first electrode layer 106 is copper (Cu).In other embodiments, the material of the first electrode layer 106 can also be one in gold, silver, nickel or platinum or its combination in any.Preferably, for ensureing that electro-coppering evenly can be adhered at the top of the second groove 103 and sidewall, also Seed Layer (not shown) to be formed between the first electrode layer 106 and the second groove 103.Wherein, described Seed Layer can be realized by the method for sputtering, and in the present embodiment, the material of described Seed Layer is titanium or copper.The concrete technology step forming Seed Layer and the first electrode layer 106 is as follows: owing to may contain bubble in the second groove 103, the effect of impact plating, therefore first will clean the lower surface of substrate 100 and prewet, cleaning adopts dilute sulfuric acid to carry out cleaning, prewetting adopts High Pressure Pure Water to prewet.Complete cleaning and after prewetting, the lower surface of substrate 100 sputters titanium layer or layers of copper as Seed Layer, the thickness of titanium layer or layers of copper is 500 dust ~ 2000 dusts.Then, on the lower surface of substrate 100 electro-coppering to form the first electrode layer.Preferably, the thickness of layers of copper is 1.5 μm ~ 5 μm.In electroplating process, current density is 1ASD ~ 2ASD, and electroplating time is 10min ~ 30min, and electroplating temperature is between 20 DEG C ~ 25 DEG C.Also need after electroplating technology completes effectively to clean substrate 100 and the first electrode layer 106 and drying.
In step s 6, as shown in figure 11, the second electrode lay 107 is formed at the lower surface of the first electrode layer 106.In the present embodiment, the material of the second electrode lay 107 is gold (Au).In other embodiments, the material of the second electrode lay 107 can also be one in copper, silver, nickel or platinum or its combination in any.The second electrode lay 107 can be formed by the mode of sputtering or evaporation.In the present embodiment, on the lower surface of the first electrode layer 106, sputtering or evaporation Au layer are 5000 dust ~ 20000 dusts as the thickness of the second electrode lay 107, Au layer.Described the second electrode lay 107 carries out interconnected for the electrode of FBAR device 200 and the external world.
After completion of step s 6, the making of electrode pattern to also be carried out to described first electrode layer 106 and the second electrode lay 107, to form the electrode of FBAR encapsulating structure.The concrete technology step made is as follows: (1) photoetching: because of the existence of the second groove 103, deep hole gluing technology need be adopted, before gluing, adopt solvent (acetone, EBR) to carry out prewetting of the first electrode layer 106 and the second electrode lay 107 surface, photoresist thickness is generally between 10 μm ~ 30 μm; (2) etch: adopt wet-etching technology to fall unnecessary metal level, etching Au adopts Au etching liquid, and etching TiW can adopt ammoniacal liquor, hydrogen peroxide etching liquid, and over etching amount is generally 20% ~ 50%; (3) remove photoresist: adopt wet method degumming process, the solution that removes photoresist can select NMP, ACT, sulfuric acid, hydrogen peroxide etc.After completing above-mentioned manufacture craft, the design producing of described first electrode layer 106 and the second electrode lay 107 completes, and FBAR encapsulating structure completes, and described FBAR encapsulating structure please refer to structure shown in Fig. 1.
It should be noted that, although describe the operation of the inventive method in the accompanying drawings with particular order, but this is not that requirement or hint must perform these operations according to this particular order, or must perform the result that all shown operation could realize expectation.On the contrary, the step described in flow chart can change execution sequence.Additionally or alternatively, some step can be omitted, multiple step be merged into a step and perform, and/or a step is decomposed into multiple step and perform.
The encapsulating structure of a kind of FBAR device provided by the invention and manufacture method thereof, adopt the packaging technology of pad and FBAR device bonding, and on the surface of pad, increase bowl configurations to improve the bonding degree of pad, reduce the difficulty of packaging technology.The method is simple unique, be easy to grasp, be convenient to the comprehensive penetration and promotion of industry.
The method of a kind of wafer cutting provided by the invention, wafer adopts the Making programme first encapsulating and cut afterwards.Be different from the traditional handicraft of first cutting and encapsulating afterwards, in the present invention, wafer directly enters packaging process, multiple encapsulating structure can be formed on the wafer simultaneously and then obtain independently encapsulating structure by the mode of cutting, and without the need to encapsulating one by one after cutting wafer.Thus, the present invention can effectively optimized production process, greatly shorten production cycle and packaging cost is declined to a great extent.
Disclosedly above be only preferred embodiments more of the present invention, can not limit the interest field of the present invention with this, the equivalent variations done according to the claims in the present invention, still belongs to the scope that the present invention is contained.
Claims (22)
1. an encapsulating structure for FBAR device, described encapsulating structure comprises substrate, at least one first groove, pad, the second groove, the first electrode layer, the second electrode lay and at least one FBAR device, it is characterized in that:
The upper surface of described substrate forms at least one first groove;
Described first groove both sides respectively form a pad;
Described second groove type is formed on the surface of described pad;
Described FBAR device and described pad bonding, and the electrode of FBAR device is placed in described first groove;
Described first electrode layer is formed on the lower surface of described substrate, covers top and the sidewall of described second groove simultaneously;
Described the second electrode lay is formed on the lower surface of described first electrode layer.
2. encapsulating structure according to claim 1, is characterized in that, also comprises metal level and at least one pit;
Described dimple-shaped is formed on the surface of described pad;
Described metal level is formed on described pad, fills described pit, the top simultaneously covering described second groove and sidewall.
3. encapsulating structure according to claim 2, is characterized in that, the depth bounds of described pit is 1 μm ~ 2 μm, and live width scope is 1 μm ~ 5 μm.
4. encapsulating structure according to claim 2, is characterized in that, the material of described metal level comprises one in gold, copper, silver, nickel, platinum or its combination in any.
5. encapsulating structure according to claim 1, is characterized in that, also comprises insulating barrier;
Described insulating barrier is formed on the surface of described first groove.
6. encapsulating structure according to claim 5, is characterized in that, the material of described insulating barrier is SiO
2.
7. encapsulating structure according to claim 1, is characterized in that, the depth bounds of described first groove is 5 μm ~ 10 μm.
8. encapsulating structure according to claim 1, is characterized in that, the depth bounds of described second groove is 80 μm ~ 200 μm, width range is 2 μm ~ 10 μm.
9. according to the encapsulating structure described in claim 1, it is characterized in that, the material of described substrate comprises one in silicon, glass, pottery or its combination in any.
10., according to the encapsulating structure described in claim 1, it is characterized in that:
The material of described first electrode layer comprises one in gold, copper, silver, nickel, platinum or its combination in any;
The material of described the second electrode lay comprises one in gold, copper, silver, nickel, platinum or its combination in any.
11. 1 kinds of method for cutting wafer, multiple as the encapsulating structure in claim 1 to 10 as described in any one for being formed on described wafer, then carry out wafer cutting according to the position of described encapsulating structure.
The manufacture method of 12. 1 kinds of FBAR device encapsulation structures, is characterized in that, this manufacture method comprises:
Form at least one first groove at the upper surface of substrate, and respectively form a pad in described first groove both sides;
The surface of described pad is formed the second groove;
By at least one FBAR device and described pad bonding, the electrode of FBAR device is made to be placed in described first groove;
Carry out thinning to the lower surface of described substrate, described second groove is exposed completely;
The lower surface of described substrate is formed the first electrode layer, and described first electrode layer covers top and the sidewall of described second groove;
The lower surface of described first electrode layer forms the second electrode lay.
13. manufacture methods according to claim 12, is characterized in that, after the upper surface of substrate forms at least one first groove, this manufacture method also comprises: on the surface of described first groove, form insulating barrier.
14. manufacture methods according to claim 13, is characterized in that, the material of described insulating barrier is SiO
2.
15. manufacture methods according to claim 12, is characterized in that, after described first groove both sides respectively form a pad, this manufacture method also comprises: on the surface of described pad, form at least one pit.
16. manufacture methods according to claim 15, is characterized in that, the depth bounds of described pit is 1 μm ~ 2 μm, and live width scope is 1 μm ~ 5 μm.
17. manufacture methods according to claim 15, it is characterized in that, after the upper surface of described pad forms the second groove, this manufacture method also comprises: on the surface of pad, form metal level, and described metal level fills described pit, the top simultaneously covering described second groove and sidewall.
18. encapsulating structures according to claim 17, is characterized in that, the material of described metal level comprises one in gold, copper, silver, nickel, platinum or its combination in any.
19. manufacture methods according to claim 12, is characterized in that, the depth bounds of described first groove is 5 μm ~ 10 μm.
20. manufacture methods according to claim 12, is characterized in that, the depth bounds of described second groove is 80 μm ~ 200 μm, width range is 2 μm ~ 10 μm.
21., according to the manufacture method described in claim 12, is characterized in that, the material of described substrate comprises one in silicon, glass, pottery or its combination in any.
22. manufacture methods according to claim 12, is characterized in that:
The material of described first electrode layer comprises one in gold, copper, silver, nickel, platinum or its combination in any;
The material of described the second electrode lay comprises one in gold, copper, silver, nickel, platinum or its combination in any.
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| CN107241077A (en) * | 2017-05-12 | 2017-10-10 | 电子科技大学 | A kind of piezoelectric film bulk acoustic wave resonator and preparation method thereof |
| CN112039487A (en) * | 2020-08-06 | 2020-12-04 | 诺思(天津)微系统有限责任公司 | Bulk acoustic wave resonator with heat conduction structure, manufacturing method thereof, filter and electronic equipment |
| CN112970106A (en) * | 2018-11-12 | 2021-06-15 | Hrl实验室有限责任公司 | Method for designing and uniformly co-fabricating small vias and large cavities through a substrate |
| EP4087127A4 (en) * | 2019-12-31 | 2023-07-12 | Rofs Microsystem (Tianjin) Co., Ltd | Semiconductor structure having stacking unit and manufacturing method therefore, and electronic device |
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| CN107241077B (en) * | 2017-05-12 | 2020-12-29 | 电子科技大学 | Piezoelectric film bulk acoustic resonator and preparation method thereof |
| CN112970106A (en) * | 2018-11-12 | 2021-06-15 | Hrl实验室有限责任公司 | Method for designing and uniformly co-fabricating small vias and large cavities through a substrate |
| EP4087127A4 (en) * | 2019-12-31 | 2023-07-12 | Rofs Microsystem (Tianjin) Co., Ltd | Semiconductor structure having stacking unit and manufacturing method therefore, and electronic device |
| CN112039487A (en) * | 2020-08-06 | 2020-12-04 | 诺思(天津)微系统有限责任公司 | Bulk acoustic wave resonator with heat conduction structure, manufacturing method thereof, filter and electronic equipment |
| CN112039487B (en) * | 2020-08-06 | 2021-08-10 | 诺思(天津)微系统有限责任公司 | Bulk acoustic wave resonator with heat conduction structure, manufacturing method thereof, filter and electronic equipment |
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