CN104899164B - Address addressing method for integrated circuit bus, integrated circuit bus device and system - Google Patents
Address addressing method for integrated circuit bus, integrated circuit bus device and system Download PDFInfo
- Publication number
- CN104899164B CN104899164B CN201410076585.5A CN201410076585A CN104899164B CN 104899164 B CN104899164 B CN 104899164B CN 201410076585 A CN201410076585 A CN 201410076585A CN 104899164 B CN104899164 B CN 104899164B
- Authority
- CN
- China
- Prior art keywords
- addressing
- integrated circuit
- host
- circuit bus
- slave
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Landscapes
- Information Transfer Systems (AREA)
- Small-Scale Networks (AREA)
Abstract
The embodiment of the invention discloses an address addressing method of an integrated circuit bus, integrated circuit bus equipment and a system. In an integrated circuit bus system in which a plurality of hosts communicate with a slave, the address addressing method comprising: receiving an addressing address sent by a host in the integrated circuit bus system; comparing the addressing address with a plurality of preset device addresses, wherein the device addresses are device addresses of slaves configured on each master in the integrated circuit bus system; if the addressing address is consistent with any one of the plurality of device addresses, determining that the host addressing is successful, otherwise, determining that the host addressing is failed; and responding to the host according to the determined addressing result. According to the embodiment of the invention, the existing host can be utilized to realize the upgrade of the bus system with one slave of a plurality of hosts, thereby saving the upgrade cost.
Description
Technical Field
The present invention relates to the field of microelectronic communication control technology, and in particular, to an address addressing method for an integrated circuit bus, an integrated circuit bus device, and a system.
Background
The IIC (Inter-Integrated Circuit, integrated circuit) bus is a two-wire serial bus developed by PHILIPS corporation for connecting microcontrollers and their peripherals, and is a bus standard widely used in the field of microelectronic communication control. The synchronous communication system is a special form of synchronous communication and has the advantages of few interface wires, simple control mode, small equipment packaging form, higher communication rate and the like. The IIC bus is a bi-directional serial bus consisting of data lines SDA (serial data line) and SCL (serial clock line), and can transmit and receive data with a maximum transfer rate of 100kbps.
Devices connected to the IIC bus are divided into a master, which is a device for initializing transmission, generating a clock signal allowing transmission, and terminating transmission, and a slave, which is a device for being addressed by the master. In the conventional IIC bus system, a master is connected to a slave via the IIC bus, and the device address of the slave is set in the master. As shown in fig. 1, the Master a is connected with the Slave1 through the IIC bus, the Master B is connected with the Slave2 through an IIC bus, the device address1 of the Slave1 is set in the Master a, the Master B is provided with a device address2 of the Slave 2. Taking the communication between the Master a and the Slave1 as an example, when the Master a wants to communicate data with the Slave1 through the IIC bus, the Master A firstly sends an addressing address to the Slave1 (i.e. the device address1 of Slave 1), slave1 compares the address sent by Master a with its own device address, when Slave1 finds that the address is the same as the device address of itself, it determines that itself is currently addressed by Master a, and responds to the address of Master a. After the Master A addresses successfully, data transmission can be performed between the Master A and the Slave Slave 1.
In some practical applications, it is also sometimes necessary to implement communication between a plurality of masters and one slave. Thus, it is desirable to upgrade a bus system with one master to a bus system with one slave for multiple masters. To save upgrade costs, the original hosts, such as host Master A and host Master B in FIG. 1, may be used. However, the user program in the original host has been cured, so that the device address of the slave set in the host cannot be changed. For example, for Master a in fig. 1, it can only communicate with Slave1, and as such, the Master B in fig. 1 can only communicate with the Slave2, and it can be seen that the Master a and the Master B cannot implement the upgrade of the bus system.
Disclosure of Invention
In order to solve the technical problems, the embodiment of the invention provides an address addressing method of an integrated circuit bus, integrated circuit bus equipment and a system, which are used for realizing the upgrade of a bus system with a plurality of hosts and one slave by using the existing host, thereby saving the upgrade cost.
The embodiment of the invention discloses the following technical scheme:
an address addressing method of an integrated circuit bus, which is applied to an integrated circuit bus system in which a plurality of hosts communicate with a slave, comprises the following steps:
receiving an addressing address sent by a host in the integrated circuit bus system;
comparing the addressing address with a plurality of preset device addresses, wherein the device addresses are device addresses of slaves configured on each master in the integrated circuit bus system;
if the addressing address is consistent with any one of the plurality of device addresses, determining that the host addressing is successful, otherwise, determining that the host addressing is failed;
and responding to the host according to the determined addressing result.
An integrated circuit bus device for use in an integrated circuit bus system in which a plurality of hosts communicate with a slave, comprising:
the receiving module is used for receiving an addressing address sent by a host in the integrated circuit bus system;
the comparison module is used for comparing the addressing address with a plurality of preset device addresses, wherein the device addresses are device addresses of the slaves configured on each master in the integrated circuit bus system;
an addressing result determining module, configured to determine that the host addressing is successful if the addressing address is consistent with any one of the device addresses, or determine that the host addressing is failed;
and the addressing response module is used for responding to the host according to the determined addressing result.
An integrated circuit bus system, comprising: a plurality of hosts and a slave, the plurality of hosts and the slave being connected by an integrated circuit bus, wherein,
the plurality of hosts are used for sending addressing addresses to the slaves;
the slave comprises a receiving module, a comparing module and an addressing response module,
the receiving module is used for receiving an addressing address sent by a host in the integrated circuit bus system;
the comparison module is used for comparing the addressing address with a plurality of preset device addresses, wherein the device addresses are device addresses of the slaves configured on each master in the integrated circuit bus system;
an addressing result determining module, configured to determine that the host addressing is successful if the addressing address is consistent with any one of the device addresses, or determine that the host addressing is failed;
and the addressing response module is used for responding to the host according to the determined addressing result.
As can be seen from the above embodiments, in an integrated circuit bus system in which a plurality of hosts communicate with one slave, new device addresses are set for the slave, and these new device addresses are device addresses of the slaves configured on each host in the integrated circuit bus system. Therefore, under the condition that the host computer does not need to be changed, the system can be upgraded into a system in which a plurality of host computers are communicated with one slave computer only by resetting the equipment address of the slave computer, and the cost of upgrading the system is saved.
Drawings
In order to more clearly illustrate the embodiments of the invention or the technical solutions of the prior art, the drawings which are used in the description of the embodiments or the prior art will be briefly described, it being obvious that the drawings in the description below are only some embodiments of the invention, and that other drawings can be obtained according to these drawings without inventive faculty for a person skilled in the art.
FIG. 1 is a system diagram of an integrated circuit bus system with a master and a slave according to the prior art;
FIG. 2 is a flow chart of one embodiment of a method for address addressing of an integrated circuit bus according to the present invention;
FIG. 3 is a schematic diagram of a system with three masters and one slave integrated circuit bus according to the present invention;
FIG. 4 is a block diagram of one embodiment of an integrated circuit bus device of the present invention;
FIG. 5 is a block diagram of another embodiment of an integrated circuit bus device of the present invention;
FIG. 6 is a block diagram of one embodiment of an integrated circuit bus system of the present invention.
Detailed Description
The embodiment of the invention provides an address addressing method of an integrated circuit bus, integrated circuit bus equipment and an integrated circuit bus system. In an integrated circuit bus system in which a plurality of hosts communicate with a slave, new device addresses are set for the slave, and the new device addresses are device addresses of the slave configured on each host in the integrated circuit bus system. Thus, the system can be upgraded to a system in which a plurality of hosts communicate with one slave only by resetting the device address of the slave without changing the hosts. In order that the above-recited objects, features and advantages of the present invention will become more readily apparent, a more particular description of embodiments of the invention will be rendered by reference to the appended drawings.
Example 1
Referring to fig. 2, a flowchart of an address addressing method of an integrated circuit bus according to an embodiment of the present invention is applied to an integrated circuit bus system in which a plurality of hosts communicate with a slave, and includes the following steps:
step 201: receiving an addressing address sent by a host in the integrated circuit bus system;
step 202: comparing the addressing address with a plurality of preset device addresses, wherein the device addresses are device addresses of slaves configured on each master in the integrated circuit bus system;
step 203: if the addressing address is consistent with any one of the plurality of device addresses, determining that the host addressing is successful, otherwise, determining that the host addressing is failed;
step 204: and responding to the host according to the determined addressing result.
In the present invention, "plurality of" in "a plurality of hosts" means two or more in number, including two.
As shown in fig. 3, which is a system schematic diagram of an integrated circuit bus with three hosts and one Slave in the present invention, the three hosts in fig. 3 are respectively Master1, master2 and Master3, one Slave is Slave a, and the device address configured in Slave a is address a. The device addresses of the Slave computers are configured in the three master computers respectively, and the device address of the Slave computer configured in the three master computers can be the device address A of the Slave computer Slave A in the system, and of course, the device addresses of other Slave computers can also be the device address of other Slave computers. Assume that the device addresses of the slaves configured in the three masters are not the device address a of the Slave a, but address1, address2, and address3, respectively. In the invention, the device addresses of the Slave computers configured on the Master1, the Master2 and the Master3, namely address1, address2 and address3, are preconfigured in the Slave computer Slave A. When the Master1 sends an address to the Slave a (the address is address 1), the Slave a compares the address with three preset device addresses, when the addressing address is found to be consistent with one of three preset device addresses, the host Master1 is determined to be successful in addressing the Slave A, and the host Master1 is responded, so that the host Master1 knows that the Slave A is successfully addressed.
Preferably, after responding to the host, the method further comprises: communication is established with the host.
As can be seen from the above embodiments, in an integrated circuit bus system in which a plurality of hosts communicate with one slave, new device addresses are set for the slave, and these new device addresses are device addresses of the slaves configured on each host in the integrated circuit bus system. Therefore, under the condition that the host computer does not need to be changed, the system can be upgraded into a system in which a plurality of host computers are communicated with one slave computer only by resetting the equipment address of the slave computer, and the cost of upgrading the system is saved.
Example two
Corresponding to the address addressing method of the integrated circuit bus system, the embodiment of the invention also provides integrated circuit bus equipment. Referring to fig. 4, a block diagram of an integrated circuit bus device according to an embodiment of the present invention is applied to an integrated circuit bus system in which a plurality of hosts communicate with a slave, and includes a receiving module 401, a comparing unit 402, an addressing result determining module 403, and an addressing response module 404. The internal structure and connection relationship of the device will be further described below in connection with the working principle of the device.
A receiving module 401, configured to receive an address sent by a host in the integrated circuit bus system;
a comparing module 402, configured to compare the address with a plurality of preset device addresses, where the plurality of device addresses are device addresses of slaves configured on each of the hosts in the integrated circuit bus system;
an addressing result determining module 403, configured to determine that the host addressing is successful if the addressing address is consistent with any one of the device addresses, and determine that the host addressing is failed if not;
an address response module 404, configured to respond to the host according to the determined address result.
Preferably, as shown in fig. 5, the apparatus further comprises a communication module for establishing communication with the host after responding to the host.
Preferably, the plurality of device addresses extend in registers of the integrated circuit bus device.
As can be seen from the above embodiments, in an integrated circuit bus system in which a plurality of hosts communicate with one slave, new device addresses are set for the slave, and these new device addresses are device addresses of the slaves configured on each host in the integrated circuit bus system. Therefore, under the condition that the host computer does not need to be changed, the system can be upgraded into a system in which a plurality of host computers are communicated with one slave computer only by resetting the equipment address of the slave computer, and the cost of upgrading the system is saved.
Example III
The embodiment of the invention also provides an integrated circuit bus system. Referring to fig. 6, which is a block diagram of an embodiment of an integrated circuit bus system of the present invention, the system includes a plurality of hosts 601 (1) to 601 (n) and a slave 602, the plurality of hosts 601 (1) to 601 (n) are connected to the slave 602 through an integrated circuit bus, wherein,
a plurality of hosts 601 (1) to 601 (n) for transmitting addressing addresses to the slaves 602;
the slave 602 includes: a receiving module 6021, a comparing module 6022, an addressing result determining module 6023 and an addressing response module 6024. The internal structure and connection relationship of the device will be further described below in connection with the working principle of the device.
The receiving module 6021 is configured to receive an address sent by a host in the integrated circuit bus system;
a comparing module 6022, configured to compare the address with a plurality of preset device addresses, where the plurality of device addresses are device addresses of slaves configured on each of the hosts in the integrated circuit bus system;
an addressing result determining module 6023, configured to determine that the host addressing is successful if the addressing address is consistent with any one of the device addresses, or determine that the host addressing is failed;
an address response module 6024 for responding to the host according to the determined address result.
Preferably, the slave 602 further includes: a communication module for establishing communication with the host after responding to the host,
preferably, the plurality of device addresses extend in registers of the integrated circuit bus device.
As can be seen from the above embodiments, in an integrated circuit bus system in which a plurality of hosts communicate with one slave, new device addresses are set for the slave, and these new device addresses are device addresses of the slaves configured on each host in the integrated circuit bus system. Therefore, under the condition that the host computer does not need to be changed, the system can be upgraded into a system in which a plurality of host computers are communicated with one slave computer only by resetting the equipment address of the slave computer, and the cost of upgrading the system is saved.
It should be noted that, it will be understood by those skilled in the art that all or part of the procedures in implementing the methods of the embodiments described above may be implemented by a computer program to instruct related hardware, where the program may be stored in a computer readable storage medium, and the program may include the procedures of the embodiments of the methods described above when executed. The storage medium may be a magnetic disk, an optical disk, a Read-Only Memory (ROM), a random access Memory (Random Access Memory, RAM), or the like.
The above description of the address addressing method of the integrated circuit bus, the integrated circuit bus device and the system provided by the present invention has been provided in detail, and specific embodiments are applied to illustrate the principles and implementation of the present invention, where the above description of the embodiments is only used to help understand the method of the present invention and its core idea; meanwhile, as those skilled in the art will have variations in the specific embodiments and application scope in accordance with the ideas of the present invention, the present description should not be construed as limiting the present invention in view of the above.
Claims (8)
1. An address addressing method for an integrated circuit bus, which is applied to an integrated circuit bus system in which a plurality of hosts communicate with a slave, and comprises:
the slave receives an addressing address sent by a host in the integrated circuit bus system;
the slave compares the addressing address with a plurality of preset device addresses, wherein the device addresses are the device addresses of the slave configured on each host in the integrated circuit bus system;
if the addressing address is consistent with any one of the device addresses, the slave determines that the host addressing is successful, otherwise, the slave determines that the host addressing fails;
the slave responds to the master according to the determined addressing result.
2. The method according to claim 1, wherein the method further comprises:
after responding to the host, communication is established with the host.
3. An integrated circuit bus device for use in an integrated circuit bus system in which a plurality of masters communicate with a slave, comprising:
the slave comprises a receiving module, a comparing module, an addressing result determining module and an addressing response module,
the receiving module is used for receiving an addressing address sent by a host in the integrated circuit bus system;
the comparison module is used for comparing the addressing address with a plurality of preset device addresses, wherein the device addresses are device addresses of the slaves configured on each master in the integrated circuit bus system;
an addressing result determining module, configured to determine that the host addressing is successful if the addressing address is consistent with any one of the device addresses, or determine that the host addressing is failed;
and the addressing response module is used for responding to the host according to the determined addressing result.
4. A device according to claim 3, characterized in that the device further comprises:
and the communication module is used for establishing communication with the host after responding to the host.
5. The device of claim 3 or 4, wherein the plurality of device addresses extend in registers of the integrated circuit bus device.
6. An integrated circuit bus system, comprising: a plurality of hosts and a slave, the plurality of hosts and the slave being connected by an integrated circuit bus, wherein,
the plurality of hosts are used for sending addressing addresses to the slaves;
the slave comprises a receiving module, a comparing module, an addressing result determining module and an addressing response module,
the receiving module is used for receiving an addressing address sent by a host in the integrated circuit bus system;
the comparison module is used for comparing the addressing address with a plurality of preset device addresses, wherein the device addresses are device addresses of the slaves configured on each master in the integrated circuit bus system;
an addressing result determining module, configured to determine that the host addressing is successful if the addressing address is consistent with any one of the device addresses, or determine that the host addressing is failed;
and the addressing response module is used for responding to the host according to the determined addressing result.
7. The system of claim 6, wherein the slave further comprises:
and the communication module is used for establishing communication with the host after responding to the host.
8. The system of claim 6 or 7, wherein the plurality of device addresses extend in registers of the integrated circuit bus device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410076585.5A CN104899164B (en) | 2014-03-04 | 2014-03-04 | Address addressing method for integrated circuit bus, integrated circuit bus device and system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410076585.5A CN104899164B (en) | 2014-03-04 | 2014-03-04 | Address addressing method for integrated circuit bus, integrated circuit bus device and system |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN104899164A CN104899164A (en) | 2015-09-09 |
| CN104899164B true CN104899164B (en) | 2023-05-30 |
Family
ID=54031837
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201410076585.5A Active CN104899164B (en) | 2014-03-04 | 2014-03-04 | Address addressing method for integrated circuit bus, integrated circuit bus device and system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN104899164B (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106775818B (en) * | 2016-11-11 | 2020-03-27 | 广州视源电子科技股份有限公司 | ECU (electronic control Unit) upgrading method and ECU upgrading equipment based on CAN (controller area network) bus |
| FR3097987A1 (en) * | 2019-06-26 | 2021-01-01 | STMicroelectronics (Alps) SAS | METHOD OF ADDRESSING AN INTEGRATED CIRCUIT ON A BUS AND CORRESPONDING DEVICE |
| CN111966378B (en) * | 2020-08-18 | 2024-01-09 | 深圳市康冠商用科技有限公司 | Board version upgrading method, device and medium |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1216129A (en) * | 1996-04-10 | 1999-05-05 | 西门子公司 | Communication system with master station and at least one slave station |
| US6175887B1 (en) * | 1998-10-21 | 2001-01-16 | Sun Microsystems, Inc. | Deterministic arbitration of a serial bus using arbitration addresses |
| CN1533108A (en) * | 2003-03-21 | 2004-09-29 | ��Ϊ��������˾ | Method for realizing dynamic gateway load sharing and backup |
| CN1783045A (en) * | 2004-12-04 | 2006-06-07 | 鸿富锦精密工业（深圳）有限公司 | System and method for dynamically distributing device address on integrated circuit bus |
| CN101834912A (en) * | 2010-04-20 | 2010-09-15 | 南京航空航天大学 | Device for dynamically allocating slave addresses in pair of multistandard serial communications and use method |
| CN102244690A (en) * | 2011-07-26 | 2011-11-16 | 福建星网锐捷网络有限公司 | Address allocation method and system of dynamic host configuration protocol (DHCP) as well as client side and servers of same |
| JP2012150749A (en) * | 2011-01-21 | 2012-08-09 | Nec Corp | I2c bus communication control system and i2c bus communication control method |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2013088173A1 (en) * | 2011-12-14 | 2013-06-20 | Wolfson Microelectronics Plc | Data transfer |
| US20140006644A1 (en) * | 2012-06-28 | 2014-01-02 | Lsi Corporation | Address Remapping Using Interconnect Routing Identification Bits |
-
2014
- 2014-03-04 CN CN201410076585.5A patent/CN104899164B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1216129A (en) * | 1996-04-10 | 1999-05-05 | 西门子公司 | Communication system with master station and at least one slave station |
| US6175887B1 (en) * | 1998-10-21 | 2001-01-16 | Sun Microsystems, Inc. | Deterministic arbitration of a serial bus using arbitration addresses |
| CN1533108A (en) * | 2003-03-21 | 2004-09-29 | ��Ϊ��������˾ | Method for realizing dynamic gateway load sharing and backup |
| CN1783045A (en) * | 2004-12-04 | 2006-06-07 | 鸿富锦精密工业（深圳）有限公司 | System and method for dynamically distributing device address on integrated circuit bus |
| CN101834912A (en) * | 2010-04-20 | 2010-09-15 | 南京航空航天大学 | Device for dynamically allocating slave addresses in pair of multistandard serial communications and use method |
| JP2012150749A (en) * | 2011-01-21 | 2012-08-09 | Nec Corp | I2c bus communication control system and i2c bus communication control method |
| CN102244690A (en) * | 2011-07-26 | 2011-11-16 | 福建星网锐捷网络有限公司 | Address allocation method and system of dynamic host configuration protocol (DHCP) as well as client side and servers of same |
Also Published As
| Publication number | Publication date |
|---|---|
| CN104899164A (en) | 2015-09-09 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| EP3234788B1 (en) | DATA TRANSMISSION USING PCIe PROTOCOL VIA USB PORT | |
| JP5917408B2 (en) | Configurable connector for system level communication | |
| WO2016037503A1 (en) | Configuration method and device of pcie topology | |
| CN107111564B (en) | Adapter for connecting connectors in series | |
| US20170255585A1 (en) | Method and system for switching role of usb otg device and otg device thereof | |
| CN103645975B (en) | A kind of method of abnormal restoring and serial bus transmission device | |
| US9772965B2 (en) | Multi-channel peripheral interconnect supporting simultaneous video and bus protocols | |
| US10614011B2 (en) | Apparatus, method, and electronic device for implementing solid-state drive data interaction | |
| CN108475241B (en) | SPI-based data transmission method and device | |
| CN103473202B (en) | USB OTG, electronic equipment and the method realizing OTG function | |
| CN104899164B (en) | Address addressing method for integrated circuit bus, integrated circuit bus device and system | |
| CN103106113A (en) | Interrupt event processing method and processing equipment | |
| CN103412838B (en) | A kind of expanding system, communication means, address configuration method, equipment and device | |
| CN103559149A (en) | Method and system for working mode switchover of universal serial bus on-the-go (USB OTG) dual-role devices | |
| US10521385B2 (en) | Inter-device digital audio | |
| CN102929828B (en) | Support data transmission method and the device of standard and non-standard I 2C interface simultaneously | |
| CN109753461B (en) | DMA device and data transmission method | |
| CN104679688A (en) | Data access method, device and system | |
| US11995026B2 (en) | Techniques for configuring endpoints within a USB extension environment | |
| US20220027305A1 (en) | Techniques for configuring endpoints within a usb extension environment | |
| CN204009875U (en) | IC bus equipment and system | |
| CN114253894A (en) | Full-duplex communication method and device based on I2C protocol and electronic equipment | |
| CN117008968A (en) | Control method, control device, communication equipment, electronic equipment and medium | |
| CN101901113B (en) | Setting method of serial attached SCSI (Small Computer System Interface) expansion card | |
| WO2017132864A1 (en) | Method and system for usb host-client mode switching of vr device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |