CN104835533A - Electric leakage detecting method and memory - Google Patents
Electric leakage detecting method and memory Download PDFInfo
- Publication number
- CN104835533A CN104835533A CN201410044784.8A CN201410044784A CN104835533A CN 104835533 A CN104835533 A CN 104835533A CN 201410044784 A CN201410044784 A CN 201410044784A CN 104835533 A CN104835533 A CN 104835533A
- Authority
- CN
- China
- Prior art keywords
- wordline
- voltage
- word line
- detecting method
- leakage detecting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- For Increasing The Reliability Of Semiconductor Memories (AREA)
Abstract
The invention discloses an electric leakage detecting method and a memory. The electric leakage detecting method comprises the following steps: applying testing voltage onto a word line, wherein the testing voltage is in a range of 1 to 5 volt; and removing the testing voltage from the word line and discriminating the electric leakage state of the word line according to voltage changes of the word line.
Description
Technical field
The invention relates to a kind of semiconductor, and relate to a kind of leakage detecting method and storer especially.
Background technology
Along with making rapid progress of semiconductor process techniques, the element closeness of memory inside also day by day promotes.The pole tiny flaw produced in technique will become affects storage failure whether key.In recent years, be used for detecting the fault detect of storer, become the indispensable standard step in technique.Please refer to Fig. 1, Fig. 1 illustrates as legacy memory is in the schematic diagram of leakage tests wordline.Legacy memory 1 comprises memory block 11, wordline 12, voltage generator 13 and booster circuit 14.Wordline 12 couples memory block 11.Legacy memory 1, when leakage tests, is produce test voltage Vpower by by voltage generator 13.Then, by booster circuit 14, test voltage Vpower is promoted to high voltage Vh, high voltage Vh is such as 10 volts.Then, high voltage Vh is put on wordline 12 by booster circuit 14, to differentiate the electric leakage state of wordline 12.But, in order to detect the electric leakage of wordline 12, just legacy memory 1 must arrange booster circuit 14 extraly can obtain high voltage Vh.In addition, booster circuit 14 also needs test voltage Vpower could be promoted to high voltage Vh one period of pressure rising time.Above-mentioned pressure rising time is such as 10 microseconds.As shown in the above description, legacy memory 1, on the leakage detecting of wordline 12, still also exists many restrictions and inconvenience.So industry needs a kind of word line leakage method for detecting of improvement in fact at present.
Summary of the invention
The invention relates to a kind of leakage detecting method and storer.
According to the present invention, a kind of leakage detecting method is proposed.Leakage detecting method comprises: apply test voltage to wordline, and test voltage is between 1 volt to 5 volts; And by test voltage after wordline removes, according to the change in voltage of wordline, differentiate the electric leakage state of wordline.
According to the present invention, a kind of leakage detecting method is proposed.Leakage detecting method comprises: after performing erase operation to memory block, and apply test voltage to wordline, wordline is coupled to memory block; When the word line voltage of wordline arrives acquiescence level, test voltage is removed from wordline, and maintains a Preset Time; After default time, read word line voltage; According to word line voltage and reference voltage, differentiate the electric leakage state of wordline; And when electric leakage abnormal state, then programming operation is not performed to memory block.
According to the present invention, a kind of storer is proposed.Storer comprises memory block, wordline, voltage generator, on-off circuit, comparer and steering logic.Wordline is coupled to memory block.Voltage generator provides test voltage.Steering logic gauge tap circuit is electrically connected wordline and voltage generator, makes test voltage be applied to wordline.When word line voltage arrives acquiescence level, wordline is separated with voltage generator by steering logic gauge tap circuit, and maintains a Preset Time.After default time, steering logic gauge tap circuit is electrically connected wordline and comparer, makes comparer read word line voltage, and comparer, according to word line voltage and reference voltage, differentiates the electric leakage state of wordline.
In order to have better understanding to above-mentioned and other aspect of the present invention, preferred embodiment cited below particularly, and coordinating institute's accompanying drawings, being described in detail below:
Accompanying drawing explanation
Fig. 1 illustrates as legacy memory is in the schematic diagram of leakage tests wordline.
Fig. 2 illustrates the schematic diagram into a kind of storer according to the present embodiment.
Fig. 3 illustrates the process flow diagram into a kind of leakage detecting method according to the present embodiment.
Fig. 4 illustrates as applying the equivalent circuit diagram of test voltage to wordline.
Fig. 5 illustrates the equivalent circuit diagram for removing test voltage from wordline.
Fig. 6 illustrates the equivalent circuit diagram into reading word line voltage.
[symbol description]
1: legacy memory
2: according to the storer of the present embodiment
11,21: memory block
12,22: wordline
13,23: voltage generator
14: booster circuit
24: on-off circuit
25: comparer
26: steering logic
241: power switch
242: selector switch
243: Test Switchboard
301 ~ 306: step
Vpower: test voltage
Vh: high voltage
Vref: reference voltage
Vwl: word line voltage
Ractwl, Radjw, Rshort: equivalent resistance
Cactw, Cshort, Cadjw: equivalent capacity
Embodiment
First embodiment
Please refer to Fig. 2, Fig. 2 illustrates the schematic diagram into a kind of storer according to the present embodiment.Storer 2 comprises memory block 21, wordline 22, voltage generator 23, on-off circuit 24, comparer 25 and steering logic 26.Wordline 22 couples memory block 21.Voltage generator 23 is in order to provide test voltage Vpower.Test voltage Vpower is such as between 1 volt to 5 volts.Preferably, test voltage Vpower is between 1 volt to 3.3 volts.More preferably, test voltage Vpower is between 1.3 volts to 1.6 volts.
Steering logic 26 gauge tap circuit 24 is electrically connected wordline 22 and voltage generator 23, makes test voltage Vpower be applied to wordline 22.When the word line voltage in wordline 22 arrives acquiescence level, wordline 22 is separated with voltage generator 23 by steering logic 26 gauge tap circuit 24, and maintains a Preset Time.Acquiescence level is identical in fact with test voltage Vpower.Preset Time is such as between 10 microseconds to 2 millisecond.Preferably, Preset Time is between 50 microseconds to 1 millisecond.More preferably, Preset Time is between 100 microsecond to 600 microseconds.
After default time, steering logic 26 gauge tap circuit 24 is electrically connected wordline 22 and comparer 25, makes comparer 25 read word line voltage Vwl.Comparer 26 differentiates the electric leakage state of wordline according to word line voltage Vwl and reference voltage Vref.Reference voltage Vref is such as between 0.9 volt to 4.9 volts.Preferably, reference voltage Vref is between 0.9 volt to 3.2 volts.More preferably, reference voltage Vref is between 1.23 volts to 1.53 volts.
Furthermore, on-off circuit 24 comprises power switch 241, selector switch 242 and Test Switchboard 243.Power switch 241, selector switch 242 and Test Switchboard 243 are such as metal oxide semiconductcor field effect transistor (Metal-Oxide-Semiconductor Field-Effect Transistor, MOSFET).Steering logic 26 first controls power switch 241, selector switch 242 and Test Switchboard 243 and is electrically connected voltage generator 23 and wordline 22, makes voltage generator 23 apply test voltage Vpower to wordline 22.After the word line voltage Vwl in wordline 22 arrives acquiescence level, steering logic 26 controls power switch 241 again and selector switch 242 ends to be removed from wordline 22 by test voltage Vpower.Then, steering logic 26 controls power switch 241, selector switch 242 and Test Switchboard 243 and is electrically connected comparer 25 and wordline 22, makes comparer 25 read word line voltage Vwl.Comparer 25 compares word line voltage Vwl and reference voltage Vref.When word line voltage Vwl is less than reference voltage Vref, the electric leakage abnormal state of wordline 22 differentiated by comparer 25.The memory block 21 coupled with wordline 22 can be denoted as a fault block, avoids follow-uply carrying out any operation again to memory block 21.
Referring to Fig. 2, Fig. 3, Fig. 4, Fig. 5 and Fig. 6, Fig. 3 illustrates the process flow diagram into a kind of leakage detecting method according to the present embodiment, Fig. 4 illustrates as applying the equivalent circuit diagram of test voltage to wordline, Fig. 5 illustrates the equivalent circuit diagram for removing test voltage from wordline, and Fig. 6 illustrates the equivalent circuit diagram into reading word line voltage.The leakage detecting method of storer 1 comprises the steps: first as depicted at step 301, and after performing erase operation to memory block 21, voltage generator 23 applies test voltage Vpower to wordline 22, as shown in Figure 4.Form an equivalent resistance Rshort between the equivalent resistance Ractwl of wordline 22 and the equivalent resistance Radjw of adjacent word line, equivalent resistance Rshort represents that wordline 22 is adjacent the leakage path between wordline.If electric leakage abnormal state, then equivalent resistance Rshort is equivalent to short-circuit condition.On the contrary, if electric leakage state is without exception, then equivalent resistance Rshort is equivalent to open-circuit condition.
Form equivalent capacity Cactw between wordline 22 and earth terminal, and form equivalent capacity Cadjw between adjacent word line and earth terminal.Equivalent capacity Cshort is formed between equivalent resistance Rshort and earth terminal.Steering logic 26 controls selector switch 242 and Test Switchboard 243 conducting, makes voltage generator 23 apply test voltage Vpower to wordline 22.That is test voltage Vpower exports equivalent resistance Rshort to through selector switch 242 and Test Switchboard 243.Then as shown in step 302, when the word line voltage Vwl of wordline 13 arrives acquiescence level, test voltage Vpower is removed from wordline 22, and maintains a Preset Time, as shown in Figure 5.Steering logic 26 controls power switch 241 again and selector switch 242 ends to be removed from wordline 22 by test voltage Vpower.If electric leakage abnormal state, then the word line voltage Vwl of wordline 13 will discharge from equivalent resistance Rshort and equivalent resistance Radjw.
And then as disclosed at step 303, comparer 25 reads word line voltage Vwl, as shown in Figure 6.Steering logic 26 controls power switch 241 and selector switch 242 conducting, makes comparer 25 read word line voltage Vwl through power switch 241 and selector switch 242.Whether then as shown in step 304, comparer 25 compares word line voltage Vwl and reference voltage Vref, abnormal to judge the electric leakage state of wordline 22.When word line voltage Vwl is less than reference voltage Vref, represent the electric leakage abnormal state of wordline 22.If electric leakage abnormal state, then perform step 305.As shown in a step 305, programming operation is not performed to memory block.On the contrary, electric leakage state is without exception, then perform step 306.As shown at step 306, programming operation is performed to memory block.
In brief, above-mentioned leakage detecting method first applies test voltage Vpower to wordline 22.Again test voltage Vpower is removed from wordline 22.Test voltage Vpower after wordline 22 removes, then differentiates the electric leakage state of wordline 22 according to the change in voltage of wordline 22.Thus, the storer that above-described embodiment is contained and leakage detecting method thereof do not need additionally to use booster circuit to promote test voltage Vpower.In addition, the storer that above-described embodiment is contained and leakage detecting method thereof also do not need additional waste to promote pressure rising time needed for test voltage.
In sum, although the present invention with preferred embodiment disclose as above, so itself and be not used to limit the present invention.Persond having ordinary knowledge in the technical field of the present invention, without departing from the spirit and scope of the present invention, when being used for a variety of modifications and variations.Therefore, protection scope of the present invention is when being as the criterion of defining depending on the right of enclosing.
Claims (10)
1. a leakage detecting method, comprising:
Apply test voltage to wordline, this test voltage is between 1 volt to 5 volts; And
By this test voltage after this wordline removes, according to a change in voltage of this wordline, differentiate the electric leakage state of this wordline.
2. leakage detecting method according to claim 1, wherein this discriminating step, comprising:
When a word line voltage of this wordline arrives an acquiescence level, this test voltage is removed from this wordline, and maintains a Preset Time;
After this default time, read this word line voltage;
Relatively this word line voltage and this reference voltage; And
When the voltage of this wordline is less than this reference voltage, this memory block is denoted as a faulty section.
3. leakage detecting method according to claim 2, wherein this reference voltage is between 0.9 volt to 4.9 volts.
4. leakage detecting method according to claim 2, wherein this Preset Time is between 10 microseconds to 2 millisecond.
5. a leakage detecting method, comprising:
After performing erase operation to a memory block, apply test voltage to wordline, this wordline is coupled to this memory block;
When a word line voltage of this wordline arrives an acquiescence level, this test voltage is removed from this wordline, and maintains a Preset Time;
After this default time, read this word line voltage;
According to this word line voltage and a reference voltage, differentiate an electric leakage state of this wordline; And
When this electric leakage abnormal state, then a programming operation is not performed to this memory block.
6. leakage detecting method according to claim 5, wherein this test voltage is between 1 volt to 5 volts.
7. leakage detecting method according to claim 5, wherein this reference voltage is between 0.9 volt to 4.9 volts.
8. leakage detecting method according to claim 5, wherein this Preset Time is between 10 microseconds to 2 millisecond.
9. a storer, comprising:
One memory block;
One wordline, is coupled to this memory block;
One voltage generator, in order to provide a test voltage;
One on-off circuit;
One comparer; And
One steering logic, this wordline and this voltage generator is electrically connected in order to control this on-off circuit, this test voltage is made to be applied to this wordline, when this word line voltage arrives an acquiescence level, this steering logic controls this on-off circuit and this wordline is separated with this voltage generator, and maintain a Preset Time, after this Preset Time, this steering logic controls this on-off circuit and is electrically connected this wordline and this comparer, this comparer is made to read this word line voltage, this comparer, according to this word line voltage and a reference voltage, differentiates the electric leakage state of this wordline.
10. storer according to claim 9, wherein this comparer compares this word line voltage and this reference voltage, and when the voltage of this wordline is less than this reference voltage, this electric leakage abnormal state differentiated by this comparer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410044784.8A CN104835533A (en) | 2014-02-07 | 2014-02-07 | Electric leakage detecting method and memory |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410044784.8A CN104835533A (en) | 2014-02-07 | 2014-02-07 | Electric leakage detecting method and memory |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN104835533A true CN104835533A (en) | 2015-08-12 |
Family
ID=53813361
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201410044784.8A Pending CN104835533A (en) | 2014-02-07 | 2014-02-07 | Electric leakage detecting method and memory |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN104835533A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11908533B2 (en) | 2021-06-29 | 2024-02-20 | Samsung Electronics Co., Ltd. | Memory device detecting leakage current and operation method thereof |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1745432A (en) * | 2002-12-12 | 2006-03-08 | 桑迪士克股份有限公司 | Error recovery for nonvolatile memory |
| CN101377960A (en) * | 2007-08-27 | 2009-03-04 | 旺宏电子股份有限公司 | Apparatus and method for detecting word line leakage in memory devices |
| CN102760496A (en) * | 2011-04-26 | 2012-10-31 | 宜扬科技股份有限公司 | Word line leakage detecting method, system and storage media of Nor type flash memory device |
-
2014
- 2014-02-07 CN CN201410044784.8A patent/CN104835533A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1745432A (en) * | 2002-12-12 | 2006-03-08 | 桑迪士克股份有限公司 | Error recovery for nonvolatile memory |
| CN101377960A (en) * | 2007-08-27 | 2009-03-04 | 旺宏电子股份有限公司 | Apparatus and method for detecting word line leakage in memory devices |
| CN102760496A (en) * | 2011-04-26 | 2012-10-31 | 宜扬科技股份有限公司 | Word line leakage detecting method, system and storage media of Nor type flash memory device |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11908533B2 (en) | 2021-06-29 | 2024-02-20 | Samsung Electronics Co., Ltd. | Memory device detecting leakage current and operation method thereof |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102237140B (en) | Fuse programming circuit and fuse programming method | |
| CN106356823B (en) | The surge protection circuit being integrated in chip | |
| CN102004218B (en) | Chip acceptability testing method | |
| JPH077139A (en) | Circuit with fuse for integrated circuit | |
| CN102646450B (en) | One Time Programmable bit location | |
| CN101593557A (en) | The method of operating of grid flash memory | |
| CN103033728A (en) | Time dependent dielectric breakdown test circuit and test method | |
| CN105450023B (en) | A kind of switch controlled circuit | |
| CN104835533A (en) | Electric leakage detecting method and memory | |
| CN103852701A (en) | MOS transistor testing circuit and corresponding testing method | |
| CN106483421A (en) | Open-short circuit system and method for testing between one kind is point-to-point | |
| CN106611615B (en) | The operating method and resistive memory of resistance-type memory cell | |
| CN106300248B (en) | A kind of under-voltage protecting circuit of current control mode | |
| CN109274140A (en) | Battery monitoring apparatus | |
| CN102436850A (en) | Method for detecting interference of reading operation on neighboring cell | |
| CN103344898A (en) | Factory acceptance test system and method for wafer | |
| CN102135756A (en) | Voltage application time period measuring circuit and power supply apparatus including the same | |
| CN110635449A (en) | Protection circuit and test structure | |
| JP5969941B2 (en) | Method for testing semiconductor transistors | |
| CN104155900A (en) | Capacitor on-line monitoring control device for high pressure power distribution system | |
| CN205092236U (en) | Chip of built -in circuit able to programme | |
| CN204214930U (en) | The test structure of programmable electronic fuse | |
| CN103811056A (en) | Nonvolatile memory clamp circuit | |
| CN105528049B (en) | The configuration method and terminal of SD card CMD pin driving currents | |
| CN206270437U (en) | Open-short circuit system between one kind is point-to-point |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| EXSB | Decision made by sipo to initiate substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20150812 |
|
| WD01 | Invention patent application deemed withdrawn after publication |