CN104811597A - Integrated smart camera - Google Patents
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- CN104811597A CN104811597A CN201510204338.3A CN201510204338A CN104811597A CN 104811597 A CN104811597 A CN 104811597A CN 201510204338 A CN201510204338 A CN 201510204338A CN 104811597 A CN104811597 A CN 104811597A
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Abstract
The invention relates to image capture devices, in particular an integrated smart camera and belongs to the technical field of industrial cameras. According to the technical scheme, the integrated smart camera comprises a camera housing and an image sensor arranged in the camera housing for capturing an image. The image sensor is connected to a logic time sequence management image pre-processing module. The logic time sequence management image pre-processing module is connected to a high-speed image processing module for performing image processing for transmitting the preprocessed image to the high-speed image processing module. The logic time sequence management image pre-processing module and the high-speed image processing module are arranged in the camera housing. The integrated smart camera is compact in structure, capable of achieving image capture and image recognition and improving image processing efficiency, wide in application range, safe and reliable.
Description
Technical field
The present invention relates to a kind of image capture device, especially a kind of integral intelligent camera, belongs to the technical field of industrial camera.
Background technology
Society, along with develop rapidly that is economic and technology, the world enters the information age, how reads information and processes, and is a significant problem.In this context, automatic identification technology arises at the historic moment.Automatic identification technology (Automatic Identification Technology) carries out automatically identifying and reading, the important method being automatically input to computer and means to information data, and it is the Comprehensive Science technology developing into basis with computer technology, photoelectric technology and the communication technology.Automatic identification technology obtains swift and violent development nearly decades in the world, has begun to take shape a new and high technology subject comprising image recognition, optical character identification, radio-frequency (RF) identification, voice recognition and visual identity etc. and integrate computer, light, electromechanics, the communication technology.This technology for fast and automatically, accurately acquisition and processing data provide effective means, drastically increase production efficiency.
In recent years, the image recognition technology in automation recognition technology obtains and develops fast, and is widely used in industrial vision field.Automation recognition system in industrial vision field, contain IMAQ, image recognition (process), transfer of data three piths, the hardware foundation related to mainly contains image-forming module, field programmable gate array (i.e. FPGA), PC (mainly host computer), high speed digital signal processor (i.e. DSP) etc.
Along with the development and progress of each subject, image acquisition component can collect clear high-quality image, and image recognition algorithm becomes better and approaching perfection day by day, and PC also can deal with data at high speed.But, when the technology that modules relates to all comparatively perfect, in industrial vision field, existing automation recognition system still also exists a serious structure problem: utilize collected by camera image, and carry out the identification of image on host computer.On the one hand, image gathers in the camera, and is transferred on computer by modes such as Internet Transmissions.Raw image data amount after collection is often comparatively large, and add the load of transmission, a kind of method of solution compresses image.But image compression algorithm can cause image fault usually, by image recognition effect follow-up for impact.On the other hand, image recognition algorithm depends on view data.On host computer operation image recognizer need to consider the transmission of data, the parsing of data, the form of data, image recognition algorithm and data reading speed the problem such as to mate, these all make image recognition algorithm be subject to very large restriction.Generally speaking, this structure makes IMAQ and identifying depart from, recognition system complex structure, and the poor stability of system is difficult in maintenance.
Summary of the invention
The object of the invention is to overcome the deficiencies in the prior art, provide a kind of integral intelligent camera, its compact conformation, IMAQ and image recognition can be realized, improve the efficiency of image procossing, wide accommodation, safe and reliable.
According to technical scheme provided by the invention, described integral intelligent camera, comprise camera case and be positioned at described camera case and imageing sensor for gathering image, described imageing sensor is connected with logical sequence managing image pretreatment module, described logical sequence managing image pretreatment module with for carrying out the high rate burst communication model calling of image procossing, with can by pretreated image transmitting in high speed image processing module; The preliminary treatment of logical sequence managing image and high rate burst communication module are all positioned at camera case.
The front end of described camera case is provided with camera lens shell, is provided with for the LED to IMAQ light filling and for driving the LED light source control module of described LED in described camera lens shell, and described LED light source control module adopts PWM to control the operating state of LED.
Described imageing sensor comprise CCD image-forming module and with described CCD image-forming module) the C/CS camera lens that mates, logical sequence managing image pretreatment module adopts fpga chip.
Described logical sequence managing image pretreatment module is also connected with digital input-output interface, comprises two-way digital input interface and two-way digital output interface in described digital input-output interface.
Described high rate burst communication module comprises dsp processor, and described dsp processor adopts model to be the chip of TMS320DM6467, and described dsp processor is connected with RS485 bus, UART interface and RS232 interface respectively.
Compared with prior art, tool of the present invention has the following advantages:
1, the structure of " camera-host computer " of abandoning tradition of the present invention, operates in image recognition algorithm in the high speed digital signal processor (DSP) being built in camera, improves the efficiency of system to greatest extent.
2, realize the key that IMAQ is combined with image recognition to be image recognition algorithm to be transplanted in dsp processor 13 from host computer, the IMAQ be combined with dsp processor 13 by fpga chip and processing hardware system configuration, can realize the process such as front-end collection process and back-end image identification of image.
3, the result of identification is then outwards sent by Internet Transmission by dsp processor 13, and by formulating host-host protocol, the machine of any energy analysis protocol can receive and processing and identification result.Compared with traditional " camera-host computer " pattern, the integral intelligent camera in the present invention not only structure greatly simplifies, and only needs amendment algorithm that camera can be allowed to meet different identification missions, the prior degree of coupling being reduction of camera and communication side.Communication side can be host computer, also can be any can the machine of analytical propagation agreement; The identification details of camera internal need not be known by communication side, only needs to read and understands the next data of camera transmission, wide accommodation, safe and reliable.
Accompanying drawing explanation
Fig. 1 is structured flowchart of the present invention.
Description of reference numerals: 1-camera case, 2-camera lens shell, 3-LED light source control module, 4-C/CS camera lens, 5-CCD image-forming module, 6-logical sequence pipeline image pre-processing module, 7-external power interface, 8-digital input-output interface, 9-RS232 interface, 10-RS485 bus, 11-RJ45 interface, 12-high rate burst communication module, 13-DSP processor, 14-PHY physical layer, 15-DDR2 internal memory, 16-RTC, 17-EEPROM storage chip and 18-FLASH memory.
Embodiment
Below in conjunction with concrete drawings and Examples, the invention will be further described.
As shown in Figure 1: in order to IMAQ and image recognition can be realized, improve the efficiency of image procossing, the present invention includes camera case 1 and be positioned at described camera case 1 and imageing sensor for gathering image, described imageing sensor is connected with logical sequence managing image pretreatment module 6, described logical sequence managing image pretreatment module 6 is connected with the high rate burst communication module 12 for carrying out image procossing, with can by pretreated image transmitting in high speed image processing module 12; Logical sequence managing image preliminary treatment 6 and high rate burst communication module 12 are all positioned at camera case 1.
Particularly, in camera case 1, required image is gathered by imageing sensor, the sequential of IMAQ is carried out by logical sequence managing image pretreatment module 6 energy control chart image-position sensor, and required preliminary treatment can be carried out to the image after collection, logical sequence managing image pretreatment module 6 by pretreated image transmitting to high speed image processing module 12, high rate burst communication module 12 can carry out high speed processing to the image received, high rate burst communication module 12 pairs of images carry out concrete processing procedure and can select as required, concrete as carried out picture material identification etc., be specially known by the art personnel, repeat no more herein.In addition, camera case 1 is also provided with external power interface 7, the 12V/8A of external power supply can be converted to required+3.3V voltage ,+1.5V voltage ,+1.2V voltage or+5V voltage by external power interface 7, to meet the operating voltage in imageing sensor, logical sequence managing image pretreatment module 6, high rate burst communication module 12 and camera case 1 needed for other electricity consumption devices.
Further, the front end of described camera case 1 is provided with camera lens shell 2, be provided with for the LED to IMAQ light filling and for driving the LED light source control module 3 of described LED in described camera lens shell 2, described LED light source control module 3 adopts PWM to control the operating state of LED.
In the embodiment of the present invention, LED light source control module 3 is responsible for the driving of LED, controls to reach image exposure and light source synchronous by adopting PWM.External light source is very important for the collection of image, and too high light source will cause speck, and too low light source makes images dim, and this all will cause the destruction of picture structure.In addition, because environment light source (especially sunshine) is along with the change of time, the identification quality caused at different time chart pictures is affected.LED adopts high-power sapphire blue LED light source module, provides saturated external light source, eliminates the impact of environment light source.LED is positioned at camera lens shell 2, and camera lens shell 2 is positioned at the front end of camera case 1, and camera lens shell 2 and camera case 1 coaxially distribute.
The C/CS camera lens 4 that described imageing sensor comprises CCD image-forming module 5 and mates with described CCD image-forming module 5, logical sequence managing image pretreatment module 6 adopts fpga chip.
Described logical sequence managing image pretreatment module 6 is also connected with digital input-output interface 8, comprises two-way digital input interface and two-way digital output interface in described digital input-output interface 8.
In the embodiment of the present invention, CCD image-forming module 5 is made up of CCD sensor devices ICX274 (black and white), level transferring chip and AD sampling A/D chip.CCD image-forming module 5 is by the quality of direct effect diagram picture, and this identification for image is most important, in the specific implementation, use the ICX274AQ area array CCD of Sony Corporation, its valid pixel is 1600 × 1200, the maximum acquisition frame rate of 12 fps can be reached, and 1/1.8 cun of photosurface size.In addition, imageing sensor can also adopt cmos image sensor, and the matching relationship between C/CS camera lens 4 and CCD image-forming module 5, known by the art personnel, no longer describes in detail herein.
Logical sequence managing image pretreatment module 6 adopts fpga chip, and the exposure, gain etc. of the sequencing control of primary responsibility CCD image-forming module 5, the sample and transform of image, image control and the function of digital input-output interface 8 controls.In the specific implementation, logical sequence managing image pretreatment module 6 adopts the Cyclone II series of altera corp, and model is the FPGA of EP2C35F484C8N, has the advantages such as low cost, low-power consumption, high performance-price ratio.
Described high rate burst communication module 12 comprises dsp processor 13, and described dsp processor 13 adopts model to be the chip of TMS320DM6467, and described dsp processor 13 is connected with RS485 bus 10, UART interface and RS232 interface 9 respectively.
In the embodiment of the present invention, dsp processor 13 is responsible for image algorithm process, serial communication, the communication of RS485 bus 10, the function such as ethernet communication and system parameters configuration.Dsp processor 13 ensure that the execution efficiency of image processing algorithm, and the integrated smart cameras of parts such as serial ports, bus and Ethernet provide perfect means of communication.Camera information can be checked by serial ports, or build network service at a high speed by Ethernet, the networking of multiple stage camera can also be realized simultaneously by 485 buses.Dsp processor 13 is connected with RTC circuit 16, EEPROM storage chip 17, FLASH memory 18, and RTC circuit 16 provides required clock signal, and eeprom memory 17 can carry out required data and store.Dsp processor 13 is also connected with RJ45 interface 11 by PHY physical layer (open system interconnection (OSI)) 14, to realize being connected with the network of host computer etc.
That high rate burst communication module 12 adopts is Leonardo da Vinci (DaVinci) the processor TMS320DM6467 of TI company, and main technical characteristics is: built-in ARM926EJ-S RISC and TMS320C64x+ DSP two cores; Built-in On-Chip L2 Cache 128 KB (DSP); Built-in On-Chip L1 Cache 56 KB (ARM9), 64 KB (DSP); DSP endorses the disposal ability reaching 720M.And described dsp processor 13 provides abundant external expansion interface, described external expansion interface is respectively: 32 DDR2 internal memories 19 of 256MB, the NAND flash memory of 128MB, provide ATA interface to support IDE hard disk, provide SATA interface to support SATA hard disk, the video interface (VPIF) of 4 passages, EIA-485 (RS485) interface, USB 2.0 high-speed interface, supports as the external mass-memory units such as portable hard drive and 10MB/100MB/1000MB (1GB) Ethernet interface.
The initial data that CCD image-forming module 5 collects will carry out preliminary treatment in FPGA, and pretreated result through the video interface (VPIF) of dsp processor 13, and carries out the process that identifies with the DDR2 internal memory 19 that the mode of DMA enters dsp processor 13.
The form that CCD image-forming module 5 gathers original image is YUV coded system.The feature of YUV coding describes in detail the details of image, and picture quality is higher, however cost to be data volume larger.In old-fashioned " camera-host computer " structure, if camera runs recognizer to host computer transmission yuv data for it, then transmit load larger; If carried out compressing rear transmission by image, then the image fault that compression algorithm causes cannot be recovered, and the algorithm that compression and decompression relate to is consuming time comparatively large, makes ineffective systems.In the embodiment of the present invention, recognizer is embedded in built-in dsp processor 13, both need not have considered the load transmitted, and also can retain YUV coded format.After end of identification, recognition result can suitably compress by dsp processor 13, such as, be compressed into the jpeg format that data volume is very little.Then be transferred to communication side's (as host computer) again, because identifying terminates, recognition result no longer needs to carry out identifying, therefore the distortion that compression causes is acceptable.
In actual production, faced by mutually confidential is different identification missions.May be the identification of one-dimensional bar code, also may be identification of Quick Response Code etc.In old-fashioned " camera-host computer " structure, camera is responsible for collection and the transmission of image, and recognizer needs to perform in host computer, so for different identification missions, except needing to design except different algorithms, need to design different host computer structures toward contact.
And in the embodiment of the present invention, be responsible for different tasks by fpga chip and dsp processor 13, significantly reduce the degree of coupling of intermodule.Concrete recognizer performs in dsp processor 13, and after recognition result is sent to host computer according to the agreement set, host computer no longer needs the detail knowing identifying in camera, only needs can finish the work according to same protocol analysis.Changing identification mission, only needing just can realize by changing the recognizer performed in dsp processor 13.
In sum, adopt structure of the present invention, can effectively simplify and alleviate the design complexities of camera and communication side thereof.
The structure of " camera-host computer " of abandoning tradition of the present invention, operates in image recognition algorithm in the high speed digital signal processor (DSP) being built in camera, improves the efficiency of system to greatest extent.
Realize the key that IMAQ is combined with image recognition to be image recognition algorithm to be transplanted in dsp processor 13 from host computer, the IMAQ be combined with dsp processor 13 by fpga chip and processing hardware system configuration, can realize the process such as front-end collection process and back-end image identification of image.
The result of identification is then outwards sent by Internet Transmission by dsp processor 13, and by formulating host-host protocol, the machine of any energy analysis protocol can receive and processing and identification result.Compared with traditional " camera-host computer " pattern, the integral intelligent camera in the present invention not only structure greatly simplifies, and only needs amendment algorithm that camera can be allowed to meet different identification missions, the prior degree of coupling being reduction of camera and communication side.Communication side can be host computer, also can be any can the machine of analytical propagation agreement; The identification details of camera internal need not be known by communication side, only needs to read and understands the next data of camera transmission, wide accommodation, safe and reliable.
Claims (5)
1. an integral intelligent camera, it is characterized in that: comprise camera case (1) and be positioned at described camera case (1) and imageing sensor for gathering image, described imageing sensor is connected with logical sequence managing image pretreatment module (6), described logical sequence managing image pretreatment module (6) is connected with the high rate burst communication module (12) for carrying out image procossing, with can by pretreated image transmitting in high speed image processing module (12); Logical sequence managing image preliminary treatment (6) and high rate burst communication module (12) are all positioned at camera case (1).
2. integral intelligent camera according to claim 1, it is characterized in that: the front end of described camera case (1) is provided with camera lens shell (2), be provided with for the LED to IMAQ light filling and for driving the LED light source control module (3) of described LED in described camera lens shell (2), described LED light source control module (3) adopts PWM to control the operating state of LED.
3. integral intelligent camera according to claim 1, it is characterized in that: the C/CS camera lens (4) that described imageing sensor comprises CCD image-forming module (5) and mates with described CCD image-forming module (5), logical sequence managing image pretreatment module (6) adopts fpga chip.
4. integral intelligent camera according to claim 3, it is characterized in that: described logical sequence managing image pretreatment module (6) is also connected with digital input-output interface (8), comprises two-way digital input interface and two-way digital output interface in described digital input-output interface (8).
5. integral intelligent camera according to claim 1, it is characterized in that: described high rate burst communication module (12) comprises dsp processor (13), described dsp processor (13) adopts model to be the chip of TMS320DM6467, and described dsp processor (13) is connected with RS485 bus (10), UART interface and RS232 interface (9) respectively.
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| CN105472264A (en) * | 2015-11-25 | 2016-04-06 | 杭州意博高科电器有限公司 | LED light supplement control circuit used for roller-shutter-type shutter exposure camera |
| CN107896295A (en) * | 2017-11-13 | 2018-04-10 | 杭州德创电子有限公司 | A kind of smart camera and its application method using OCR embedded models |
| CN109922247A (en) * | 2019-04-17 | 2019-06-21 | 浙江禾川科技股份有限公司 | A kind of smart camera and a kind of image processing method |
| CN111601014A (en) * | 2019-02-20 | 2020-08-28 | 中科院微电子研究所昆山分所 | Image processing and transmitting method and system |
| CN111711744A (en) * | 2019-03-18 | 2020-09-25 | 北京沃东天骏信息技术有限公司 | Camera and image processing method |
| CN112788216A (en) * | 2020-12-31 | 2021-05-11 | 中冶赛迪重庆信息技术有限公司 | Device for image acquisition and recognition |
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| CN105472264A (en) * | 2015-11-25 | 2016-04-06 | 杭州意博高科电器有限公司 | LED light supplement control circuit used for roller-shutter-type shutter exposure camera |
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