CN104810337A - Flip-chip circuit device and method for manufacturing the same - Google Patents
Flip-chip circuit device and method for manufacturing the same Download PDFInfo
- Publication number
- CN104810337A CN104810337A CN201510028617.9A CN201510028617A CN104810337A CN 104810337 A CN104810337 A CN 104810337A CN 201510028617 A CN201510028617 A CN 201510028617A CN 104810337 A CN104810337 A CN 104810337A
- Authority
- CN
- China
- Prior art keywords
- face
- circuit carrier
- groove structure
- osculating element
- flip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/321—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/113—Manufacturing methods by local deposition of the material of the bump connector
- H01L2224/1133—Manufacturing methods by local deposition of the material of the bump connector in solid form
- H01L2224/1134—Stud bumping, i.e. using a wire-bonding apparatus
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16237—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bonding area disposed in a recess of the surface of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/17—Structure, shape, material or disposition of the bump connectors after the connecting process of a plurality of bump connectors
- H01L2224/1701—Structure
- H01L2224/1703—Bump connectors having different sizes, e.g. different diameters, heights or widths
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/17—Structure, shape, material or disposition of the bump connectors after the connecting process of a plurality of bump connectors
- H01L2224/171—Disposition
- H01L2224/17104—Disposition relative to the bonding areas, e.g. bond pads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8112—Aligning
- H01L2224/81136—Aligning involving guiding structures, e.g. spacers or supporting members
- H01L2224/81138—Aligning involving guiding structures, e.g. spacers or supporting members the guiding structures being at least partially left in the finished device
- H01L2224/8114—Guiding structures outside the body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8119—Arrangement of the bump connectors prior to mounting
- H01L2224/81191—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8138—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/81385—Shape, e.g. interlocking features
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8138—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/81399—Material
- H01L2224/814—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/81438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/81444—Gold [Au] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8138—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/81399—Material
- H01L2224/814—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/81438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/81447—Copper [Cu] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8138—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/81399—Material
- H01L2224/814—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/81438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/81455—Nickel [Ni] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/17—Structure, shape, material or disposition of the bump connectors after the connecting process of a plurality of bump connectors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09009—Substrate related
- H05K2201/09036—Recesses or grooves in insulating substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09372—Pads and lands
- H05K2201/09472—Recessed pad for surface mounting; Recessed electrode of component
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09745—Recess in conductor, e.g. in pad or in metallic substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10674—Flip chip
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10734—Ball grid array [BGA]; Bump grid array
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10954—Other details of electrical connections
- H05K2201/10977—Encapsulated connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
- H05K2203/0278—Flat pressure, e.g. for connecting terminals with anisotropic conductive adhesive
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Wire Bonding (AREA)
Abstract
The invention relates to a flip-chip circuit device (3) at least comprising a circuit carrier (1) with a first surface (6) and at least one groove structure (7) constructed in the first surface (6). The at least one groove structure comprises a lower cover surface (7.2), and connecting surfaces (8.1, 8.2, 8.3, 8.4) are constructed in the groove structure (7). The device further comprises a semiconductor member (2) assembled on the circuit carrier (1) and comprising at least one contact position (5). Contact units (9.1, 9.2, 9.3, 9.4) are attached to the connecting surfaces (8.1, 8.2, 8.3, 8.4) to facilitate forming electrical connections. According to the device, the connecting surfaces (8.1, 8.2, 8.3, 8.4) are at least partially constructed on a shell surface (7.1) of the groove structure (7). The shell surface (7.1) is constructed between the first surface (6) and the lower cover surface (7.2) of the groove structure (7).
Description
Technical field
The present invention relates to a kind of flip-chip circuit device and a kind of method for the manufacture of flip-chip circuit device.
Background technology
In flip-chip assemblies technology, such as individual pieces of semiconductor elements (chip, bare chip (Die)) is effectively connected side with it and directly assemble and be switched to circuit carrier on---such as substrate or circuit board---.The contact position of semiconductor element when this without connecting lead wire (wire bonding) with the connection face on circuit carrier---such as printed conductor is connected.Little area requirements can be realized thus.
For this reason, the contact position that the stud bump (Stud-Bump) be made of gold is applied to semiconductor component such as, be routed on the printed conductor of circuit carrier subsequently, wherein, described stud bump is equivalent to the ball bond that formed by ball Wedge Bond (Ball-Wedge-Bonden) method of routine.Then, semiconductor component is pressed against on circuit carrier, thus the structure electrical connection when printed conductor and stud bump are partly out of shape.In the Flipchip method by non-conductive adhesive (NCA, non-conductive adhesive), be placed between chip and circuit carrier before extrusion or afterwards by adhesive, then described adhesive hardens.
Especially on the uneven surface of circuit carrier---this surface transition is to surface of printed conductor---, when compressing stud bump, insecure electrical contact may occur, because based on unevenness, the different pressing force in local is had an effect.Thus, printed conductor due to the easily destroyed mechanical deformation in other words of its little height, and may be positioned at the circuit carrier also possibility plastic deformation below it.In addition, each region of protruding may cause damaging or mechanical fasteners; The reliability decrease of parts.
In addition, contiguous stud bump can have slightly different shapes or profile with determining by manufacture.Thus,---touch stud bump on face touch the connection face corresponding with them after pressing described---can change in its size to touch face.By manufacturing, stud bump also can determine that ground staggers relative to connection face corresponding respectively in a lateral direction, thus a part for stud bump is touching on circuit carrier on side, connection face after pressing, reduces the face of touching thus; Therefore, transition resistance or the contact resistance of contiguous osculating element are different, may damage the functional of parts thus.
In addition, groove is constructed in the known surface by being etched in circuit carrier in principle, to construct the connection face be in compared with depths.
Summary of the invention
Arranged according to the present invention, at least one groove structure is constructed with leaving in the first surface of circuit carrier or from described first surface, this groove structure has and is in capping compared with depths relative to first surface, wherein, be furnished with respectively between capping and first surface preferably towards capping gradually shrinking, especially tilt or become scalariform shell face.
At this, the shell face tilted is interpreted as such face, described face has slope or tangent line at least partly, described slope or tangent line have relative to first surface and are less than 90 ° (vertically) and the angle being greater than 0 ° (smooth and parallel relative to first surface), namely tilt or extend bendingly.In addition, the shell face of stairstepping or stair shape can also be constructed.Described shell face such as can macroscopically seem to tilt or bending, but on microcosmic, have multiple right angles step.
First surface especially can be the smooth upside of circuit carrier; But described first surface also can such as limit partially through coating or the material that applies, thus described groove structure is from applied material to downward-extension.
In order to construct one or more groove structure, the plastics of the material of circuit carrier, preferably ceramic, silicon or injection moulding are so removing or remodeling in fixing region in an advantageous manner, make to occur in circuit carrier to have respectively around shell face or sidewall such as radial symmetric, especially pyramid (end) shape or cone (end) shape or funnel shaped space, described space from first surface gradually shrinking, namely converge towards the direction of capping, described capping such as may be embodied as tip when pyramid or taper.Groove structure can such as to extend in circuit carrier be about 30 μm away from first surface depending on application, wherein, described shell face relative to first surface precedent as about 45 ° of bendings.Therefore, in section, construct the structure of such as V-arrangement or U-shaped.
In category of the present invention, flip-chip circuit device is interpreted as the device constructed in flip-chip assemblies process, that is, one or more extruding that be arranged in the osculating element (such as stud bump) on the second surface of semiconductor component and correspond to described osculating element, that apply to pass through towards being positioned at the direction of extrusion being preferably perpendicular to described surface in connection face on the groove structure (such as printed conductor or contact disc) is respectively electrically connected to each other.At this, each is connected face and preferably distinguishes so applying, such as vapour plating and plating on the shell face of groove structure, namely in the region especially between capping and first surface, it is made substantially to have the shape of the shrinking gradually of groove structure, namely similarly have the shell face of bending, the shell face of described bending is converged on tip or on capping; Therefore, the form of conduction funnel is formed.Below such face is referred to as the face of touching, on described, osculating element touches connection face corresponding respectively after pressing.
Before extrusion, period or make bonding agent arrive on circuit carrier and semiconductor component afterwards or between, described semiconductor component is preferably in the after-hardening of such as being set up electrical connection by heating, thus the parts of two electrical connections also can mechanically cement as far as possible enduringly.At this, bonding agent is preferably non-conductive adhesive, and described non-conductive adhesive is extruded by from the region touching face when extruding, thus guarantees good electrical connection.
Some advantages are realized according to the present invention:
The tolerance of the osculating element being such as preferably embodied as stud bump can be compensated by groove structure.Especially in it manufactures, there is tolerance, such as, in described manufacture, as a part for ball Wedge Bond method, have and be applied on the contact position of semiconductor component by the gold goal (Ball) of the gold wire (Tail) cut off.At this, the stud bump manufactured successively can have slightly different profile and height, because such as can wider, narrower or differently be implemented bendingly by the lead-in wire cut off.
By groove structure according to the present invention, these difference can be compensated at least in part because point or the osculating element that bends a little in extrusion process, first on the shell face that side abuts in the bending in connection face, form electrical contact depending on the extruding degree of depth when small distortion.At this, face of touching mainly increases according to the shape in shell face and size and the extruding degree of depth, thus also can there is little transition resistance with little extruding force or pressing force touch face.
Pressing force when extruding the degree of depth and being identical for for the connection face bent relative to the direction of extrusion than less in vertical, smooth connection face situation therewith.Therefore, on the other hand, the not only material in the material of osculating element but also circuit carrier and connection face pressurized more consumingly, because when osculating element recline groove structure bottom, namely most advanced and sophisticated or capping time, namely, when forming electrical contact, be just applied on connection face and osculating element with power comparable when the smooth enforcement in the face of connection, face of touching when the enforcement of described plane increases according to the pressing force of having an effect substantially.
Due to the shape of groove structure, the surface in connection face applied thereon is larger compared with smooth structure.In addition, connection face reclines from multiple side corresponding osculating element, thus can form on the whole and larger touch face; Therefore, when pressing force is less, also less contact resistance can be realized.
In addition, the lateral shift that such as by manufacture determined of osculating element relative to the face of connection can be compensated.Because, by connecting the shape of the bending in face, horizontal direction (x-y direction) leads or guiding along its shell face relative to the osculating element of the neutral point deviation in the face of connection, thus described osculating element is pressed towards the direction of mid point when distortion a little.Therefore, " force " osculating element of described lateral shift to move to tip or capping to a certain extent.Therefore, it is possible to realize the effect of centering in an advantageous manner, thus due to skew, if there is skew, then only fraction arrives by connection face.
In addition, can simply and reliably compensate in an advantageous manner not only osculating element but also circuit carrier small difference in height.Described difference in height can especially in the mill with the additional surface treatment of circuit carrier in and when ball bond osculating element manufacture in occur.Compensation is possible, because the connection face owing to bending, starts only little power be applied on osculating element and connection face in extrusion process.
Therefore, such as from the nearer osculating element in the connection face corresponding to it in extrusion process than from must away from osculating element earlier form electrical contact, but, described in apparent from must away from osculating element touch the moment in its corresponding connection face time difference in height and surely, still so little power is applied to from the osculating element obtained more, makes not damage described osculating element and circuit carrier.
Because, when from more close to osculating element such as about 30 μm after arrival connection face most advanced and sophisticated time, pressing force just increases.In order to make not only from more close to osculating element and also the osculating element of far apart can also be formed into the reliable contact in the connection face corresponding to it when the conclusive damage of not generation part, can the maximum height deviation of about three/mono-to half of height of compensation groove structure, wherein, this also depends on the exact outline of osculating element.
In addition, can realize in an advantageous manner, reduce the distance between the first surface of circuit carrier and the second surface of semiconductor component, because osculating element " sinks to " in circuit carrier with the height of groove structure to a certain extent.Thus, less bonding agent is needed for mechanical cohesive bond, improve the reliability of electrical connection thus.Because, moisture effect and temperature effect due to the amount of bonding agent less and cause less expansion.
In order to support the coupling of osculating element, can when extruding the surrounding environment of also contacts unit, thus the osculating element preferably implemented by gold becomes softer and is therefore more easily matched with connection face.
In order to construct groove structure, can by the injection moulding tool injection moulding circuit carrier correspondingly constructed.But also can consider, afterwards groove structure was incorporated in the first surface of circuit carrier, such as retrofit by the method for surface erosion, especially laser ablation or by the mode with embossing male die, described embossing male die is through heatedly or without on the first surface being forced into circuit carrier heatedly on a corresponding position and in this shaping corresponding space in first surface.
Accompanying drawing explanation
Accompanying drawing illustrates:
Fig. 1 illustrates semiconductor component for constructing circuit arrangement and uneven circuit carrier;
Fig. 2 illustrate according to Fig. 1, the circuit carrier with groove structure,
Fig. 3 illustrates flip-chip circuit device before turn;
Fig. 4 illustrate according to the embodiment of the present invention, through connect flip-chip circuit device;
Fig. 4 a illustrates and touches face according to the flip-chip circuit device of Fig. 4; And
Fig. 5 illustrates the flow chart of method according to the embodiment of the present invention.
Embodiment
In order to be configured in the flip-chip circuit device 3 shown in Fig. 4, semiconductor component 2 chip or the bare chip in other words of first provide circuit carrier 1 according to Fig. 1---printed circuit board (PCB) be such as made up of plastics, silicon or pottery---and such as monolithic, this is equivalent to the step St0 of the method for Fig. 5.
Circuit carrier 1 has uneven first surface 6, and namely the second area 1.2 of first area 1.1 than circuit carrier 1 on z direction or assembly direction or direction of extrusion F of circuit carrier 1 is lower slightly, such as low 10 μm.Such as unevenness may be there is in the mill and/or in the surface treatment (laser treatment) of the first surface 6 of circuit carrier 1.Semiconductor component 2 has second surface 4, described second surface is furnished with mutually isolated contact position 5 on multiple position, and described contact position such as can be connected with integrated switching circuit (IC) and for outside connection within semiconductor component 2.
In the accompanying drawings, substantially select the view with the surface 4,6 extended in the x and y direction, wherein, y direction is directed perpendicular to figure plane ground.
In order to connecting circuit carrier 1 and semiconductor component 2, first arrange in step St1, so that groove structure 7 to be incorporated in circuit carrier 1 by upper/lower positions: the electrical connection between two parts 1,2 will be set up after a while on described position.For this reason, according to this execution mode, from the material removing of circuit carrier 1, preferably there is the taper bending or become step-like shell face 7.1 equably or pyramidal structure, described shell faces and is embodied as most advanced and sophisticated capping 7.2 shrinking gradually, thus in cross section view, there is the space of roughly V-arrangement, as especially in fig. 2.
The manufacture of groove structure 7 such as can pass through material corrosion, especially laser ablation, or is retrofited by embossing male die and carry out.But also can consider that there is by means of the injection moulding tool manufacture correspondingly implemented the circuit carrier 1 of groove structure 7.At this, groove structure 7 has the height 7.3 being greater than 30 μm in a z-direction in two regions 1.1,1.2, wherein, also can differently select described height depending on application, equally as the bending in shell face 7.1, described shell face bends about 45 ° relative to first surface 6 in this embodiment.
Then, in step St2, apply connection face 8.i, i=1,2,3,4 especially respectively, such as printed conductor and/or contact disc are on shell face 7.1.For this reason, according to Fig. 4, by conductive layer---such as by copper, nickel/phosphorus and the electroplated structural vapour plating that forms of gold to if desired afterwards on surface-treated shell face 7.1, such as to obtain flawless as far as possible connection face 8.i in electroplating process subsequently.Preferably apply connection face 8.i equably on shell face 7.1, thus described connection face has taper pyramidal structure in other words equally, and therefore form from first surface 6s, the form of conduction funnel, described funnel converges in the region of most advanced and sophisticated 7.2.On first surface 6, connection face 8.1 is connected with printed conductor that is unshowned, that extend in x-y direction, and described printed conductor can be configured for the line map connecting other component.
In order to connection then, in step St2.1, apply osculating element 9.i, i=1,2,3,4, so-called stud bump is on the contact position 5 of semiconductor component 2, and wherein, each osculating element 9.i corresponds to a connection face 8.i on circuit carrier 1.In bonding method, described osculating element is applied on contact position 5, and described bonding method is such as a part for conventional ball Wedge Bond.Therefore, stud bump 9.i is configured to the gold bullion (Ball) of the subglobular with the gold wire (Tail) cut off downwards, described stud bump can have slightly different profile 10.i with determining by manufacture according to Fig. 4, i=1,2,3,4 and height 11.i, i=1,2,3,4.
The applying of osculating element 9.i and the structure of groove structure 7 have nothing to do, and therefore can perform before step St1 or St2.
Then, semiconductor component 2 is like this relative to circuit carrier 1 directed, and osculating element 9.i is positioned on the connection face 8.i corresponding with them.At this, osculating element 9.i can relative to the tip 7.2 of mid point that is corresponding with them, that roughly limit connection face 8.i respectively on the direction of transverse direction, namely offset in x-y direction, and osculating element 9.i also can change to the distance A.i of corresponding connection face 8.i, i=1,2,3,4.Its reason is the profile 10.i differently constructed of osculating element 9.i on the one hand, but is also the unevenness of the first surface 6 of circuit carrier 1.
In step St3 subsequently, semiconductor component 2 is pressed onto on circuit carrier 1 towards direction of extrusion F, thus osculating element 9.i to be forced on the 8.i of connection face when being out of shape and therefore to construct electrical connection.Due to groove structure 7 or connect the pyramid of face 8.i or the structure of taper, at this, guide along shell face 7.1 towards the direction of most advanced and sophisticated 7.2 or guiding osculating element 9.i, as in the diagram indicate.
At this, according to Fig. 4 a, between osculating element 9.i and connection face 8.i, form different face of touching 12.i, i=1,2,3,4.At this, can see, the size of touching face 12.1 and 12.2 is not different from the size in the face of touching 12.3 and 12.4 very significantly, although profile 10.i or height 11.i and distance A.i is partly significantly different.
In addition, in this embodiment, the second stud bump 9.2 is moved slightly towards right avertence relative to the connection face corresponding with it 8.2 in the x direction due to its profile 10.2, is therefore being forced on first surface 6 in connection face 8.2 " side " with a part when extruding.But, this effect due to bending shell face 7.1 minimize in maximum degree, because other parts of the second stud bump 9.2 are directed to most advanced and sophisticated 7.2 along shell face 7.1, thus the second stud bump 9.2 is in the diagram to Zola, and the face of touching 12.2 of the contact site overlapped each other is increased again slightly when extruding.In addition, the tip " bending " of stud bump 9.2, and the shell face 7.1 that therefore reclines over a larger area; Touch face 12.2 and generally speaking become larger.In addition, shell face 7.1 make the surface of connection face 8.i with have smooth, without the connection face 8.i of groove structure 7 enforcement compared with effectively increase, thus outstanding in side of osculating element 9.i can be compensated at least in part by connection face 8.i.
After pressing, in order to construct flip-chip circuit device 3, in step St4, loaded by bonding agent 14 in the gap 13 between surface 4 and 6, described bonding agent is preferably filled gap 13 completely and be responsible for mechanical cohesive bond after bonding agent 14 is hardened.Bonding agent 14 is preferably non-conductive adhesive 14 (NCA, non conductive adhesive), thus does not produce short circuit between osculating element 9.i.In order to harden, make bonding agent 14 reach about 250 °, osculating element 9.i and connection face 8.i slightly heats and becomes softer thus.Its surface be extruded can be made thus additionally mutually to mate, thus improve electrical contact.
But also can consider, such as so apply bonding agent 14 before extrusion on circuit carrier 1, made bonding agent 14 be pressed against side when extruding from the region of face of the touching 12.i of osculating element 9.i and connection face 8.i and can electrical connection be constructed thus.For this reason, so apply a large amount of bonding agents 14, make described bonding agent preferably fill gap 13 completely after pressing.
Because osculating element 9.i extend at least in part after pressing or submerges in groove structure 7, so gap 13 is implemented on narrow height 7.3 ground substantially relative to the flip-chip circuit device 3 without groove structure 7.The amount of bonding agent 14 can be reduced thus, because the volume between circuit carrier 1 and semiconductor component 2 reduces.In addition can make to minimize, because described bulking effect has not stronger impact when bonding agent 14 is less because the liquid absorption of bonding agent 14 or temperature improve the bulking effect caused.
Claims (16)
1. a flip-chip circuit device (3), it at least has:
There is first surface (6) and be configured in the circuit carrier (1) of at least one groove structure (7) in described first surface (6), at least one groove structure described has lower capping (7.2), wherein, connection face (8.1 is configured with in described groove structure (7), 8.2,8.3,8.4)
Be assemblied on described circuit carrier (1), to have at least one contact position (5) semiconductor component (2), osculating element (9.1,9.2,9.3,9.4) is applied at least one contact position described,
Wherein, described osculating element (9.1,9.2,9.3,9.4) reclines described connection face (8.1,8.2,8.3,8.4) so that structure electrical connection,
It is characterized in that,
Described connection face (8.1,8.2,8.3,8.4) be configured on the shell face (7.1) of described groove structure (7) at least in part, wherein, described shell face (7.1) is configured between the lower capping (7.2) of described first surface (6) and described groove structure (7).
2. flip-chip circuit device (3) according to claim 1, is characterized in that, described shell face (7.1) is directly from described first surface (6)s.
3. flip-chip circuit device (3) according to claim 2, is characterized in that, (6)s are towards described capping (7.2) shrinking gradually from described first surface for described shell face (7.1).
4. flip-chip circuit device (3) according to claim 3, it is characterized in that, described shell face (7.1) is tilted relative to described first surface (6) or is become stairstepping to form pyramid, infundibulate or scalariform groove structure (7).
5. the flip-chip circuit device (3) according to any one of the preceding claims, it is characterized in that, bonding agent (14) is provided with, to form mechanical connection between described circuit carrier (1) and described semiconductor component (2) between the described first surface (6) and the second surface (4) of described semiconductor component (2) of described circuit carrier (1).
6. the flip-chip circuit device (3) according to any one of the preceding claims, it is characterized in that, described osculating element (9.1,9.2,9.3,9.4) in described connection face (8.1,8.2,8.3,8.4) to be arranged at least in part in region under described first surface (6) and to extend into described circuit carrier (1).
7. the flip-chip circuit device (3) according to any one of the preceding claims, is characterized in that, described first surface (6) preferably dimensionally extends in the circuit carrier of injection moulding (1).
8., for the manufacture of a method for flip-chip circuit device (3), it has at least following step:
Manufacture or the circuit carrier (1) with first surface (6) and semiconductor component (2) (St0) with structure at least one contact position (5) be thereon provided,
Construct at least one from described first surface (6)s extend in described circuit carrier (1), there is groove structure (7) (St1) relative to described first surface (6) the shell face (7.1) of shrinking gradually
The connection face of applying (8.1,8.2,8.3,8.4) is upper (St2) at least one shell face (7.1) described,
Apply the osculating element (9.1,9.2,9.3,9.4) corresponding with described connection face (8.1,8.2,8.3,8.4) to described contact position (6) upper (St2.1),
Extrude described semiconductor component (2) and described circuit carrier (1), so that in described connection face (8.1,8.2,8.3,8.4) and described osculating element (9.1,9.2,9.3,9.4) structure electrical connection (St3) between
Apply binding agent (14) and make it sclerosis, to set up mechanical connection (St4) between described semiconductor component (2) and described circuit carrier (1).
9. method according to claim 8, is characterized in that, applies described osculating element (9.1,9.2,9.3,9.4) to form stud bump by ball bond.
10. method according to claim 8 or claim 9, is characterized in that, constructs described groove structure (7), such as, by means of corresponding injection moulding tool when manufacturing described circuit carrier (1).
11. methods according to claim 8 or claim 9, is characterized in that, pass through material corrosion---such as by groove structure (7) described in laser ablation.
12. methods according to claim 8 or claim 9, is characterized in that, by remodeling, such as manufacture described groove structure (7) by means of embossing male die.
Method according to any one of 13. according to Claim 8 to 12, it is characterized in that, radially symmetrically---such as pyramid ground, infundibulate ground or the stepped ground described groove structure of structure (7), and described shell face (7.1) is towards capping (7.2) shrinking gradually.
Method according to any one of 14. according to Claim 8 to 13, it is characterized in that, make described osculating element (9.1,9.2,9.3,9.4) before extrusion in the connection face (8.1,8.2,8.3 corresponding with it, 8.4) upper aligning, thus described osculating element (9.1,9.2,9.3,9.4) after described extruding in described connection face (8.1,8.2,8.3,8.4) be arranged in described first surface (6) below in region at least in part and therefore extend into described circuit carrier (1).
Method according to any one of 15. according to Claim 8 to 14, it is characterized in that, described bonding agent (14) had been applied on described circuit carrier (1) and/or described semiconductor component (2) before described extruding, wherein, described bonding agent (14) covers described connection face (8.1 completely, 8.2, 8.3, 8.4) and/or described osculating element (9.1, 9.2, 9.3, 9.4), the second surface (4) of described first surface (6) and described semiconductor component (2) and described bonding agent (14) reclines at least in part after described extruding.
Method according to any one of 16. according to Claim 8 to 15, it is characterized in that, described bonding agent (14) is non-conductive adhesive (14), and the so described semiconductor component of extruding (2) and described circuit carrier (1), make described bonding agent (14) at least in part from described osculating element (9.1, 9.2, 9.3, 9.4) and described connection face (8.1, 8.2, 8.3, 8.4) gap between is extruded, thus at described osculating element (9.1, 9.2, 9.3, 9.4) and described connection face (8.1, 8.2, 8.3, 8.4) structure electrical connection between.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102014201164.7 | 2014-01-23 | ||
DE102014201164.7A DE102014201164A1 (en) | 2014-01-23 | 2014-01-23 | Flip-chip circuit arrangement and method for producing a flip-chip circuit arrangement |
Publications (1)
Publication Number | Publication Date |
---|---|
CN104810337A true CN104810337A (en) | 2015-07-29 |
Family
ID=53497876
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201510028617.9A Pending CN104810337A (en) | 2014-01-23 | 2015-01-20 | Flip-chip circuit device and method for manufacturing the same |
Country Status (2)
Country | Link |
---|---|
CN (1) | CN104810337A (en) |
DE (1) | DE102014201164A1 (en) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000208675A (en) * | 1999-01-11 | 2000-07-28 | Matsushita Electronics Industry Corp | Semiconductor device and its manufacture |
KR20040090660A (en) * | 2003-04-18 | 2004-10-26 | 한국전자통신연구원 | Method of flip chip bonding utilizing slanted groove for optical passive alignment and optical module |
CN101156164A (en) * | 2005-09-26 | 2008-04-02 | 松下电器产业株式会社 | Noncontact information storage medium and method for manufacturing same |
-
2014
- 2014-01-23 DE DE102014201164.7A patent/DE102014201164A1/en not_active Withdrawn
-
2015
- 2015-01-20 CN CN201510028617.9A patent/CN104810337A/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000208675A (en) * | 1999-01-11 | 2000-07-28 | Matsushita Electronics Industry Corp | Semiconductor device and its manufacture |
KR20040090660A (en) * | 2003-04-18 | 2004-10-26 | 한국전자통신연구원 | Method of flip chip bonding utilizing slanted groove for optical passive alignment and optical module |
CN101156164A (en) * | 2005-09-26 | 2008-04-02 | 松下电器产业株式会社 | Noncontact information storage medium and method for manufacturing same |
Also Published As
Publication number | Publication date |
---|---|
DE102014201164A1 (en) | 2015-07-23 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US9966327B2 (en) | Lead frame, semiconductor device, method for manufacturing lead frame, and method for manufacturing semiconductor device | |
CN102347295B (en) | Power semiconductor module and method for producing same | |
CN106797427B (en) | Imager module for a vehicle camera and method for the production thereof | |
CN206401299U (en) | Electronic device | |
JP5098440B2 (en) | Method for manufacturing power semiconductor device | |
CN105489586A (en) | Semiconductor device and method for manufacturing the same | |
KR20140078541A (en) | Package structure and package method | |
CN104350594A (en) | Semiconductor module and semiconductor module manufacturing method | |
US20200335474A1 (en) | Chip Packaging Structure and Related Inner Lead Bonding Method | |
CN102403276A (en) | Method for producing chip elements equipped with wire insertion grooves | |
US10750614B2 (en) | Deformable electrical contacts with conformable target pads | |
KR101396466B1 (en) | Connector and production method therefor | |
US10734345B2 (en) | Packaging through pre-formed metal pins | |
CN104979314A (en) | Semiconductor packaging structure and semiconductor technologies | |
US20160379953A1 (en) | Semiconductor wire bonding and method | |
CN104810337A (en) | Flip-chip circuit device and method for manufacturing the same | |
CN103782181A (en) | Method for a temporary electrical contact of a component arrangement and device therefor | |
JP2012248907A (en) | Power semiconductor device | |
CN104517866A (en) | Method for producing a power semiconductor device with a soldered joint | |
CN104810297A (en) | Method for manufacturing a flip chip circuit device and the flip chip circuit device | |
NL2020940B1 (en) | Electronic module, lead frame and manufacturing method for electronic module | |
US9947633B2 (en) | Deformable conductive contacts | |
CN104465589A (en) | Semiconductor Device And Method Of Manufacturing Same | |
CN101399243B (en) | Semiconductor package and method for manufacturing the same | |
CN102157822B (en) | Electrical connecting component comprosing a hotmelt element, method and tool for manufacturing such an electrical component |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20150729 |
|
WD01 | Invention patent application deemed withdrawn after publication |