CN104809996B - Many kinds of method and apparatus of the data-signal of LANE numbers of MIPI are realized based on FPGA - Google Patents

Many kinds of method and apparatus of the data-signal of LANE numbers of MIPI are realized based on FPGA Download PDF

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CN104809996B
CN104809996B CN201510221619.XA CN201510221619A CN104809996B CN 104809996 B CN104809996 B CN 104809996B CN 201510221619 A CN201510221619 A CN 201510221619A CN 104809996 B CN104809996 B CN 104809996B
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mipi
data
module
lane
modules
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CN104809996A (en
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彭骞
朱亚凡
欧昌东
许恩
郑增强
邓标华
沈亚非
陈凯
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Wuhan Jingce Electronic Group Co Ltd
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Wuhan Jingce Electronic Technology Co Ltd
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Abstract

Many kinds of method and apparatus of the data-signal of LANE numbers of MIPI are realized based on FPGA the invention discloses a kind of, its method includes 1) receiving MIPI configuration informations from upper strata, configuration operation is carried out, MIPI configuration informations include MIPI module LANE numbers, module split screen mode, RGB bit wides, MIPI transmission control parameters and MIPI output electrical configurations；2) rgb video signal of input is converted into four road split screen video datas；3) four road split screen video datas are converted into four tunnel byte datas；4) four tunnel byte datas are packaged, forms four road MIPI group bag datas；5) four road MIPI group bag datas are assigned to each data LANE, form MIPI signals；6) the MIPI signals to each data LANE carry out MIPI transmission operations；7) the MIPI signals of each data LANE export electrically with transmission characteristic adjustment, then the MIPI signals of each data LANE are sent to module.The present invention realizes 1 to 4 by fpga chip, 8, the output of the MIPI signals of 16LANE to light module, its simple to operate, reliability is high, cost is relatively low.

Description

Many kinds of method and apparatus of the data-signal of LANE numbers of MIPI are realized based on FPGA
Technical field
Display and testing field the present invention relates to MIPI liquid crystal modules, realize that MIPI is more in particular to one kind based on FPGA The method and apparatus for planting the data-signal of LANE numbers.
Background technology
MIPI display modules (hereinafter referred to as module) are be widely used in various portable display devices and mobile phone Kind of display device, this kind of module and its MIPI vision signals used have that low in energy consumption, reliability is high, transfer rate is high, adapt to The characteristics of different size resolution ratio.
When the video image of medium and small resolution ratio is shown, vision signal can be assigned to 1 to 4 MIPI data wires of LANE On give module, video resolution is higher, and data volume is bigger, and the MIPI data wire LANE numbers that its vision signal is assigned to also are got over It is many.When the video image of ultra high-definition resolution ratio is shown, the video data volume is huge, it is necessary to more LANE numbers are transmitted and higher Transfer rate, but because MIPI agreements are to LANE numbers limitation (1 to 4 LANE numbers) and each LANE of single standardization module The limitation of transfer rate, therefore occur in that 8LANE or 16LANE MIPI modules and transmission means.
Transmission means general principle to the MIPI modules of 8LANE or 16LANE is exactly to say to be shown video image by certain The mode of kind carries out split screen treatment (such as half split screen of left and right, odd even pixel split screen), so that complete video image is divided into two Or four split screen video datas, accordingly, the MIPI modules of 8LANE or 16LANE are also divided into two or four submodule group, are Ensure the transmission of video rate of maximum, each submodule group itself is then for the standard module of 4LANE, therefore split screen video data are corresponded to Be transferred in each submodule group, be combined to for they again show normal pictures by MIPI modules afterwards.
But still use standard module in production, debugging, the detection process of such MIPI modules product at present MIPI image generation devices, that is, need plurality of devices and completely shown while producing the view data of different split screens to send into module. So not only troublesome poeration, each split screen image synchronization are difficult, be easy to error, Detection results are undesirable and productivity ratio is relatively low.
The content of the invention
In view of the shortcomings of the prior art, export various by a piece of fpga chip it is an object of the invention to provide one kind The signal of MIPI data LANE numbers, is capable of achieving 1 and realizes MIPI based on FPGA to the MIPI signals of 4LANE, 8LANE, 16LANE The method and apparatus of the data-signal of various LANE numbers.
To achieve the above object, a kind of many kinds of data-signals of LANE numbers of MIPI are realized based on FPGA designed by the present invention Method, it is characterized in that, comprises the following steps：
1) MIPI configuration informations are received from upper strata, carries out configuration operation, the MIPI configuration informations include MIPI modules LANE numbers, module split screen mode, RGB bit wides, MIPI transmission control parameters and MIPI output electrical configurations；
2) rgb video that the MIPI module LANE numbers and module split screen mode in the MIPI configuration informations will be input into Signal is converted to four road split screen video datas；
3) four road split screen video datas are converted to four road byte numbers by the RGB bit wides in the MIPI configuration informations According to；
4) four tunnel byte data is packaged, forms four road MIPI group bag datas；
5) the MIPI module LANE numbers in the MIPI configuration informations, the four roads MIPI group bag datas are assigned to On each data LANE, MIPI signals are formed；
6) the MIPI transmission control parameters in the MIPI configuration informations are to the MIPI on each data LANE Signal carries out MIPI transmission operations；
7) MIPI in the MIPI configuration informations exports electrical configurations to the MIPI on each data LANE Signal export and electrically adjusted with transmission characteristic, then sends to MIPI moulds the MIPI signals on each data LANE Group display.
Preferably, the step 2) also include the step of caching the four roads split screen video data afterwards, after ensuring Continuous module can be operated synchronously.
Preferably, the step 2) in when the MIPI modules LANE numbers be 1~4LANE when, will be input into rgb video letter Number be converted to the full split screen video data output in four roads；When the MIPI modules LANE numbers are 8LANE, the rgb video that will be input into Signal is converted to four road 2 panes video data outputs；When MIPI module LANE numbers are 16LANE, the rgb video letter that will be input into Number be converted to the split screen video data output of four tunnel four.The present invention can realize including the MIPI modules that LANE numbers are 1,2,3,4,8,16 Data-signal.
Preferably, the step 3) also include the step of operation is synchronized to four tunnel byte data afterwards, it is to avoid The data that addition bag relevant parameter produced by preamble operation causes are asynchronous.
Preferably, the step 6) in MIPI transmission operations when including MIPI in the MIPI transmission control parameters MIPI signals on HS-LP sequential exports control each data LANE of clock are respectively with HS states and LP State- outputs.Root According to the regulation of MIPI DSI agreements, MIPI signals include two kinds of transmission modes of HS states and LP states.
Preferably, the MIPI signals are exported in HS states with LVDS signals electrical standard, are believed with LVCOMS in LP states The output of number electrical standard.The present invention is realized based on FPGA, therefore the HS status signals of clock, data are electrically marked using LVDS signals It is accurate and LP status signals use LVCMOS signal electrical standards, so as to produce HS states, the LP states for meeting MIPI protocol specifications Transmission signal.
Preferably, MIPI output electrical configurations include level range, drive intensity, termination matching, output impedance and Transmission high-frequency emphasis, to ensure that module can be while receive the MIPI signals of the phase homogenous quantities of each LANE, so as to ensure a screen Effect.
It is a kind of to realize above-mentioned realizing many kinds of devices of the method for the data-signal of LANE numbers of MIPI, including MIPI based on FPGA Control module, RGB data split screen module, RGB turn MIPI modules, MIPI group bags module, MIPI data LANE distribute modules, transmission Synchronization control module and MIPI signal synchronous output modules；
The MIPI control modules turn MIPI modules, MIPI group bags module, MIPI with RGB data split screen module, RGB respectively Data LANE distribute modules, transmission synchronization control module and the connection of MIPI signals synchronous output module, the RGB data split screen mould Block turns MIPI modules and is connected with MIPI group bag modules by RGB, the MIPI groups bag module and MIPI data LANE distribute modules Connection, the MIPI data LANE distribute modules are connected by transmitting synchronization control module and MIPI signals synchronous output module, The MIPI signals synchronous output module is connected with MIPI modules；
The MIPI control modules are used for MIPI configuration informations, carry out configuration operation；
The rgb video signal that the RGB data split screen module is used to just be input into is converted to four road split screen video datas；
The RGB turns MIPI modules for four road split screen video datas to be converted into four tunnel byte datas；
The MIPI groups bag module is used to package four tunnel byte data, forms four road MIPI group bag datas；
Be assigned to the four roads MIPI group bag datas on each data LANE by the MIPI data LANE distribute modules, shape Into MIPI signals；
The transmission synchronization control module is used to carry out the MIPI signals on each data LANE MIPI transmission behaviour Make；
The MIPI signals synchronous output module is used to carry out the MIPI signals on each data LANE output electricity Gas and transmission characteristic are adjusted, and the MIPI signals on each data LANE are sent to MIPI modules.
Further, it is also synchronous including turning the RGB data of MIPI modules connection with RGB data split screen module and RGB respectively Module, the RGB data synchronization module is used for four roads split screen video data caching.
Further, also MIPI numbers including being connected with MIPI group bag modules and MIPI data LANE distribute modules respectively According to synchronization module, the MIPI data simultaneous modules are used to synchronize operation to four tunnel byte data.
The beneficial effects of the present invention are：
(1) present invention can realize exporting the MIPI signals of different LANE numbers by the operative configuration of upper layer software (applications), make Different MIPI modules can be applied directly in, without other signal conversion equipments.
(2) present invention not only supports 1 arrive the standard module of 4LANE, also support 8LANE, 16LANE ultra high-definition MIPI modules, The rgb signal of complete picture to display all the way can be only input into, by upper-layer configured convert thereof into needed for 8LANE, 16LANE split screen data MIPI signals send out display.
(3) present invention by internal synchronization control so that it is guaranteed that output 8LANE, 16LANE split screen data-signal when each MIPI signals on LANE can simultaneously reach MIPI modules ensures that MIPI modules correctly show.
(4), by realizing the function with fpga chip, not only working stability, reliability are high, realization is easy for the present invention, It is easy to operate and cost is relatively low.
Brief description of the drawings
Fig. 1 is that the present invention realizes many kinds of block diagrams of the device of the data-signal of LANE numbers of MIPI based on FPGA.
Fig. 2 is that the present invention realizes many kinds of flow charts of the method for the data-signal of LANE numbers of MIPI based on FPGA.
Fig. 3 is the method for salary distribution schematic diagram according to MIPI DSI protocol specifies datas LANE.
In figure：MIPI control modules 1, RGB data split screen module 2, RGB data synchronization module 3, RGB turns MIPI modules 4, MIPI group bags module 5, MIPI data simultaneous modules 6, MIPI data LANE distribute modules 7 transmit synchronization control module 8, MIPI Signal synchronous output module 9, MIPI modules 10.
Specific embodiment
Below in conjunction with the drawings and specific embodiments, the present invention is described in further detail.
A kind of many kinds of dresses of the data-signal of LANE numbers of MIPI are realized based on FPGA as shown in figure 1, provided by the present invention Put, including MIPI control modules 1, RGB data split screen module 2, RGB data synchronization module 3, RGB turn MIPI modules 4, MIPI groups Bag module 5, MIPI data simultaneous modules 6, MIPI data LANE distribute modules 7, transmission synchronization control module 8 and MIPI signals are same Step output module 9.
MIPI control modules 1 turn MIPI modules 4, MIPI group bag modules 5, MIPI with RGB data split screen module 2, RGB respectively Data LANE distribute modules 7, transmission synchronization control module 8 and MIPI signals synchronous output module 9 are connected, RGB data split screen mould Block 2 turns MIPI modules 4 and is connected by RGB data synchronization module 3 with RGB, RGB turn MIPI modules 4 by MIPI group bags module 5 with MIPI data simultaneous modules 6 are connected, and MIPI data simultaneous modules 6 are connected with MIPI data LANE distribute modules 7, MIPI data LANE distribute modules 7 are connected by transmitting synchronization control module 8 and MIPI signals synchronous output module 9, and MIPI signals are synchronously defeated Go out module 9 to be connected with MIPI modules 10.
MIPI control modules 1 are used for MIPI configuration informations, carry out configuration operation.
The rgb video signal that RGB data split screen module 2 is used to just be input into is converted to four road split screen video datas.
RGB data synchronization module 3 is used for four road split screen video data cachings.
RGB turns MIPI modules 4 for four road split screen video datas to be converted into four tunnel byte datas.
MIPI group bags module 5 is used to package four tunnel byte datas, forms four road MIPI group bag datas.
MIPI data simultaneous modules 6 are used to synchronize operation to four tunnel byte datas.
Be assigned to four road MIPI group bag datas on each data LANE by MIPI data LANE distribute modules 7, forms MIPI Signal.
Transmission synchronization control module 8 is used to carry out the MIPI signals on each data LANE MIPI transmission operations.
MIPI signals synchronous output module 9 is used to that the MIPI signals on each data LANE export electrically and transmitted Characteristic is adjusted, and the MIPI signals on each data LANE are sent to MIPI modules 10.
As shown in Fig. 2 being realized realizing many kinds of methods of the data-signal of LANE numbers of MIPI based on FPGA according to said apparatus Specific steps include：
1) MIPI control modules 1 receive MIPI configuration informations from the upper strata MIPI control signals on upper strata, and MIPI is matched somebody with somebody into confidence Breath feeding RGB data split screen module 2, RGB turns MIPI modules 4, MIPI group bags module 5, MIPI data LANE distribute modules 7, biography Defeated synchronization control module 8 and MIPI signals synchronous output module 9 carry out configuration operation.MIPI configuration informations include MIPI modules LANE numbers (LANE numbers can be 1,2,3,4,8,16), module split screen mode (such as half screen, odd even pixel split screen are divided in left and right), RGB bit wides (such as 6,8,10,12,16bit), MIPI transmission control parameters and MIPI output electrical configurations.
2) after configuration operation, MIPI control modules 1 start RGB data split screen module 2, the basis of RGB data split screen module 2 The rgb video signal of input is converted to four by the split screen mode of MIPI module LANE numbers and MIPI modules in MIPI configuration informations Road split screen video data.
When the MIPI modules LANE numbers are 1~4LANE, the rgb video signal that RGB data split screen module 2 will be input into The full split screen video data output in four roads is converted to, will incoming video signal not split screen treatment directly four circuit-switched datas of duplication output； When the MIPI modules LANE numbers are 8LANE, the rgb video signal of input is converted to four tunnels two by RGB data split screen module 2 Split screen video data is exported, that is, carry out 2 panes treatment, then replicates the output of two passages, and such as #1, #2 are two points of a passage Screen video data, #3, #4 are two split screen video datas of another passage；When MIPI module LANE numbers are 16LANE, RGB numbers The rgb video signal of input is converted into the split screen video data of four tunnel four according to split screen module 2 to export, that is, carries out four split screen treatment, 1 to 4 tunnels for then exporting correspond to four split screen video datas respectively.
3) four road split screen video datas are sent into RGB data synchronization module 3 and are cached with true by RGB data split screen module 2 Protecting subsequent module can synchronously be operated.To avoid be input into data because of transmission jitter or operation delay, RGB data synchronization mould After block 3 is cached the frame data of half split screen, RGB turns MIPI modules 4 and is drawn off again.
4) RGB turns RGB bit wide of the MIPI modules 4 in the MIPI configuration informations by four road split screen video data conversions It is four tunnel byte datas.RGB turns MIPI modules 4 and is configured according to RGB bit wides, the RGB numbers of the four road split screen video datas that will be input into Exported according to byte data is changed into, when RGB bits bit wide is more than 1 byte, is then split into low byte high and is sequentially output.Together When RGB turn MIPI modules 4 and can be configured according to split screen mode, the reception of the module such as beginning, ends, disjunction to video data require into Row treatment, bonus point screen location of pixels mark after bonus point screen synchronizing information, ED such as before Data Start.
5) 5 pairs of four tunnel byte datas of MIPI groups bag module package operation, form four road MIPI group bag datas, so that turn MIPI data simultaneous modules 6 are sent into after into MIPI data and synchronizes treatment, it is to avoid the addition bag relevant parameter produced by operation What is caused is asynchronous.
6) four road MIPI groups bag datas of the synchronous input of MIPI data LANE distribute modules 7 pairs are according in MIPI configuration informations The configuration of MIPI module LANE numbers distribute and is exported to forming MIPI signals (referring to accompanying drawing 2) on each data LANE.Work as quilt When being configured to 4LANE, 8LANE, 16LANE module, 1,2,3,4 circuit-switched datas that MIPI data LANE distribute modules 7 will be input into are sequentially It is sequentially allocated in respective 1 to 4LANE, 5 to 8LANE, 9 to 12LANE, 13 to 16LANE signals；When be configured as 1LANE, When 2LANE, 3LANE module, then each self-corresponding four LANE therein 1,2,3LANE signals are assigned to per input all the way On.
7) the MIPI signals synchronous control of feeding transmission of each data LANE that MIPI data LANE distribute modules 7 will be distributed During molding block 8, MIPI control modules 1 then transmit control configuration to passing according to the characteristic to be exported MIPI modules 10 by MIPI Defeated synchronization control module 8 carries out MIPI transmission operations, such as the HS-LP sequential exports of MIPI clocks, each data Lane signals HS-LP sequential exports and synchronization, MIPI clocks, data-signal are mutually in step.Due to being that FPGA is realized, therefore to clock, data Using LVDS signals electrical standard, LP status signals use LVCMOS signal electrical standards to HS status signals.So as to produce symbol Close HS, LP transmission signal of MIPI protocol specifications.
8) the MIPI signals of clock, the HS states of data, LP states are respectively fed to MIPI letters by transmission synchronization control module 8 Number synchronous output module 9, MIPI signals synchronous output module 9 is by the HS states of each data LANE, the MIPI signals of LP states It is merged into the MIPI signals that the MIPI LANE signal outputs of standard are received to MIPI modules 10, the display of MIPI modules 10.Simultaneously MIPI signals synchronous output module 9 exports electrical configurations and each data LANE signals export electrically and transmitted according to MIPI The characteristic of characteristic adjustment, i.e., each connector that basis is connected with MIPI modules 10 or connecting line, to including level range, driving Intensity, termination matching, output impedance, transmission high-frequency emphasis are adjusted in interior various physics output characteristics, while, according to each The different length of individual connector or connecting line makes different time delays to the output signal of each data LANE, to ensure module energy The MIPI signals of the phase homogenous quantities of each data LANE are received simultaneously, so as to ensure a screen effect.
The above is only the preferred embodiment of the present invention, it is noted that come for those skilled in the art Say, under the premise without departing from the principles of the invention, can be devised by some improvement, these improvement also should be regarded as guarantor of the invention Shield scope.
The content that this specification is not described in detail belongs to prior art known to professional and technical personnel in the field.

Claims (8)

  1. It is 1. a kind of that many kinds of methods of the data-signal of LANE numbers of MIPI are realized based on FPGA, it is characterised in that：Comprise the following steps：
    1) MIPI configuration informations are received from upper strata, carry out configuration operation, the MIPI configuration informations include MIPI module LANE numbers, Module split screen mode, RGB bit wides, MIPI transmission control parameters and MIPI output electrical configurations；
    2) rgb video signal that the MIPI module LANE numbers and module split screen mode in the MIPI configuration informations will be input into Be converted to four road split screen video datas；When the MIPI modules LANE numbers are 1~4LANE, the rgb video signal that will be input into turns It is changed to the full split screen video data output in four roads；When the MIPI modules LANE numbers are 8LANE, the rgb video signal that will be input into Be converted to four road 2 panes video data outputs；When MIPI module LANE numbers are 16LANE, the rgb video signal that will be input into turns It is changed to the split screen video data output of four tunnel four；By four roads split screen video data caching；
    3) four road split screen video datas are converted to four tunnel byte datas by the RGB bit wides in the MIPI configuration informations；
    4) four tunnel byte data is packaged, forms four road MIPI group bag datas；
    5) the MIPI module LANE numbers in the MIPI configuration informations, each is assigned to by the four roads MIPI group bag datas On data LANE, MIPI signals are formed；
    6) the MIPI transmission control parameters in the MIPI configuration informations are to the MIPI signals on each data LANE Carry out MIPI transmission operations；
    7) MIPI in the MIPI configuration informations exports electrical configurations to the MIPI signals on each data LANE Export and electrically adjusted with transmission characteristic, then send to MIPI modules the MIPI signals on each data LANE (10) show.
  2. 2. according to claim 1 to realize many kinds of methods of the data-signal of LANE numbers of MIPI based on FPGA, its feature exists In：The step 3) also include the step of operation is synchronized to four tunnel byte data afterwards.
  3. 3. according to claim 2 to realize many kinds of methods of the data-signal of LANE numbers of MIPI based on FPGA, its feature exists In：The step 6) in MIPI transmission operations when including the HS-LP of MIPI clocks in the MIPI transmission control parameters MIPI signals on each data LANE described in sequence output control are respectively with HS states and LP State- outputs.
  4. 4. according to claim 3 to realize many kinds of methods of the data-signal of LANE numbers of MIPI based on FPGA, its feature exists In：The MIPI signals are exported in HS states with LVDS signals electrical standard, defeated with LVCOMS signal electrical standards in LP states Go out.
  5. 5. according to claim 4 to realize many kinds of methods of the data-signal of LANE numbers of MIPI based on FPGA, its feature exists In：The MIPI outputs electrical configurations include level range, drive intensity, termination matching, output impedance and transmission high-frequency emphasis.
  6. It is 6. a kind of to realize realizing many kinds of devices of the method for the data-signal of LANE numbers of MIPI based on FPGA described in claim 1, It is characterized in that：Turn MIPI modules (4), MIPI groups Bao Mo including MIPI control modules (1), RGB data split screen module (2), RGB Block (5), MIPI data LANE distribute modules (7), transmission synchronization control module (8) and MIPI signals synchronous output module (9)；
    The MIPI control modules (1) turn MIPI modules (4), MIPI group bag modules with RGB data split screen module (2), RGB respectively (5), MIPI data LANE distribute modules (7), transmission synchronization control module (8) and MIPI signals synchronous output module (9) connection, The RGB data split screen module (2) turns MIPI modules (4) and is connected with MIPI group bags module (5) by RGB, the MIPI groups bag Module (5) is connected with MIPI data LANE distribute modules (7), and the MIPI data LANE distribute modules (7) are synchronous by transmitting Control module (8) and MIPI signals synchronous output module (9) connection, the MIPI signals synchronous output module (9) and MIPI moulds Group (10) is connected；
    The MIPI control modules (1) carry out configuration operation for MIPI configuration informations；
    The RGB data split screen module (2) is converted to four road split screen video datas for the rgb video signal being just input into；
    The RGB turns MIPI modules (4) for four road split screen video datas to be converted into four tunnel byte datas；
    The MIPI groups bag module (5) forms four road MIPI group bag datas for being packaged to four tunnel byte data；
    Be assigned to the four roads MIPI group bag datas on each data LANE by the MIPI data LANE distribute modules (7), shape Into MIPI signals；
    Transmission synchronization control module (8) is for carrying out MIPI transmission behaviour to the MIPI signals on each data LANE Make；
    The MIPI signals synchronous output module (9) to the MIPI signals on each data LANE for carrying out exporting electrically Adjusted with transmission characteristic, and the MIPI signals on each data LANE are sent to MIPI modules (10).
  7. 7. it is according to claim 6 that many kinds of devices of the method for the data-signal of LANE numbers of MIPI are realized based on FPGA, its It is characterised by：Also include turning with RGB data split screen module (2) and RGB respectively the synchronous mould of RGB data that MIPI modules (4) connect Block (3), the RGB data synchronization module (3) is for the four roads split screen video data to be cached.
  8. 8. many kinds of dresses of the method for the data-signal of LANE numbers of MIPI are realized based on FPGA according to claim 6 or 7 Put, it is characterised in that：Also include the MIPI being connected with MIPI group bags module (5) and MIPI data LANE distribute modules (7) respectively Data simultaneous module (6), the MIPI data simultaneous modules (6) to four tunnel byte data for synchronizing operation.
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CN106250342A (en) * 2016-08-23 2016-12-21 广东高云半导体科技股份有限公司 A kind of MIPI interface circuit based on FPGA True LVDS interface and operation method thereof
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CN111400218B (en) * 2020-03-10 2021-08-27 武汉精立电子技术有限公司 MIPI high-speed signal generation method and system compatible with multiple data formats
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