CN104751078A - Password circuit - Google Patents
Password circuit Download PDFInfo
- Publication number
- CN104751078A CN104751078A CN201310734638.3A CN201310734638A CN104751078A CN 104751078 A CN104751078 A CN 104751078A CN 201310734638 A CN201310734638 A CN 201310734638A CN 104751078 A CN104751078 A CN 104751078A
- Authority
- CN
- China
- Prior art keywords
- pin
- cryptochannel
- electronic chip
- base
- level signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Storage Device Security (AREA)
Abstract
A password circuit is used for setting a circuit password for an electronic chip and comprises at least two jumper wire units, wherein each jumper wire unit comprises a base and a jumper cap, and each base comprises a first lead pin, a second lead pin and a third lead pin. Each first lead pi is used for being connected with the output end of a power supply, each second lead pin is connected with the electronic chip, each third lead pin is grounded, each jumper cap is used for being communicated with the first lead pin of the corresponding base or the second lead pin and the third lead pin of the corresponding base so as to enable the second lead pin of the corresponding jumper wire unit to output a high-level signal or a low-level signal to the electronic chip, and the high-level signals and the low-level signals output by the second lead pins of at least two jumper wire units form the circuit password of the electronic chip.
Description
Technical field
The present invention relates to a kind of cryptochannel, refer to a kind of BIOS(Basic Input/Output System especially, Basic Input or Output System (BIOS)) cryptochannel.
Background technology
In order to ensure the safety of computing machine, user can arrange system password to the information preventing undelegated user from changing computing machine to the BIOS of computing machine usually.But, there is now a lot of demoder can decode this BIOS system password.This causes very large hidden danger to the safety of computing machine.Therefore, it is necessary for the basis arranging system password arranging a cryptochannel.
Summary of the invention
In view of above content, be necessary to provide a kind of cryptochannel that can ensure computer security.
A kind of cryptochannel, in order to arrange circuit password to an electronic chip, described cryptochannel comprises at least two wire jumper unit, each wire jumper unit comprises a base and and jumps cap, each base comprises one first pin, one second pin and one the 3rd pin, each first pin is in order to connect the output terminal of a power supply, each second pin connects described electronic chip, each the 3rd pin ground connection, each jumps cap in order to be communicated with the first pin of corresponding base and the second pin or the second pin and the 3rd pin that are communicated with corresponding base, thus make the second pin of corresponding wire jumper unit export a high level signal or low level signal extremely described electronic chip, the low and high level signal of the second pin output of described at least two wire jumper unit forms the circuit password of described electronic chip.
A kind of cryptochannel, in order to arrange circuit password to an electronic chip, include power circuit and wire jumper unit, described wire jumper unit includes base and jumps cap, described base includes the first pin, second pin and the 3rd pin, described first pin connects the output terminal of described power circuit, described second pin connects described electronic chip, described 3rd pin ground connection, described jumping cap is in order to be communicated with described first pin with described second pin or be communicated with described second pin and described 3rd pin, thus make described second pin export a high level signal or a low level signal extremely described electronic chip, the low and high level signal that described second pin exports forms the circuit password of described electronic chip.
Compared with prior art, in above-mentioned cryptochannel, the low and high level signal of the second pin output of described at least two wire jumper unit forms the circuit password of described electronic chip, only have when described jumping cap connects correct pin, the second pin could export correct circuit password to described electronic chip.Only have and could allow to enter electronic chip system carry out system password change after electronic chip receives correct circuit password.Like this, the safety of computer system is further ensured.
Accompanying drawing explanation
Fig. 1 is the connection block diagram of a preferred embodiment of cryptochannel of the present invention.
Fig. 2 is the circuit diagram of a preferred embodiment of cryptochannel of the present invention.
Main element symbol description
| Power circuit | 100 |
| Cryptochannel | 200 |
| Wire jumper unit | 300 |
| First wire jumper unit | 21 |
| First base | 211 |
| First jumps cap | 213 |
| Second wire jumper unit | 22 |
| Second base | 221 |
| Second jumps cap | 223 |
| 3rd wire jumper unit | 23 |
| 3rd base | 231 |
| 3rd jumps cap | 233 |
| Electronic chip | 30 |
Following embodiment will further illustrate the present invention in conjunction with above-mentioned accompanying drawing.
Embodiment
Refer to Fig. 1 and Fig. 2, in a better embodiment of the present invention, a kind of cryptochannel 200 is in order to arrange circuit password to an electronic chip 30.Described electronic chip 30 comprises one first pin, one second pin, one the 3rd pin and one the 4th pin.First pin of described electronic chip 30 is by an electric capacity C1 ground connection.In one embodiment, described electronic chip 30 is a BIOS chip.
Described cryptochannel 200 comprises a power circuit 100 and at least one wire jumper unit 300.Described power circuit 100 is in order to provide working power to each wire jumper unit 300.
In the present embodiment, described at least one wire jumper unit 300 comprises one first wire jumper unit 21,1 second wire jumper unit 22 and one the 3rd wire jumper unit 23.
Described first wire jumper unit 21 comprises one first base 211 and one first and jumps cap 213.Described first base 211 comprises one first pin, one second pin and one the 3rd pin.
Described second wire jumper unit 22 comprises one second base 221 and one second and jumps cap 223.Described second base 221 comprises one first pin, one second pin and one the 3rd pin.
Described 3rd wire jumper unit 23 comprises one the 3rd base 231 and the 3rd and jumps cap 233.Described 3rd base 231 comprises one first pin, one second pin and one the 3rd pin.
Second pin of described first wire jumper unit 21 is used for output one first password signal PSWD_1.Second pin of described second wire jumper unit 22 is used for output one second code signal PSWD_2.Second pin of described 3rd wire jumper unit 23 is used for output 1 the 3rd code signal PSWD_3.Second pin of described first base 211 of the second pin electrical connection of described electronic chip 30.Second pin of described second base 221 of the 3rd pin electrical connection of described electronic chip 30.Second pin of described 3rd base 231 of the 3rd pin electrical connection of electronic chip 30.
In the present embodiment, described in each, the first pin of the first wire jumper unit 21, second wire jumper unit 22 and the 3rd wire jumper unit 23 all connects the output terminal of described power circuit 100 by a pull-up resistor R.3rd pin all ground connection of the first wire jumper unit 21, second wire jumper unit 22 and the 3rd wire jumper unit 23 described in each.
When described first jumping cap 213 is communicated with the first pin and second pin of described first base 211, the first password signal PSWD_1 that described first wire jumper unit 21 exports is high level 1.When described first jumping cap 213 is communicated with the second pin and the 3rd pin of described first base 211, the first password signal PSWD_1 that described first wire jumper unit 21 exports is low level 0.
When described second jumping cap 223 is connected to the first pin and second pin of described second base 221, the second code signal PSWD_2 that described second wire jumper unit 22 exports is high level 1.When described second jumping cap 223 is connected to the second pin and the 3rd pin of described second base 221, the second code signal PSWD_2 that described second wire jumper unit 22 exports is low level 0.
When described 3rd jumping cap 233 is connected to the first pin and second pin of described 3rd base 231, the 3rd code signal PSWD_3 that described 3rd wire jumper unit 23 exports is high level 1.When described 3rd jumping cap 233 is connected to the second pin and the 3rd pin of described 3rd base 231, the 3rd code signal PSWD_3 that described 3rd wire jumper unit 23 exports is low level 0.The low and high level composition set of number code signal that described second pin exports.
During use, user can arrange the initial password of described cryptochannel 200.Such as, it is 101 that user arranges initial password, so user just needs to jump described first the first pin and the second pin that cap 213 is connected to described first base 211, described second jumps the second pin and the 3rd pin that cap 223 is connected to described second base 221, and the described 3rd jumps the first pin and the second pin that cap 233 is connected to described 3rd base 231.After setting circuit password, user can jump the link position change that cap 233 jumped by cap 213, second jumping cap 223 and the 3rd by described first, or directly one or all of jumping in cap 223 and the 3rd jumping cap 233 of described first jumping cap 213, second is taken down.
When user wants the system password entering the change computer installation of BIOS system or amendment BIOS, user needs under the circuit password of described cryptochannel 200 arranges correct prerequisite, and namely described electronic chip 30 receives correct circuit password user just can be allowed to enter BIOS system.Therefore, the user that described cryptochannel 200 cannot not prevent authorizedly at will enters BIOS system, and further ensures the safety of computer system.
To one skilled in the art, can combine according to scheme of the invention of the present invention and inventive concept the actual needs produced and make other change accordingly or adjustment, and these change and adjustment all should belong to scope disclosed in this invention.
Claims (10)
1. a cryptochannel, in order to arrange circuit password to an electronic chip, it is characterized in that: described cryptochannel comprises at least two wire jumper unit, each wire jumper unit comprises a base and and jumps cap, each base comprises one first pin, one second pin and one the 3rd pin, each first pin is in order to connect the output terminal of a power supply, each second pin connects described electronic chip, each the 3rd pin ground connection, each jumps cap in order to be communicated with the first pin of corresponding base and the second pin or the second pin and the 3rd pin that are communicated with corresponding base, thus make the second pin of corresponding wire jumper unit export a high level signal or low level signal extremely described electronic chip, the low and high level signal of the second pin output of described at least two wire jumper unit forms the circuit password of described electronic chip.
2. cryptochannel as claimed in claim 1, is characterized in that: the first pin of each base connects a pull-up resistor.
3. cryptochannel as claimed in claim 1, it is characterized in that: when each jumping cap is communicated with the first pin of described base and described second pin, the second corresponding pin exports high level signal, when each jumping cap is communicated with the 3rd pin of described base and described second pin, the second corresponding pin output low level signal.
4. cryptochannel as claimed in claim 1, is characterized in that: described low and high level signal composition set of number code signal.
5. cryptochannel as claimed in claim 1, is characterized in that: described electronic chip is BIOS chip.
6. a cryptochannel, in order to arrange circuit password to an electronic chip, include power circuit, it is characterized in that: described cryptochannel also includes wire jumper unit, described wire jumper unit includes base and jumps cap, described base includes the first pin, second pin and the 3rd pin, described first pin connects the output terminal of described power circuit, described second pin connects described electronic chip, described 3rd pin ground connection, described jumping cap is in order to be communicated with described first pin with the second pin or be communicated with described second pin and the 3rd pin, thus make described second pin export a high level signal or low level signal extremely described electronic chip, the low and high level signal that described second pin exports forms the circuit password of described electronic chip.
7. cryptochannel as claimed in claim 6, is characterized in that: described first pin connects the output terminal of described power circuit by a pull-up resistor.
8. cryptochannel as claimed in claim 6, it is characterized in that: when described jumping cap is communicated with described first pin and described second pin, described second pin exports high level signal, when described jumping cap is communicated with described 3rd pin and described second pin, described second pin output low level signal.
9. cryptochannel as claimed in claim 6, is characterized in that: described low and high level signal composition set of number code signal.
10. cryptochannel as claimed in claim 6, is characterized in that: described electronic chip is BIOS chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310734638.3A CN104751078A (en) | 2013-12-27 | 2013-12-27 | Password circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310734638.3A CN104751078A (en) | 2013-12-27 | 2013-12-27 | Password circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN104751078A true CN104751078A (en) | 2015-07-01 |
Family
ID=53590746
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201310734638.3A Pending CN104751078A (en) | 2013-12-27 | 2013-12-27 | Password circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN104751078A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108920398A (en) * | 2018-07-05 | 2018-11-30 | 郑州云海信息技术有限公司 | A kind of jump cap circuit and its design method |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201030839Y (en) * | 2007-03-13 | 2008-03-05 | 陶加山 | Cipher-open electric vehicle motor controller |
| CN201374055Y (en) * | 2009-03-20 | 2009-12-30 | 英业达科技有限公司 | Computer system initiatively distinguishing mainboard |
| CN102262719A (en) * | 2011-08-30 | 2011-11-30 | 青岛海信智能商用设备有限公司 | Method for protecting computer safety based on BIOS (Basic Input/Output System) password and computer |
| US20130050091A1 (en) * | 2011-08-29 | 2013-02-28 | Hon Hai Precision Industry Co., Ltd. | Password input device |
| CN103164007A (en) * | 2011-12-09 | 2013-06-19 | 鸿富锦精密工业（深圳）有限公司 | Password clearing circuit |
-
2013
- 2013-12-27 CN CN201310734638.3A patent/CN104751078A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201030839Y (en) * | 2007-03-13 | 2008-03-05 | 陶加山 | Cipher-open electric vehicle motor controller |
| CN201374055Y (en) * | 2009-03-20 | 2009-12-30 | 英业达科技有限公司 | Computer system initiatively distinguishing mainboard |
| US20130050091A1 (en) * | 2011-08-29 | 2013-02-28 | Hon Hai Precision Industry Co., Ltd. | Password input device |
| CN102262719A (en) * | 2011-08-30 | 2011-11-30 | 青岛海信智能商用设备有限公司 | Method for protecting computer safety based on BIOS (Basic Input/Output System) password and computer |
| CN103164007A (en) * | 2011-12-09 | 2013-06-19 | 鸿富锦精密工业（深圳）有限公司 | Password clearing circuit |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108920398A (en) * | 2018-07-05 | 2018-11-30 | 郑州云海信息技术有限公司 | A kind of jump cap circuit and its design method |
| CN108920398B (en) * | 2018-07-05 | 2021-01-19 | 苏州浪潮智能科技有限公司 | Cap jump circuit and design method thereof |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN104298575B (en) | Mainboard debug circuit | |
| US9235542B2 (en) | Signal switching circuit and peripheral component interconnect express connector assembly having the signal switching circuit | |
| CN104239169A (en) | Signal testing card and method | |
| US9286255B2 (en) | Motherboard | |
| CN109462436B (en) | Test board, signal transmission method and test system | |
| CN104345826A (en) | Adapter card | |
| CN210925482U (en) | Storage device based on Loongson processor | |
| CN102999096A (en) | Computer and main board and test card of computer | |
| US9588929B2 (en) | PCI-E standard selection setting system and microserver | |
| CN102915076A (en) | Computer mainboard and voltage regulation circuit thereof | |
| CN104751078A (en) | Password circuit | |
| CN104158143A (en) | Fan protection circuit | |
| CN201562270U (en) | Server configuration identification device | |
| CN105718011B (en) | interface power supply system | |
| CN204440258U (en) | A kind of circuit board efficiently downloading and debug | |
| CN209231922U (en) | USB OTG interface isolation circuit | |
| US20150138744A1 (en) | Printed circuit board | |
| US20160124888A1 (en) | Memory Bus Loading and Conditioning Module | |
| CN204883691U (en) | Duplicate protection device of nonvolatile store content | |
| CN103901953A (en) | Mainboard | |
| CN105005541A (en) | Circuit and method for multiplexing universal serial bus (USB) and PS/2 interfaces on computer | |
| CN104932998A (en) | Mainboard | |
| CN104424039A (en) | Protecting circuit | |
| CN103378835A (en) | Optoelectronic switch control circuit | |
| CN104461999A (en) | Circuit for automatically implementing functions of USB (universal serial bus) boot disks and OTG (on-the-go) function |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| WD01 | Invention patent application deemed withdrawn after publication | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20150701 |