CN104618059A - Method, device and system for transmitting transport stream data - Google Patents
Method, device and system for transmitting transport stream data Download PDFInfo
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- CN104618059A CN104618059A CN201510018313.4A CN201510018313A CN104618059A CN 104618059 A CN104618059 A CN 104618059A CN 201510018313 A CN201510018313 A CN 201510018313A CN 104618059 A CN104618059 A CN 104618059A
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Abstract
The invention relates to a method, a device and a system for transmitting transport stream data and belongs to the technical field of communication. The method is applied to a first TS chip, and comprises the steps of dividing the TS data of each byte into n groups of subdata, and sending the n groups of subdata to the second TS chip so that the second TS chip is capable of recovering the n groups of subdata, wherein n is a positive integer smaller than 8, and at least one group of subdata comprises the data of at least two bits; the second TS chip is provided with a TS port; the first TS chip and the second TS chip are arranged in a TS device, and the problem of relatively high cost of TS data transmission can be solved; the effect of reducing the cost of TS data transmission is achieved; the method is used for transmitting the TS data.
Description
Technical field
The present invention relates to communication technical field, particularly a kind of transmission class data transmission method, Apparatus and system.
Background technology
In data transmission procedure, in order to make information source information waiting for transmission transmit quickly, need the data of information source information to compress, the compressed bit stream data after message sink coding are called that transmission class is (English: TransportStream; Be called for short: TS) data, usually the equipment of transmission TS data be called TS equipment, in order to transmit TS data, in TS equipment, include the TS chip that two arrange TS interface, by TS interface between two TS chips to fetching transmission TS data.Example, Set Top Box is a kind of TS equipment, and two the TS chips arranged in Set Top Box are respectively demodulation chip and SOC (system on a chip) is (English: System On Chip; Be called for short: SOC), Set Top Box is received from the TS data of outside source as wire cable, satellite antenna, broadband network or terrestrial broadcasting etc. by demodulation chip, TS data are sent to SOC by TS interface by demodulation chip again, completed show the decoding of TS data by SOC.During each transmission, TS data are all transmitted in units of byte.
In prior art, in order to transmit TS data, the docking mode between the TS interface of two TS chips is mainly serial docking and side-by-side docking, and transmission method corresponding to serial docking is serial transmission, and transmission method corresponding to side-by-side docking is parallel transmission.Wherein, serial transmission is applicable to lower rate transmissions, each transmission 1 Bit data, the number of pin of TS chip is less, cost is lower, but equals the clock frequency of TS chip, if will improve message transmission rate due to message transmission rate, just need to improve clock frequency, but the too high meeting of clock frequency is to TS chip and printed circuit board (English: Printed Circuit Board; Be called for short: design PCB) proposes higher requirement, thus increase the design cost of TS chip; Parallel transmission is applicable to high rate data transmission, and the TS data of each byte are split as 8 groups, and often group comprises 1 Bit data, and the message transmission rate of parallel transmission is higher, but requires that the number of pin of TS chip is more, and cost is higher.Serial transmission and parallel transmission are all by the TS interfacing data holding wire of TS chip, and clock cable, synchronous indicating signal line and data effective index signal line, realize the docking of two TS chips, makes TS equipment complete the transmission of TS data.
But due to when adopting parallel transmission method to carry out TS transfer of data, the TS data of each byte need to be split as 8 groups, often group comprises 1 Bit data, each bit transmits on a single data holding wire, and therefore, transmission TS data need 8 single data holding wires, add clock cable, synchronous indicating signal line and data effective index signal line, amount to 11 holding wires, the number of pin of corresponding TS chip is more, therefore, the cost transmitting TS data is higher.
Summary of the invention
In order to the problem that the cost solving transmission TS data is higher, the invention provides a kind of TS data transmission method, Apparatus and system.Described technical scheme is as follows:
According to a first aspect of the invention, provide a kind of transmission class TS data transmission method, for a TS chip, a described TS chip is provided with TS interface, and described method comprises:
Be n group subdata by the TS Data Division of every byte, described n be less than 8 positive integer, described at least 1 group, subdata comprises at least 2 Bit datas;
Send described n group subdata to the 2nd TS chip, so that described 2nd TS chip recovers described n group subdata, described 2nd TS chip is provided with TS interface, and a described TS chip and described 2nd TS chip are arranged in TS equipment.
In conjunction with first aspect, in the first possible execution mode of first aspect, between the TS interface of a described TS chip and described 2nd TS chip, be provided with holding wire, described holding wire comprises: n data signal line, clock cable, synchronous indicating signal line and data effective index signal line
Describedly send described n group subdata to the 2nd TS chip, comprising:
By a described n data signal line, described clock cable, described synchronous indicating signal line and described data effective index signal line are by described n group subdata parallel transmission to described 2nd TS chip, and each data signal line transmits 1 group of subdata.
In conjunction with first aspect, in the execution mode that the second of first aspect is possible, a described TS chip is provided with change-over circuit, and the described TS Data Division by every byte is n group subdata, comprising:
Be n group subdata by the TS Data Division of described change-over circuit to described every byte.
In conjunction with first aspect, in the third possible execution mode of first aspect, a described TS chip is the demodulation chip in described TS equipment, and described 2nd TS chip is the SOC (system on a chip) SOC in described TS equipment.
In conjunction with first aspect to any one in the third possible execution mode of first aspect, in the 4th kind of possible execution mode of first aspect,
Described n equals 4 or 2.
According to a second aspect of the invention, provide a kind of transmission class TS data transmission method, for the 2nd TS chip, described 2nd TS chip is provided with TS interface, and described method comprises:
Receive the n group subdata that a TS chip sends, a described TS chip is provided with TS interface, described n group subdata is a described TS chip to TS Data Division is obtain after n group, described n be less than 8 positive integer, a described TS chip and described 2nd TS chip are arranged in TS equipment;
Recover described n group subdata, obtain initial TS data, it is identical that described initial TS data and a described TS chip carry out the TS data before Data Division.
In conjunction with second aspect, in the first possible execution mode of second aspect, between the TS interface of a described TS chip and described 2nd TS chip, be provided with holding wire, described holding wire comprises: n data signal line, clock cable, synchronous indicating signal line and data effective index signal line
The n group subdata that described reception the one TS chip sends, comprising:
By a described n data signal line, described clock cable, the n group subdata that described in described synchronous indicating signal line and described data effective index signal line parallel receive, a TS chip sends, each data signal line receives 1 group of subdata.
In conjunction with second aspect, in the execution mode that the second of second aspect is possible, described 2nd TS chip is provided with restore circuit, describedly recovers described n group subdata, obtains initial TS data, comprising:
By described restore circuit, described n group subdata is recovered, obtain initial TS data.
In conjunction with second aspect, in the third possible execution mode of second aspect, a described TS chip is the demodulation chip in described TS equipment, and described 2nd TS chip is the SOC (system on a chip) SOC in described TS equipment.
In conjunction with second aspect to any one in the third possible execution mode of second aspect, in the 4th kind of possible execution mode of second aspect,
Described n equals 4 or 2.
According to a third aspect of the invention we, provide a kind of transmission class TS data transmission device, for a TS chip, a described TS chip is provided with TS interface, and described TS data transmission device comprises:
Split module, for being n group subdata by the TS Data Division of every byte, described n be less than 8 positive integer, described at least 1 group, subdata comprises at least 2 Bit datas;
Sending module, for sending described n group subdata to the 2nd TS chip, so that described 2nd TS chip recovers described n group subdata, described 2nd TS chip is provided with TS interface, and a described TS chip and described 2nd TS chip are arranged in TS equipment.
In conjunction with the third aspect, in the first possible execution mode of the third aspect, between the TS interface of a described TS chip and described 2nd TS chip, be provided with holding wire, described holding wire comprises: n data signal line, clock cable, synchronous indicating signal line and data effective index signal line
Described sending module, comprising:
Parallel transmission unit, for passing through a described n data signal line, described clock cable, described synchronous indicating signal line and described data effective index signal line are by described n group subdata parallel transmission to described 2nd TS chip, and each data signal line transmits 1 group of subdata.
In conjunction with the third aspect, in the execution mode that the second of the third aspect is possible, a described TS chip is provided with change-over circuit, and described fractionation module, comprising:
Conversion split cells, for being n group subdata by the TS Data Division of described change-over circuit to described every byte.
In conjunction with the third aspect, in the third possible execution mode of the third aspect, a described TS chip is the demodulation chip in described TS equipment, and described 2nd TS chip is the SOC (system on a chip) SOC in described TS equipment.
In conjunction with the third aspect to any one in the third possible execution mode of the third aspect, in the 4th kind of possible execution mode of the third aspect,
Described n equals 4 or 2.
According to a forth aspect of the invention, provide a kind of transmission class TS data transmission device, for the 2nd TS chip, described 2nd TS chip is provided with TS interface, and described TS data transmission device comprises:
Receiver module, for receiving the n group subdata that a TS chip sends, a described TS chip is provided with TS interface, described n group subdata is a described TS chip to TS Data Division is obtain after n group, described n be less than 8 positive integer, a described TS chip and described 2nd TS chip are arranged in TS equipment;
Recovering module, for recovering described n group subdata, obtaining initial TS data, it is identical that described initial TS data and a described TS chip carry out the TS data before Data Division.
In conjunction with fourth aspect, in the first possible execution mode of fourth aspect, between the TS interface of a described TS chip and described 2nd TS chip, be provided with holding wire, described holding wire comprises: n data signal line, clock cable, synchronous indicating signal line and data effective index signal line
Described receiver module, comprising:
Parallel receive unit, for passing through a described n data signal line, described clock cable, the n group subdata that described in described synchronous indicating signal line and described data effective index signal line parallel receive, a TS chip sends, each data signal line receives 1 group of subdata.
In conjunction with fourth aspect, in the execution mode that the second of fourth aspect is possible, described 2nd TS chip is provided with restore circuit, and described recovery module, comprising:
Recovering merge cells, for being recovered described n group subdata by described restore circuit, obtaining initial TS data.
In conjunction with fourth aspect, in the third possible execution mode of fourth aspect, a described TS chip is the demodulation chip in described TS equipment, and described 2nd TS chip is the SOC (system on a chip) SOC in described TS equipment.
In conjunction with fourth aspect to any one in the third possible execution mode of fourth aspect, in the 4th kind of possible execution mode of fourth aspect,
Described n equals 4 or 2.
According to a fifth aspect of the invention, provide a kind of transmission class TS data transmission system, described system comprises: a TS chip and the 2nd TS chip;
A described TS chip comprises the TS data transmission device described in the third aspect;
Described 2nd TS chip comprises the TS data transmission device described in fourth aspect.
Technical scheme provided by the invention can comprise following beneficial effect:
In TS data transmission procedure, be be less than the subdata of 8 groups by the TS Data Division of every byte, the subdata after fractionation is made to carry out parallel transmission, and then the subdata after splitting is reverted to the TS data before fractionation, complete the transmission of TS data, compared to the parallel transmission method of existing 8 groups of subdatas, the quantity of holding wire is less, the number of pin of corresponding TS chip is less, reaches the effect of the cost reducing transmission TS data.
Should be understood that, it is only exemplary and explanatory that above general description and details hereinafter describe, and can not limit the present invention.
Accompanying drawing explanation
Accompanying drawing to be herein merged in specification and to form the part of this specification, shows embodiment according to the invention, and is used from specification one and explains principle of the present invention.
Fig. 1 is the schematic diagram of the implementation environment involved by each embodiment of the present invention;
Fig. 2 is the method flow diagram of a kind of TS data transmission method according to an exemplary embodiment;
Fig. 3 is the method flow diagram of a kind of TS data transmission method according to another exemplary embodiment;
Fig. 4 is the method flow diagram of a kind of TS data transmission method according to another exemplary embodiment;
Fig. 5 is the schematic diagram that a kind of TS data according to an exemplary embodiment are split and recover;
Fig. 6 is the transmission time sequence figure of the TS data of a certain byte according to an exemplary embodiment;
Fig. 7 is the structural representation of the TS transfer of data of Set Top Box according to an exemplary embodiment;
Fig. 8 is the block diagram of a kind of TS data transmission device according to an exemplary embodiment;
Fig. 9 is the block diagram of the sending module in the TS data transmission device according to Fig. 8;
Figure 10 is the block diagram of the fractionation module in the TS data transmission device according to Fig. 8;
Figure 11 is the block diagram of a kind of TS data transmission device according to another exemplary embodiment;
Figure 12 is the block diagram of the receiver module in the TS data transmission device according to Figure 11;
Figure 13 is the block diagram of the recovery module in the TS data transmission device according to Figure 11;
Figure 14 is the block diagram of a kind of TS data transmission system according to an exemplary embodiment;
Figure 15 is the block diagram of a kind of TS data transmission device according to an exemplary embodiment;
Figure 16 is the block diagram of a kind of TS data transmission device according to another exemplary embodiment.
By above-mentioned accompanying drawing, illustrate the embodiment that the present invention is clear and definite more detailed description will be had hereinafter.These accompanying drawings and text description be not in order to limited by any mode the present invention design scope, but by reference to specific embodiment for those skilled in the art illustrate concept of the present invention.
Embodiment
Here will be described exemplary embodiment in detail, its sample table shows in the accompanying drawings.When description below relates to accompanying drawing, unless otherwise indicated, the same numbers in different accompanying drawing represents same or analogous key element.Execution mode described in following exemplary embodiment does not represent all execution modes consistent with the present invention.On the contrary, they only with as in appended claims describe in detail, the example of apparatus and method that aspects more of the present invention are consistent.
Fig. 1 is the schematic diagram of the implementation environment involved by each embodiment of the present invention, and this implementation environment comprises: a TS chip 01 and the 2nd TS chip 02.
One TS chip 01 and the 2nd TS chip 02 are arranged at TS equipment 03.Data signal line is provided with, clock cable, synchronous indicating signal line and data effective index signal line between one TS chip 01 and the 2nd TS chip 02.TS equipment 03 receives from the digital television signal (i.e. TS data) of outside source as wire cable, satellite antenna, broadband network or terrestrial broadcasting etc. by a TS chip 01, TS data are sent to the 2nd TS chip 02 by holding wire by the one TS chip 01 again, the decoding of the 2nd TS chip 02 pair of TS data shows, and completes the transmission of the TS data in TS equipment 03.
Fig. 2 is the method flow diagram of a kind of TS data transmission method according to an exemplary embodiment, the TS chip 01 that the present embodiment is applied to implementation environment shown in Fig. 1 with this TS data transmission method illustrates, one TS chip is provided with TS interface, and this TS data transmission method can comprise following several step:
In a step 101, be n group subdata by the TS Data Division of every byte, this n be less than 8 positive integer, at least 1 group subdata comprises at least 2 Bit datas.
In a step 102, send n group subdata to the 2nd TS chip, so that the 2nd TS chip recovers n group subdata, the 2nd TS chip is provided with TS interface, and a TS chip and the 2nd TS chip are arranged in TS equipment.
In sum, the TS data transmission method that the embodiment of the present invention provides, due in TS data transmission procedure, the TS Data Division of every byte can be less than the subdata of 8 groups by the one TS chip, and then send the subdata after splitting to the 2nd TS chip, so that the 2nd TS chip recovers n group subdata, compared to the parallel transmission method of existing 8 groups of subdatas, the quantity of holding wire is less, the number of pin of corresponding TS chip is less, reaches the effect of the cost reducing transmission TS data.
Further, be provided with holding wire between the TS interface of a TS chip and the 2nd TS chip, holding wire as shown in Figure 1, comprising: n data signal line, clock cable, synchronous indicating signal line and data effective index signal line.
Concrete, send n group subdata to the 2nd TS chip, comprising:
By n data signal line, clock cable, synchronous indicating signal line and data effective index signal line are by n group subdata parallel transmission to the 2nd TS chip, and each data signal line transmits 1 group of subdata.
Optionally, a TS chip is provided with change-over circuit, is n group subdata, comprises the TS Data Division of every byte:
Be n group subdata by the TS Data Division of change-over circuit to every byte.
Optionally, a TS chip is the demodulation chip in TS equipment, and the 2nd TS chip is the SOC in TS equipment.
Example, n can equal 4 or 2.
In sum, the TS data transmission method that the embodiment of the present invention provides, due in TS data transmission procedure, the TS Data Division of every byte can be less than the subdata of 8 groups by the one TS chip, and then the subdata after splitting to the 2nd TS chip transmitted in parallel, so that the 2nd TS chip recovers the subdata after fractionation, compared to the parallel transmission method of existing 8 groups of subdatas, the quantity of holding wire is less, the number of pin of corresponding TS chip is less, reaches the effect of the cost reducing transmission TS data.
Fig. 3 is the method flow diagram of a kind of TS data transmission method according to another exemplary embodiment, the 2nd TS chip 02 that the present embodiment is applied to implementation environment shown in Fig. 1 with this TS data transmission method illustrates, 2nd TS chip is provided with TS interface, and this TS data transmission method can comprise following several step:
In step 201, receive the n group subdata that a TS chip sends, a TS chip is provided with TS interface, and n group subdata is a TS chip to TS Data Division is obtain after n group, n be less than 8 positive integer, a TS chip and the 2nd TS chip are arranged in TS equipment.
In step 202., recover n group subdata, obtain initial TS data, it is identical that initial TS data and a TS chip carry out the TS data before Data Division.
In sum, the TS data transmission method that the embodiment of the present invention provides, due in TS data transmission procedure, the TS Data Division of every byte can be less than the subdata of 8 groups by the one TS chip, and then send the subdata after splitting to the 2nd TS chip, 2nd TS chip recovers the TS data of the subdata being less than 8 groups again, obtain initial TS data, compared to the parallel transmission method of existing 8 groups of subdatas, the quantity of holding wire is less, the number of pin of corresponding TS chip is less, reaches the effect of the cost reducing transmission TS data.
Further, be provided with holding wire between the TS interface of a TS chip and the 2nd TS chip, holding wire as shown in Figure 1, comprising: n data signal line, clock cable, synchronous indicating signal line and data effective index signal line.
Concrete, receive the n group subdata that a TS chip sends, comprising:
By n data signal line, clock cable, the n group subdata that synchronous indicating signal line and data effective index signal line parallel receive the one TS chip send, each data signal line receives 1 group of subdata.
Optionally, the 2nd TS chip is provided with restore circuit, recovers n group subdata, obtains initial TS data, comprising:
By restore circuit, n group subdata is recovered, obtain initial TS data.
Optionally, a TS chip is the demodulation chip in TS equipment, and the 2nd TS chip is the SOC in TS equipment.
Example, n can equal 4 or 2.
In sum, the TS data transmission method that the embodiment of the present invention provides, due in TS data transmission procedure, the TS Data Division of every byte can be less than the subdata of 8 groups by the one TS chip, and then the subdata after splitting to the 2nd TS chip transmitted in parallel, 2nd TS chip recovers the TS data of the subdata being less than 8 groups again, obtain initial TS data, compared to the parallel transmission method of existing 8 groups of subdatas, the quantity of holding wire is less, the number of pin of corresponding TS chip is less, reaches the effect of the cost reducing transmission TS data.
Fig. 4 is the method flow diagram of a kind of TS data transmission method according to another exemplary embodiment, and the present embodiment is applied in implementation environment shown in Fig. 1 with this TS data transmission method and illustrates.This TS data transmission method can comprise following several step:
In step 301, a TS chip receives the TS data from outside source.
Example, outside source can be wire cable, satellite antenna, broadband network or terrestrial broadcasting etc.
In step 302, the TS Data Division of every byte is n group subdata by a TS chip.
This n be less than 8 positive integer, at least 1 group subdata comprises at least 2 Bit datas.Example, n can equal 4 or 2, when n equals 4, often organizes subdata and can comprise 2 Bit datas; When n equals 2, often organize subdata and can comprise 4 Bit datas.It should be noted that, the figure place of the Bit data that n group subdata comprises can be equal, also can be unequal.
In order to be n group subdata to the TS Data Division of every byte, a TS chip is arranged can have change-over circuit, then step 302 specifically can comprise: be n group subdata by the TS Data Division of change-over circuit to every byte.
Further, the mode of change-over circuit to the TS Data Division of every byte can split in order, and also can split not in accordance with order, the embodiment of the present invention does not limit the concrete mode split.Suppose that the TS data of certain byte are 01000111, then change-over circuit can be 4 groups to this TS Data Division, 1st group of subdata can be first and deputy Bit data, namely the 01,2nd group of subdata can be the 3rd with the Bit data of the 4th, namely 00,3rd group of subdata can be the 5th with the Bit data of the 6th, namely the 01,4th group of subdata can be the 7th with the Bit data of the 8th, namely 11; Or the 1st group of subdata can be first with the Bit data of the 3rd, namely 00,2nd group of subdata can be the Bit data of second and the 6th, namely 11,3rd group of subdata can be the 4th with the Bit data of the 8th, namely the 01,4th group of subdata can be the 5th with the Bit data of the 7th, namely 01.Or, change-over circuit can be 2 groups to this TS Data Division, and the 1st group of subdata can be the Bit data of first, the 3rd, the 5th and the 7th, namely 0001,2nd group of subdata can be the Bit data of second, the 4th, the 6th and the 8th, namely 1011.
In step 303, a TS chip sends n group subdata to the 2nd TS chip.
Holding wire is provided with between the TS interface of the one TS chip and the 2nd TS chip, this holding wire as shown in Figure 1, comprise: n data signal line, clock cable, synchronous indicating signal line and data effective index signal line, wherein, data signal line is for transmitting n group subdata, often organize subdata and take a data signal line, suppose that the TS Data Division of every byte is 4 groups of subdatas by a TS chip, then between the TS interface of a TS chip and the 2nd TS chip, 4 data signal lines can be set.Clock cable is for transmitting TS data clock signal.Synchronous indicating signal line starts synchronous signal for transmitting TS data.Data effective index signal line is for transmitting the effective signal of TS data.Then step 303 specifically can comprise: by n data signal line, clock cable, and synchronous indicating signal line and data effective index signal line are by n group subdata parallel transmission to the 2nd TS chip, and each data signal line transmits 1 group of subdata.
In step 304, the 2nd TS chip recovers n group subdata, obtains initial TS data.
It is identical that initial TS data and a TS chip carry out the TS data before Data Division.
In order to recover n group subdata, the 2nd TS chip can be provided with restore circuit, then step 304 specifically can comprise: recovered n group subdata by restore circuit, obtains initial TS data.
It should be noted that, the mode that restore circuit recovers n group subdata is corresponding with the mode of change-over circuit to the TS Data Division of every byte, namely restore circuit recovers n group subdata the mode of the TS Data Division of every byte according to change-over circuit, suppose that the TS data of certain byte are 01000111, this TS Data Division can have been become 4 groups by change-over circuit, 1st group of subdata be first with the Bit data of the 3rd, namely 00, 2nd group of subdata is the Bit data of second and the 6th, namely 11, 3rd group of subdata be the 4th with the Bit data of the 8th, namely 01, 4th group of subdata be the 5th with the Bit data of the 7th, namely 01, when so restore circuit recovers these 4 groups of subdatas, each Bit data in these 4 groups of subdatas can be arranged according to initial position, reconfigure, obtain initial TS data 01000111.
The specific implementation of the embodiment of the present invention to the restore circuit of the change-over circuit of a TS chip and the 2nd TS chip does not limit, and this TS data transmission method supported by change-over circuit and restore circuit.
Fig. 5 is the schematic diagram that a kind of TS data according to an exemplary embodiment are split and recover.Suppose split rule for from left to right using every 2 Bit datas as 1 group of subdata, be split as 4 groups of subdatas altogether, often organize subdata and comprise 2 Bit datas, accordingly, recover rule for 4 groups of subdatas to be merged from left to right, then 01000111 first can be split as 01,00 according to fractionation rule, 4 groups of subdatas of 01 and 11, and then be resumed as initial 01000111 according to recovery rule, suppose split rule for from right to left using every 2 Bit datas as 1 group of subdata, first Bit data of first group of subdata is the 7th Bit data in former data, second Bit data of first group of subdata is the 8th Bit data in former data, first Bit data of second group of subdata is the 5th Bit data in former data, second Bit data of second group of subdata is the 6th Bit data in former data, split again by same rule and obtain the 3rd group and the 4th group of subdata, accordingly, recover rule for 4 groups of subdatas to be merged from right to left, then 01000111 first can be split as 11 according to fractionation rule, 01, 4 groups of subdatas of 00 and 01, and then be resumed as initial 01000111 according to recovery rule.Fractured operation is performed by the change-over circuit of a TS chip, and recovery operation is performed by the restore circuit of the 2nd TS chip.Accordingly, as shown in Figure 6, rising edge clock signal is effective, when clock signal becomes high level from low level, starts to receive TS data for the transmission time sequence figure of 01000111; Synchronous indicating signal high level is effective, and when synchronous indicating signal becomes high level from low level, TS data start synchronizing signal; Data effective index signal high level is effective; The TS data of data-signal instruction transmission.
Fig. 7 is the structural representation of the TS transfer of data of Set Top Box according to an exemplary embodiment.Demodulation chip 001 in TS devices set-top box 000 can as a TS chip, SOC002 in Set Top Box 000 can as the 2nd TS chip, demodulation chip and SOC are positioned on the printed circuit board (PCB) of Set Top Box, data signal line is provided with between demodulation chip 001 and SOC002, clock cable, synchronous indicating signal line and data effective index signal line.Set Top Box is received from outside source as wire cable by demodulation chip, satellite antenna, the digital television signal of broadband network or terrestrial broadcasting etc., the TS Data Division of every byte is n group subdata by change-over circuit by demodulation chip, suppose that n equals 4, often organize subdata and comprise 2 Bit datas, these 4 groups of subdatas are passed through 4 data signal lines by demodulation chip, clock cable, synchronous indicating signal line and data effective index signal line are sent to SOC, wherein, 1st data signal line transmission the 1st group of subdata, 2nd data signal line transmission the 2nd group of subdata, 3rd data signal line transmission the 3rd group of subdata, 4th data signal line transmission the 4th group of subdata.Then SOC is recovered these 4 groups of subdatas by restore circuit, obtains initial TS data, and so far, Set Top Box completes the transmission of TS data.
It should be noted that, the TS data transmission method that the embodiment of the present invention provides, owing to being parallel transmission, therefore more high channel transmission rate can be supported, overcome the shortcoming that the transmission rate of serial transmission is in the past lower, without the need to improving clock frequency and signal frequency, easy design hardware plate level cabling, thus avoid the problem of signal integrity or Electro Magnetic Compatibility, reduce the design cost of TS chip, simultaneously, the number of pin overcoming the TS chip of parallel transmission is in the past more, the shortcoming that cost is higher, the problem of the high-speed transfer between data television device can be solved, the effect of standard parallel connected mode is realized with lower cost.
In sum, the TS data transmission method that the embodiment of the present invention provides, due in TS data transmission procedure, the TS Data Division of every byte can be less than the subdata of 8 groups by the one TS chip, and then the subdata after splitting to the 2nd TS chip transmitted in parallel, 2nd TS chip recovers the TS data of the subdata being less than 8 groups again, obtain initial TS data, compared to the parallel transmission method of existing 8 groups of subdatas, the quantity of holding wire is less, the number of pin of corresponding TS chip is less, reaches the effect of the cost reducing transmission TS data.
Following is apparatus of the present invention embodiment, may be used for performing the inventive method embodiment.For the details do not disclosed in apparatus of the present invention embodiment, please refer to the inventive method embodiment.
Fig. 8 is the block diagram of a kind of TS data transmission device according to an exemplary embodiment, and this TS data transmission device 800 can realize becoming the some or all of of a TS chip 01 of implementation environment shown in Fig. 1 by software, hardware or both combinations.One TS chip is provided with TS interface, and this TS data transmission device 800 can comprise: split module 810 and sending module 820.
Split module 810, for being n group subdata by the TS Data Division of every byte, n be less than 8 positive integer, at least 1 group subdata comprises at least 2 Bit datas.
Sending module 820, for sending n group subdata to the 2nd TS chip, so that the 2nd TS chip recovers n group subdata, the 2nd TS chip is provided with TS interface, and a TS chip and the 2nd TS chip are arranged in TS equipment.
In sum, the TS data transmission device that the embodiment of the present invention provides, due in TS data transmission procedure, splitting module can be less than the subdata of 8 groups by the TS Data Division of every byte, sending module can send the subdata after splitting to the 2nd TS chip, so that the 2nd TS chip recovers the subdata after fractionation, compared to the parallel transmission of existing 8 groups of subdatas, the quantity of holding wire is less, the number of pin of corresponding TS chip is less, reaches the effect of the cost reducing transmission TS data.
Further, be provided with holding wire between the TS interface of a TS chip and the 2nd TS chip, holding wire comprises: n data signal line, clock cable, synchronous indicating signal line and data effective index signal line.
Optionally, as shown in Figure 9, sending module 820, comprising:
Parallel transmission unit 821, for passing through n data signal line, clock cable, synchronous indicating signal line and data effective index signal line are by n group subdata parallel transmission to the 2nd TS chip, and each data signal line transmits 1 group of subdata.
One TS chip is provided with change-over circuit, optionally, as shown in Figure 10, splits module 810, comprising:
Conversion split cells 811, for being n group subdata by the TS Data Division of change-over circuit to every byte.
Optionally, a TS chip is the demodulation chip in TS equipment, and the 2nd TS chip is the SOC in TS equipment.
Example, n can equal 4 or 2.
In sum, the TS data transmission device that the embodiment of the present invention provides, due in TS data transmission procedure, splitting module can be less than the subdata of 8 groups by the TS Data Division of every byte, subdata after sending module can split to the 2nd TS chip transmitted in parallel, so that the 2nd TS chip recovers the subdata after fractionation, compared to the parallel transmission of existing 8 groups of subdatas, the quantity of holding wire is less, the number of pin of corresponding TS chip is less, therefore, the effect of the cost reducing transmission TS data is reached.
Figure 11 is the block diagram of a kind of TS data transmission device according to another exemplary embodiment, and this TS data transmission device 1100 can realize becoming the some or all of of the 2nd TS chip 02 of implementation environment shown in Fig. 1 by software, hardware or both combinations.2nd TS chip is provided with TS interface, and this TS data transmission device 1100 can comprise: receiver module 1110 and recovery module 1120.
Receiver module 1110, for receiving the n group subdata that a TS chip sends, a TS chip is provided with TS interface, and n group subdata is a TS chip to TS Data Division is obtain after n group, n be less than 8 positive integer, a TS chip and the 2nd TS chip are arranged in TS equipment.
Recovering module 1120, for recovering n group subdata, obtaining initial TS data, it is identical that initial TS data and a TS chip carry out the TS data before Data Division.
In sum, the TS data transmission device that the embodiment of the present invention provides, due in TS data transmission procedure, receiver module can receive the subdata being less than 8 groups that a TS chip sends, recover module to recover the subdata being less than 8 groups, obtain carrying out the identical initial TS data of the TS data before Data Division with a TS chip, compared to the parallel transmission of existing 8 groups of subdatas, the quantity of holding wire is less, the number of pin of corresponding TS chip is less, reaches the effect of the cost reducing transmission TS data.
Further, be provided with holding wire between the TS interface of a TS chip and the 2nd TS chip, holding wire comprises: n data signal line, clock cable, synchronous indicating signal line and data effective index signal line.
Optionally, as shown in figure 12, receiver module 1110, comprising:
Parallel receive unit 1111, for passing through n data signal line, clock cable, the n group subdata that synchronous indicating signal line and data effective index signal line parallel receive the one TS chip send, each data signal line receives 1 group of subdata.
2nd TS chip is provided with restore circuit, optionally, as shown in figure 13, recovers module 1120, comprising:
Recovering merge cells 1121, for being recovered n group subdata by restore circuit, obtaining initial TS data.
Optionally, a TS chip is the demodulation chip in TS equipment, and the 2nd TS chip is the SOC in TS equipment.
Example, n can equal 4 or 2.
In sum, the TS data transmission device that the embodiment of the present invention provides, due in TS data transmission procedure, receiver module can parallel receive the one TS chip send the subdata being less than 8 groups, recover module to recover the subdata being less than 8 groups, obtain carrying out the identical initial TS data of the TS data before Data Division with a TS chip, compared to the parallel transmission of existing 8 groups of subdatas, the quantity of holding wire is less, the number of pin of corresponding TS chip is less, reaches the effect of the cost reducing transmission TS data.
Figure 14 is the block diagram of a kind of TS data transmission system according to an exemplary embodiment, and this TS data transmission system can comprise a TS chip 1410 and the 2nd TS chip 1420.
One TS chip 1410 can be the TS data transmission device shown in Fig. 8.
2nd TS chip 1420 can be the TS data transmission device shown in Figure 11.
Figure 15 is the block diagram of a kind of TS data transmission device according to an exemplary embodiment, and this TS data transmission device can realize becoming the some or all of of a TS chip 01 of implementation environment shown in Fig. 1 by software, hardware or both combinations.One TS chip is provided with TS interface, and this TS data transmission device can comprise: processor 1510 and transmitter 1520.
Processor 1510, for being n group subdata by the TS Data Division of every byte, n be less than 8 positive integer, at least 1 group subdata comprises at least 2 Bit datas.
Transmitter 1520, for sending n group subdata to the 2nd TS chip, so that the 2nd TS chip recovers n group subdata, the 2nd TS chip is provided with TS interface, and a TS chip and the 2nd TS chip are arranged in TS equipment.
Further, holding wire is provided with between the TS interface of the one TS chip and the 2nd TS chip, holding wire comprises: n data signal line, clock cable, synchronous indicating signal line and data effective index signal line, transmitter 1520, specifically for passing through n data signal line, clock cable, synchronous indicating signal line and data effective index signal line are by n group subdata parallel transmission to the 2nd TS chip, and each data signal line transmits 1 group of subdata.
One TS chip is provided with change-over circuit, processor 1510, specifically for being n group subdata by the TS Data Division of change-over circuit to every byte.
Optionally, a TS chip is the demodulation chip in TS equipment, and the 2nd TS chip is the SOC in TS equipment.
Example, n can equal 4 or 2.
In sum, the TS data transmission device that the embodiment of the present invention provides, due in TS data transmission procedure, the TS Data Division of every byte can be less than the subdata of 8 groups by processor, transmitter can send the subdata after splitting to the 2nd TS chip, so that the 2nd TS chip recovers the subdata after fractionation, compared to the parallel transmission of existing 8 groups of subdatas, the quantity of holding wire is less, the number of pin of corresponding TS chip is less, reaches the effect of the cost reducing transmission TS data.
Figure 16 is the block diagram of a kind of TS data transmission device according to another exemplary embodiment, and this TS data transmission device can realize becoming the some or all of of a TS chip 01 of implementation environment shown in Fig. 1 by software, hardware or both combinations.2nd TS chip is provided with TS interface, and this TS data transmission device can comprise: receiver 1610 and processor 1620.
Receiver 1610, for receiving the n group subdata that a TS chip sends, a TS chip is provided with TS interface, and n group subdata is a TS chip to TS Data Division is obtain after n group, n be less than 8 positive integer, a TS chip and the 2nd TS chip are arranged in TS equipment.
Processor 1620, for recovering n group subdata, obtains initial TS data, and it is identical that initial TS data and a TS chip carry out the TS data before Data Division.
Further, be provided with holding wire between the TS interface of a TS chip and the 2nd TS chip, holding wire comprises: n data signal line, clock cable, synchronous indicating signal line and data effective index signal line.Receiver 1610, specifically for passing through n data signal line, clock cable, the n group subdata that synchronous indicating signal line and data effective index signal line parallel receive the one TS chip send, each data signal line receives 1 group of subdata.
Processor 1620, specifically for being recovered n group subdata by restore circuit, obtains initial TS data.
Optionally, a TS chip is the demodulation chip in TS equipment, and the 2nd TS chip is the SOC in TS equipment.
Example, n can equal 4 or 2.
In sum, the TS data transmission device that the embodiment of the present invention provides, due in TS data transmission procedure, receiver can parallel receive the one TS chip send the subdata being less than 8 groups, processor can recover the subdata being less than 8 groups, obtain carrying out the identical initial TS data of the TS data before Data Division with a TS chip, compared to the parallel transmission of existing 8 groups of subdatas, the quantity of holding wire is less, the number of pin of corresponding TS chip is less, reaches the effect of the cost reducing transmission TS data.
The embodiment of the present invention provides a kind of TS data transmission system, comprises the TS data transmission device as shown in Figure 15 or Figure 16.
About the device in above-described embodiment, wherein the concrete mode of modules executable operations has been described in detail in about the embodiment of the method, will not elaborate explanation herein.
The foregoing is only preferred embodiment of the present invention, not in order to limit the present invention, within the spirit and principles in the present invention all, any amendment done, equivalent replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (21)
1. a transmission class TS data transmission method, is characterized in that, for a TS chip, a described TS chip is provided with TS interface, and described method comprises:
Be n group subdata by the TS Data Division of every byte, described n be less than 8 positive integer, described at least 1 group, subdata comprises at least 2 Bit datas;
Send described n group subdata to the 2nd TS chip, so that described 2nd TS chip recovers described n group subdata, described 2nd TS chip is provided with TS interface, and a described TS chip and described 2nd TS chip are arranged in TS equipment.
2. method according to claim 1, is characterized in that, is provided with holding wire between the TS interface of a described TS chip and described 2nd TS chip, described holding wire comprises: n data signal line, clock cable, synchronous indicating signal line and data effective index signal line
Describedly send described n group subdata to the 2nd TS chip, comprising:
By a described n data signal line, described clock cable, described synchronous indicating signal line and described data effective index signal line are by described n group subdata parallel transmission to described 2nd TS chip, and each data signal line transmits 1 group of subdata.
3. method according to claim 1, is characterized in that, a described TS chip is provided with change-over circuit, and the described TS Data Division by every byte is n group subdata, comprising:
Be n group subdata by the TS Data Division of described change-over circuit to described every byte.
4. method according to claim 1, is characterized in that, a described TS chip is the demodulation chip in described TS equipment, and described 2nd TS chip is the SOC (system on a chip) SOC in described TS equipment.
5. the method according to Claims 1-4 any one claim, is characterized in that,
Described n equals 4 or 2.
6. a transmission class TS data transmission method, is characterized in that, for the 2nd TS chip, described 2nd TS chip is provided with TS interface, and described method comprises:
Receive the n group subdata that a TS chip sends, a described TS chip is provided with TS interface, described n group subdata is a described TS chip to TS Data Division is obtain after n group, described n be less than 8 positive integer, a described TS chip and described 2nd TS chip are arranged in TS equipment;
Recover described n group subdata, obtain initial TS data, it is identical that described initial TS data and a described TS chip carry out the TS data before Data Division.
7. method according to claim 6, is characterized in that, is provided with holding wire between the TS interface of a described TS chip and described 2nd TS chip, described holding wire comprises: n data signal line, clock cable, synchronous indicating signal line and data effective index signal line
The n group subdata that described reception the one TS chip sends, comprising:
By a described n data signal line, described clock cable, the n group subdata that described in described synchronous indicating signal line and described data effective index signal line parallel receive, a TS chip sends, each data signal line receives 1 group of subdata.
8. method according to claim 6, is characterized in that, described 2nd TS chip is provided with restore circuit, describedly recovers described n group subdata, obtains initial TS data, comprising:
By described restore circuit, described n group subdata is recovered, obtain initial TS data.
9. method according to claim 6, is characterized in that, a described TS chip is the demodulation chip in described TS equipment, and described 2nd TS chip is the SOC (system on a chip) SOC in described TS equipment.
10. the method according to claim 6 to 9 any one claim, is characterized in that,
Described n equals 4 or 2.
11. 1 kinds of transmission class TS data transmission devices, is characterized in that, for a TS chip, a described TS chip is provided with TS interface, and described TS data transmission device comprises:
Split module, for being n group subdata by the TS Data Division of every byte, described n be less than 8 positive integer, described at least 1 group, subdata comprises at least 2 Bit datas;
Sending module, for sending described n group subdata to the 2nd TS chip, so that described 2nd TS chip recovers described n group subdata, described 2nd TS chip is provided with TS interface, and a described TS chip and described 2nd TS chip are arranged in TS equipment.
12. TS data transmission devices according to claim 11, it is characterized in that, holding wire is provided with between the TS interface of a described TS chip and described 2nd TS chip, described holding wire comprises: n data signal line, clock cable, synchronous indicating signal line and data effective index signal line
Described sending module, comprising:
Parallel transmission unit, for passing through a described n data signal line, described clock cable, described synchronous indicating signal line and described data effective index signal line are by described n group subdata parallel transmission to described 2nd TS chip, and each data signal line transmits 1 group of subdata.
13. TS data transmission devices according to claim 11, is characterized in that, a described TS chip is provided with change-over circuit, and described fractionation module, comprising:
Conversion split cells, for being n group subdata by the TS Data Division of described change-over circuit to described every byte.
14. TS data transmission devices according to claim 11, is characterized in that, a described TS chip is the demodulation chip in described TS equipment, and described 2nd TS chip is the SOC (system on a chip) SOC in described TS equipment.
15., according to claim 11 to the TS data transmission device described in 14 any one claims, is characterized in that,
Described n equals 4 or 2.
16. 1 kinds of transmission class TS data transmission devices, is characterized in that, for the 2nd TS chip, described 2nd TS chip is provided with TS interface, and described TS data transmission device comprises:
Receiver module, for receiving the n group subdata that a TS chip sends, a described TS chip is provided with TS interface, described n group subdata is a described TS chip to TS Data Division is obtain after n group, described n be less than 8 positive integer, a described TS chip and described 2nd TS chip are arranged in TS equipment;
Recovering module, for recovering described n group subdata, obtaining initial TS data, it is identical that described initial TS data and a described TS chip carry out the TS data before Data Division.
17. TS data transmission devices according to claim 16, it is characterized in that, holding wire is provided with between the TS interface of a described TS chip and described 2nd TS chip, described holding wire comprises: n data signal line, clock cable, synchronous indicating signal line and data effective index signal line
Described receiver module, comprising:
Parallel receive unit, for passing through a described n data signal line, described clock cable, the n group subdata that described in described synchronous indicating signal line and described data effective index signal line parallel receive, a TS chip sends, each data signal line receives 1 group of subdata.
18. TS data transmission devices according to claim 16, is characterized in that, described 2nd TS chip is provided with restore circuit, and described recovery module, comprising:
Recovering merge cells, for being recovered described n group subdata by described restore circuit, obtaining initial TS data.
19. TS data transmission devices according to claim 16, is characterized in that, a described TS chip is the demodulation chip in described TS equipment, and described 2nd TS chip is the SOC (system on a chip) SOC in described TS equipment.
20., according to claim 16 to the TS data transmission device described in 19 any one claims, is characterized in that,
Described n equals 4 or 2.
21. 1 kinds of transmission class TS data transmission systems, it is characterized in that, described system comprises: a TS chip and the 2nd TS chip;
A described TS chip comprises the arbitrary described TS data transmission device of claim 11 to 15;
Described 2nd TS chip comprises the arbitrary described TS data transmission device of claim 16 to 20.
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