CN104601123A - Low-power consumption three-level operational amplifier for driving large-load capacitor - Google Patents
Low-power consumption three-level operational amplifier for driving large-load capacitor Download PDFInfo
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- CN104601123A CN104601123A CN201410819719.8A CN201410819719A CN104601123A CN 104601123 A CN104601123 A CN 104601123A CN 201410819719 A CN201410819719 A CN 201410819719A CN 104601123 A CN104601123 A CN 104601123A
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- pmos transistor
- transistor
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- meet
- grid
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Abstract
The invention discloses a low-power consumption three-level operational amplifier for driving a large-load capacitor. The amplifier is composed of fifteen MOS transistors, two capacitors and a resistor Ra, wherein the fifteen MOS transistors comprise the first PMOS transistor M10, the second PMOS transistor M11, the third PMOS transistor M13, the fourth PMOS transistor M17, the fifth PMOS transistor M18, the sixth PMOS transistor M21, the seventh PMOS transistor M24, the eighth PMOS transistor M31, the first NMOS transistor M13, the second NMOS transistor M14, the third NMOS transistor M15, the fourth NMOS transistor M16, the fifth NMOS transistor M22, the sixth NMOS transistor M23 and the seventh NMOS transistor M30; the two capacitors comprise the first compensation capacitor Cm and the second compensation capacitor Ca. Compared with the prior art, the three-level operational amplifier can drive the large-load capacitor (hundreds of pF) under the low-voltage low-power consumption (microW) condition, and has a large gain bandwidth product and a better swing rate.
Description
Technical field
The present invention relates to low-voltage and low-power dissipation multi-stage operational amplifier, particularly relate to a kind of multi-stage operational amplifier being applied to low-voltage and low-power dissipation.
Background technology
The technical research of low-voltage and low-power dissipation multi-stage operational amplifier is the very active research field of low consumption circuit all the time, the compensation technique of multi-stage operational amplifier can be widely used in portable electric appts, such as: in battery of mobile phone and the equipment such as Notebook Battery, LDO.In recent years due to the inherent limitations of the Multilevel compensating method-nested type Miller compensation technique (NMC) of famous three-stage operational amplifier, that is: there are Right-half-plant zero and two large compensation electric capacity in this compensation technique; These deficiencies significantly limit its application at low-voltage and low-power dissipation multi-stage operational amplifier circuit.Emerge many compensation methodes about multi-stage operational amplifier to improve NMC technology thereupon, while they greatly improve the stability of amplifier under the condition of low-power consumption, also expand gain bandwidth sum Slew Rate.But above technology also comes with some shortcomings, such as: some building-out capacitor because direct proportion is in load capacitance, and causes chip area to increase, and the manufacturing cost of final circuit also improves; So compensation technique afterwards starts by the area direct proportion of building-out capacitor in the geometric mean of load capacitance, so just greatly save the area of chip.
Summary of the invention
In order to overcome above-mentioned prior art, the present invention proposes a kind of for driving the low-power consumption three-stage operational amplifier of heavy load electric capacity, active feedback and RC series compensation (AFMCRC) technology are proposed, be connected on second level output introducing zero point by RC and form Pole-ZeroDoublets, large-signal and the small-signal performance of operational amplifier is improved with this---gain bandwidth sum transient response, reduce power consumption further simultaneously, strive under low-power consumption condition, obtain better gain bandwidth sum more preferably transient response.
The present invention proposes a kind of for driving the low-power consumption three-stage operational amplifier of heavy load electric capacity, described amplifier is by the first to the 8th PMOS transistor M
10, M
11, M
12, M
17, M
18, M
21, M
24, M
31and first to the 7th nmos pass transistor M
13, M
14, M
15, M
16, M
22, M
23, M
30totally 15 MOS transistor, two electric capacity i.e. the first building-out capacitor Cm and the second building-out capacitor Ca and resistance Ra is formed; Wherein:
The first, the 4th to the 7th PMOS transistor M
10, M
17, M
18, M
21, M
24, M
31source electrode jointly meet power supply V
dD; Except the second to the 3rd PMOS transistor M
11, M
12substrate termination source electrode beyond, the first, the 4th to the 7th PMOS transistor M
10, M
17, M
18, M
21, M
24, M
31substrate termination power supply V
dD; First, second, the 5th to the 7th nmos pass transistor M
13, M
14, M
22, M
23, M
30source electrode common ground GND; First to the 7th M
13, M
14, M
15, M
16, M
22, M
23, M
30substrate terminal ground connection GND;
First PMOS transistor M
10grid meet the first bias voltage V
b1, drain electrode meet the second to the 3rd PMOS transistor M
11, M
12source electrode; The first to the second PMOS transistor M
11, M
12grid meet input voltage V respectively
in-and V
in+end; First PMOS transistor M
11, the first nmos pass transistor M
13drain electrode jointly meet the 3rd nmos pass transistor M
15source electrode, the 3rd PMOS transistor M
12, the second nmos pass transistor M
14drain electrode jointly meet M
16source electrode; The first to the second nmos pass transistor M
13, M
14grid jointly meet the second bias voltage V
b2, the 3rd to the 4th nmos pass transistor M
15, M
16grid jointly meet the 3rd bias voltage V
b3; 6th PMOS transistor M
21, the 8th PMOS transistor M
31grid jointly meet the 4th nmos pass transistor M
16, the 5th PMOS transistor M
18drain electrode; 4th to the 5th PMOS transistor M
17, M
18grid jointly meet the 4th PMOS transistor M
17, the 3rd nmos pass transistor M
15drain electrode; 4th nmos pass transistor M
16source electrode connect the left end of the first building-out capacitor Cm, the right-hand member of the first building-out capacitor Cm meets output V
oUT;
6th PMOS transistor M
21, the 5th nmos pass transistor M
22drain electrode jointly meet the 5th to the 6th nmos pass transistor M
22, M
23grid; 6th nmos pass transistor M
23with the 7th PMOS transistor M
24drain electrode jointly meet M
30grid; 7th PMOS transistor M
24grid meet the 4th bias voltage V
b4; 7th nmos pass transistor M
30, the 8th PMOS transistor M
31drain electrode jointly meet output V
oUT; Resistance Ra one end meets the 7th nmos pass transistor M jointly
30grid; Another termination capacitor Ca one end of resistance Ra, electric capacity Ca other end ground connection GND; External load capacitance C
lmeet V
oUT.
Compared with prior art, the present invention can (under (μ W) condition, this three-stage operational amplifier can drive heavy load electric capacity (hundreds of pF), has large gain bandwidth product and better Slew Rate simultaneously at low-voltage and low-power dissipation.
Accompanying drawing explanation
The theory diagram of Fig. 1 three-stage operational amplifier; Wherein: 1stage and folded common source and common grid differential input stage; 2stage and gain stage; 3stage and push-pull output stage;
Fig. 2 drives load capacitance to be the open-loop frequency response curve of the three-stage operational amplifier of 500pF and 2nF;
Fig. 3 drives load capacitance to be the transient response curve of the three-stage operational amplifier of 500pF and 2nF.
Embodiment
Below in conjunction with the drawings and specific embodiments, the present invention is described in detail, but practical range of the present invention is not limited thereto.
This multi-stage operational amplifier is by 15 MOS transistor (wherein PMOS:M
10, M
11, M
12, M
17, M
18, M
21, M
24and M
31; NMOS:M
13, M
14, M
15, M
16, M
22, M
23and M
30), that is the first building-out capacitor Cm and the second building-out capacitor Ca, a resistance Ra are formed two electric capacity.Connected mode: M
10, M
17, M
18, M
21, M
24and M
31source electrode jointly meet power supply V
dD; Except M
11and M
12substrate termination source electrode outside, M
10, M
17, M
18, M
21, M
24, and M
31substrate termination power supply V
dD.M
13, M
14, M
22, M
23and M
30source electrode common ground GND; M
13, M
14, M
15, M
16, M
22, M
23and M
30substrate terminal ground connection GND.
M
10grid meet bias voltage V
b1, M
10drain electrode meets M
11and M
12source electrode; M
11, M
12grid meet input voltage V respectively
in-and V
in+end; M
11and M
13drain electrode jointly meet M
15source electrode, M
12and M
14drain electrode jointly meet M
16source electrode; M
13and M
14grid jointly meet bias voltage V
b2, M
15and M
16grid jointly meet bias voltage V
b3; M
21and M
31grid jointly meet M
16and M
18drain electrode; M
17and M
18grid jointly meet M
17and M
15drain electrode; M
16source electrode connect the left end of the first building-out capacitor Cm, the right-hand member of the first building-out capacitor Cm meets output V
oUT.
M
21and M
22drain electrode jointly meet M
22and M
23grid; M
23and M
24drain electrode jointly meet M
30grid; M
24grid meet bias voltage V
b4; M
30and M
31drain electrode jointly meet output V
oUT; Resistance Ra one end meets M jointly
30grid; Another termination capacitor Ca one end of resistance Ra, electric capacity Ca other end ground connection GND; External load capacitance C
lmeet V
oUT.
Here adopts Hspice simulator under SMIC 65nm CMOS technology, drives C
ltransactional analysis during=500pF load capacitance and transient analysis simulation parameter and result.Therefrom can see: gain bandwidth product GBW=5.98MHz, phase margin PM=56.4 °, Slew Rate SR=0.54V/ μ s, power consumption is 24 μ W.Reduce the first building-out capacitor Cm in addition, namely reduce the area of chip, in the circuit application of low-voltage and low-power dissipation, this is very favourable.Therefore this money multi-stage operational amplifier is applicable to the high-speed applications field of low-voltage and low-power dissipation.
At low-voltage and low-power dissipation, (under (μ W) condition, this three-stage operational amplifier can drive heavy load electric capacity (hundreds of pF), has large gain bandwidth product and better Slew Rate simultaneously.For verifying its effect, setting at heavy load electric capacity is 500pF, draw its open-loop frequency response curve (Fig. 2) and transient response curve (Fig. 3) by interchange emulation and Transient, the parameter of emulation and result are as shown in form 1 and form 2.
The parameter@C that form 1 emulates
l=500pF
The result@C of form 2, emulation
l=500pF
| Parameter | Thiswork |
| Gain(dB) | 114 |
| PM(deg.) | 56.4 |
| GBW(MHz) | 5.98 |
| SR+/-(V/μs) | 0.54/0.49 |
| Power(mW) | 0.024 |
| Supply(V) | 1.2 |
| C L(pF) | 500 |
*Typical value@TT Corner,25℃。
Claims (1)
1. for driving a low-power consumption three-stage operational amplifier for heavy load electric capacity, it is characterized in that, described amplifier is by the first to the 8th PMOS transistor M
10, M
11, M
12, M
17, M
18, M
21, M
24, M
31and first to the 7th nmos pass transistor M
13, M
14, M
15, M
16, M
22, M
23, M
30, totally 15 MOS transistor, two electric capacity i.e. the first building-out capacitor Cm and the second building-out capacitor Ca and resistance Ra is formed; Wherein:
The first, the 4th to the 7th PMOS transistor M
10, M
17, M
18, M
21, M
24, M
31source electrode jointly meet power supply V
dD; Except the second to the 3rd PMOS transistor M
11, M
12substrate termination source electrode beyond, the first, the 4th to the 7th PMOS transistor M
10, M
17, M
18, M
21, M
24, M
31substrate termination power supply V
dD; First, second, the 5th to the 7th nmos pass transistor M
13, M
14, M
22, M
23, M
30source electrode common ground GND; First to the 7th M
13, M
14, M
15, M
16, M
22, M
23, M
30substrate terminal ground connection GND;
First PMOS transistor M
10grid meet the first bias voltage V
b1, drain electrode meet the second to the 3rd PMOS transistor M
11, M
12source electrode; The first to the second PMOS transistor M
11, M
12grid meet input voltage V respectively
in-and V
in+end; First PMOS transistor M
11, the first nmos pass transistor M
13drain electrode jointly meet the 3rd nmos pass transistor M
15source electrode, the 3rd PMOS transistor M
12, the second nmos pass transistor M
14drain electrode jointly meet M
16source electrode; The first to the second nmos pass transistor M
13, M
14grid jointly meet the second bias voltage V
b2, the 3rd to the 4th nmos pass transistor M
15, M
16grid jointly meet the 3rd bias voltage V
b3; 6th PMOS transistor M
21, the 8th PMOS transistor M
31grid jointly meet the 4th nmos pass transistor M
16, the 5th PMOS transistor M
18drain electrode; 4th to the 5th PMOS transistor M
17, M
18grid jointly meet the 4th PMOS transistor M
17, the 3rd nmos pass transistor M
15drain electrode; 4th nmos pass transistor M
16source electrode connect the left end of the first building-out capacitor Cm, the right-hand member of the first building-out capacitor Cm meets output V
oUT;
6th PMOS transistor M
21, the 5th nmos pass transistor M
22drain electrode jointly meet the 5th to the 6th nmos pass transistor M
22, M
23grid; 6th nmos pass transistor M
23with the 7th PMOS transistor M
24drain electrode jointly meet M
30grid; 7th PMOS transistor M
24grid meet the 4th bias voltage V
b4; 7th nmos pass transistor M
30, the 8th PMOS transistor M
31drain electrode jointly meet output V
oUT; Resistance Ra one end meets the 7th nmos pass transistor M jointly
30grid; Resistance Ra another termination second building-out capacitor Ca one end, the second building-out capacitor Ca other end ground connection GND; External load capacitance C
lmeet V
oUT.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410819719.8A CN104601123A (en) | 2014-12-24 | 2014-12-24 | Low-power consumption three-level operational amplifier for driving large-load capacitor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410819719.8A CN104601123A (en) | 2014-12-24 | 2014-12-24 | Low-power consumption three-level operational amplifier for driving large-load capacitor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN104601123A true CN104601123A (en) | 2015-05-06 |
Family
ID=53126697
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201410819719.8A Pending CN104601123A (en) | 2014-12-24 | 2014-12-24 | Low-power consumption three-level operational amplifier for driving large-load capacitor |
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| Country | Link |
|---|---|
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105375895A (en) * | 2015-10-09 | 2016-03-02 | 天津大学 | Single-stage operational amplifier suitable for TFT-LCD drive circuit |
| CN105450906A (en) * | 2015-11-27 | 2016-03-30 | 天津大学 | Low-noise operational amplifier capable of driving capacitive heavy loads and suitable for image sensor |
| CN110333752A (en) * | 2019-08-06 | 2019-10-15 | 南京微盟电子有限公司 | A kind of firm power linear voltage regulator |
| CN110768636A (en) * | 2019-11-19 | 2020-02-07 | 西安邮电大学 | Stability compensation method and circuit structure for multistage operational amplifier |
| CN114546015A (en) * | 2022-03-08 | 2022-05-27 | 大唐青岛西海岸热力有限公司 | Safety power supply system for thermal equipment |
| CN115097893A (en) * | 2022-08-15 | 2022-09-23 | 深圳清华大学研究院 | LDO circuit and MCU chip of output no external capacitor |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4559502A (en) * | 1984-04-19 | 1985-12-17 | Signetics Corporation | Multi-stage amplifier with capacitive nesting for frequency compensation |
| US20050174171A1 (en) * | 2004-02-09 | 2005-08-11 | Sandeep Oswal | Multistage common mode feedback for improved linearity line drivers |
| CN101388650A (en) * | 2008-10-14 | 2009-03-18 | 复旦大学 | Nested type Miller active capacitor frequency compensation circuit |
| CN101917169A (en) * | 2010-08-05 | 2010-12-15 | 复旦大学 | High-bandwidth low-power consumption frequency-compensation three-stage operational amplifier |
| CN103888082A (en) * | 2014-03-24 | 2014-06-25 | 电子科技大学 | Three-level operational amplifier |
-
2014
- 2014-12-24 CN CN201410819719.8A patent/CN104601123A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4559502A (en) * | 1984-04-19 | 1985-12-17 | Signetics Corporation | Multi-stage amplifier with capacitive nesting for frequency compensation |
| US20050174171A1 (en) * | 2004-02-09 | 2005-08-11 | Sandeep Oswal | Multistage common mode feedback for improved linearity line drivers |
| CN101388650A (en) * | 2008-10-14 | 2009-03-18 | 复旦大学 | Nested type Miller active capacitor frequency compensation circuit |
| CN101917169A (en) * | 2010-08-05 | 2010-12-15 | 复旦大学 | High-bandwidth low-power consumption frequency-compensation three-stage operational amplifier |
| CN103888082A (en) * | 2014-03-24 | 2014-06-25 | 电子科技大学 | Three-level operational amplifier |
Non-Patent Citations (2)
| Title |
|---|
| HOI LEE, PHILIP K. T. MOK: ""Active-Feedback Frequency-Compensation Technique for Low-Power Multistage Amplifiers"", 《IEEE JOURNAL OF SOLID-STATE CIRCUITS》 * |
| ZUSHU YAN ET AL: ""A 0.016-mm2 144- μW Three-Stage Amplifier Capable of Driving 1-to-15 nF Capacitive Load With >0.95-MHz GBW"", 《IEEE JOURNAL OF SOLID-STATE CIRCUITS》 * |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105375895A (en) * | 2015-10-09 | 2016-03-02 | 天津大学 | Single-stage operational amplifier suitable for TFT-LCD drive circuit |
| CN105450906A (en) * | 2015-11-27 | 2016-03-30 | 天津大学 | Low-noise operational amplifier capable of driving capacitive heavy loads and suitable for image sensor |
| CN105450906B (en) * | 2015-11-27 | 2018-10-16 | 天津大学 | The operational amplifier of driving capacitive heavy load low noise suitable for imaging sensor |
| CN110333752A (en) * | 2019-08-06 | 2019-10-15 | 南京微盟电子有限公司 | A kind of firm power linear voltage regulator |
| CN110768636A (en) * | 2019-11-19 | 2020-02-07 | 西安邮电大学 | Stability compensation method and circuit structure for multistage operational amplifier |
| CN114546015A (en) * | 2022-03-08 | 2022-05-27 | 大唐青岛西海岸热力有限公司 | Safety power supply system for thermal equipment |
| CN114546015B (en) * | 2022-03-08 | 2024-02-20 | 大唐青岛西海岸热力有限公司 | Safety power supply system of thermodynamic equipment |
| CN115097893A (en) * | 2022-08-15 | 2022-09-23 | 深圳清华大学研究院 | LDO circuit and MCU chip of output no external capacitor |
| CN115097893B (en) * | 2022-08-15 | 2023-08-18 | 深圳清华大学研究院 | LDO circuit and MCU chip capable of outputting capacitor without plug-in |
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Application publication date: 20150506 |