CN104539946A - Four power supply independent image detection device - Google Patents

Abstract

The invention discloses a four power supply independent image detection device which comprises an image collection platform and a current detection module, wherein the current detection module is characterized in that four current and voltage detection chips are matched with four built-in independent selectable switch chips to realize four independent power supply; four independent power supply circuits of the current detection module are used for measuring four ranges for four power supplies AF, AVDD, DOVDD and DVDD required by a camera of the image collection platform, respectively. According to the image detection device disclosed by the invention, the four independent power supply circuits of the current detection module are used for measuring four ranges for the four power supplies AF, AVDD, DOVDD and DVDD required by the camera (for example, a camera product) of the image collection platform, respectively, and the precision can reach 1 microampere, so that the image detection device has the four independent power supply function of shooting a focusing product with high precision and four ranges.

Description

The image detection device that a kind of four tunnels are independently-powered

Technical field

The technical field of image detection of the present invention and product, particularly relates to the image detection device that a kind of four tunnels are independently-powered.

Background technology

Be applied to the image detection device of mobile phone, vehicle-mounted, safety-security area camera product, the design of its power supply circuit is particularly important, and the four-way power supply precision that the camera (as camera product) of general pattern acquisition platform needs is not high.How to design the image detection device that a camera power supply precision is higher, become a great problem and the difficult point of this area R & D design personnel.

Summary of the invention

In order to overcome the deficiencies in the prior art, the invention provides the image detection device that a kind of four tunnels are independently-powered, it has high accuracy 4 range, and four tunnels of product of can focusing shooting are independently-powered.

The technical solution adopted for the present invention to solve the technical problems is: the image detection device that a kind of four tunnels are independently-powered, and it comprises Image-capturing platform, current detection module; It is independently-powered that this current detection module adopts four current/voltage detection chip to coordinate four built-in four separate alternative switch chips to realize four tunnels respectively, and four-way power supply AF, AVDD, DOVDD, DVDD that the camera that four road power supply circuits of this current detection module are directed to this Image-capturing platform respectively needs do the measurement of four ranges.

As the further improvement of such scheme, four current/voltage detection chip adopt IN220A chip respectively: U20, U22, U24, U27; Four built-in four separate alternative switch chips adopt built-in four separate alternative switch ADG811-YRU chips respectively: U21, U23, U25, U26.

Further, the electrical connection between four IN220A chips and four ADG811-YRU chips is as shown in the table:

Preferably, in U20, pin 6 is via electric capacity C164 electrical ground, and pin 9 connects power supply DVDD1 via resistance R43, and pin 10 connects power supply DVDD via resistance R33, and pin 10 also connects pin 9 via electric capacity C161; In U22, pin 6 is via electric capacity C165 electrical ground, and pin 9 connects power supply DODD1 via resistance R44, and pin 10 connects power supply DODD via resistance R38, and pin 10 also connects pin 9 via electric capacity C162; In U24, pin 6 is via electric capacity C171 electrical ground, and pin 9 connects power supply AVDD1 via resistance R55, and pin 10 connects power supply AVDD via resistance R47, and pin 10 also connects pin 9 via electric capacity C168; In U27, pin 6 is via electric capacity C172 electrical ground, and pin 9 connects power supply AF1 via resistance R56, and pin 10 connects power supply AF via resistance R48, and pin 10 also connects pin 9 via electric capacity C167; In U21, pin 2 connects power supply DVDD1 via resistance R35, and pin 7 connects power supply DVDD1 via resistance R37, and pin 10 connects power supply DVDD1 via resistance 34, pin 13 connects power supply V33 and via electric capacity C164 electrical ground, pin 15 connects power supply DVDD1 via resistance R36; In U23, pin 2 connects power supply DODD1 via resistance R42, and pin 7 connects power supply DODD1 via resistance R39, and pin 10 connects power supply DODD1 via resistance 40, pin 13 connects power supply V33 and via electric capacity C166 electrical ground, pin 15 connects power supply DODD1 via resistance R41; In U25, pin 2 connects power supply AVDD1 via resistance R51, and pin 7 connects power supply AVDD1 via resistance R49, and pin 10 connects power supply AVDD1 via resistance 50, pin 13 connects power supply V33 and via electric capacity C169 electrical ground, pin 15 connects power supply AVDD1 via resistance R45; In U26, pin 2 connects power supply AF1 via resistance R54, and pin 7 connects power supply AF1 via resistance R53, and pin 10 connects power supply AF1 via resistance 52, pin 13 connects power supply V33 and via electric capacity C170 electrical ground, pin 15 connects power supply AF1 via resistance R46.

Four-way power supply AF, AVDD, DOVDD, DVDD that the camera (as camera product) that four road power supply circuits of the current detection module of image detection device of the present invention are directed to Image-capturing platform (Part IV) respectively needs do the measurement of four ranges, precision can reach 1uA, therefore four tunnels for product shooting of can focusing having high accuracy 4 range power standalone feature.

Accompanying drawing explanation

Fig. 1 is the modular structure schematic diagram of image detection device of the present invention.

Fig. 2 is the electrical connection schematic diagram of fpga chip one in Fig. 1.

Fig. 3 is the electrical connection schematic diagram of MC20901 chip one in Fig. 1.

Fig. 4 is the electrical connection schematic diagram of MC20901 chip two in Fig. 1.

Fig. 5 is the current detection module structural representation of image detection device of the present invention.

Fig. 6 is the electrical connection schematic diagram of four current/voltage detection chip IC IN220A of current detection module in Fig. 5.

Fig. 7 is the electrical connection schematic diagram of built-in four the separate alternative switch chip ICADG811-YRU of four of current detection module in Fig. 5.

Fig. 8 is the electrical connection schematic diagram opening the critical piece of short-circuit detecting module of image detection device of the present invention.

Fig. 9 is the modular structure schematic diagram of the Image-capturing platform of image detection device of the present invention.

Figure 10 is the software architecture schematic diagram that image detection device of the present invention adopts.

Figure 11 is the data statistics schematic flow sheet of the data statistics data digging method that image detection device of the present invention adopts.

Figure 12 is the data digging flow schematic diagram of the data statistics data digging method that image detection device of the present invention adopts.

Figure 13 is the schematic perspective view of the board housing of image detection device of the present invention.

Embodiment

In order to make object of the present invention, technical scheme and advantage clearly understand, below in conjunction with drawings and Examples, the present invention is further elaborated.Should be appreciated that specific embodiment described herein only in order to explain the present invention, be not intended to limit the present invention.

The 8lane MIPI of embedding data statistical Data Mining USB3.0 image detection device of decoding is a kind of image detection device being applied to mobile phone, vehicle-mounted, safety-security area camera product, and it mainly contains following six parts compositions.All there is respective characteristic in the design of every part, also can form independently product separately simultaneously, and maintenance, maintenance, application are all very convenient.

1) Part I, decode based on supported 1lane mipi, the 2lane MIPI of xilinx Spartan FPGA development and Design, 4lane MIPI, 8LANE MIPI (two 4LANE mipi is synchronous) MIPI and synchronous become the parallel port transmission board of 8/16.

2) Part II, four tunnels for product shooting of can focusing having high accuracy 4 range power independently current detection module.

3) Part III, opens short-circuit detecting module.Open short circuit OPEN SHAORT measuring ability for camera product, and add hot-swappable function by software optimization, Electricity Functional on four-way power supply during plug product (AF powers, AVDD, DOVDD, DVDD) auto-breaking.

4) Part IV, develop based on Cypress 3014 and xilinx Spartan FPGA, valid data transmission efficiency reaches the USB3.0 Image-capturing platform of 3.7Gbps.This platform is for embedding postamble synchronizing signal before frame before picture frame with postamble, host computer detects frame head and the postamble of view data constantly, avoid the wrong frame process of view data, misdata process, and provide the multiple Sensor reference frequency in the every road of two-way to provide, the supply of two-way multiple I2C communication pattern, multiple Sensor power supply and control signal.

5) Part V, based on the software architecture of QT/C++, comprise auto-focusing (AF), automatic focusing, the burning of AF position, automatic exposure (AE) for Product checking type, automatically equal embedding data statistical Data Mining functions such as horizontal (AWB) in vain.For MTF, SFR, dirty point, hinder the scheduling algorithm such as point, stain (Blemish), ColorUniform, SNR, photocentre detection based on different PC cpu instruction collection SSE4.1, SSE4.2, SSE2, SSE3 dynamically uses instruction set optimization.

6) Part VI, board housing, adopts fan-free heat dissipation technology, and device case, towards high-speed motion apparatus, adopts without Design of Screw Thread for USB3.0 interface hull outside.

Refer to Fig. 1, parallel port transmission board mainly comprises fpga chip one (as FPGA XC6SLX45), 2 MC20901 chips (as MC20901TQLMP-48), camera (Camera) driver element.Parallel port transmission board adopts xilinx Spartan6 XC6SLX45 FPGA development and Design, adopts I2C (Inter-Integrated Circuit, bus), is connected by I2C, double camera parallel port, GPIO mouth with Image-capturing platform.Camera driver element is assigned instruction by this I2C and is imported the MIPI signal of the camera of this Image-capturing platform into this two MC20901 chips by this GPIO mouth, MC20901 chip converts the signal into the receivable LVDS signal of fpga chip one, LVDS signal decoding is become to have the view data of line synchronizing signal by fpga chip one by decoding IP kernel, then by this view data Synchronous fluorimetry is and the view data of port transmission 16 or 8 export two Camera parallel port to by level conversion IC and pass to Image-capturing platform.This GPIO mouth can be two 40 pins (PIN) insert row.Image-capturing platform adopts fpga chip two (also can adopt xilinx Spartan6 XC6SLX45 FPGA development and Design) to realize controlling.

Incorporated by reference to Fig. 2, Fig. 3 and Fig. 4, wherein Fig. 2 is the electrical connection schematic diagram of fpga chip one; 2 MC20901 chips are that MC20901 chip one is respectively the electrical connection schematic diagram of MC20901 chip one and MC20901 chip two with MC20901 chip two, Fig. 3, Fig. 4.The annexation of fpga chip one and 2 MC20901 chips is as shown in table 1, table 2, table 3.

The pin of table 1 fpga chip one and network label thereof

Pin number	Pin content	Network label
			Y2	IO_L1P_3	FPGA_7_LP_P
Y1	IO_L1N_VREF_3	FPGA_7_LP_N
			W3	IO_L2P_3	FPGA_6_LP_P
W1	IO_L2N_3	FPGA_6_LP_N
			P8	IO_L7P_3	-
P7	IO_L7N_3	-
			P6	IO_L8P_3	-
P5	IO_L8N_3	-
			T4	IO_L9P_3	-
T3	IO_L9N_3	-
			U4	IO_L10P_3	-
V3	IO_L10N_3	-
			N6	IO_L11P_3	-
N7	IO_L11N_3	-
			M7	IO_L23P_3	-
M8	IO_L23N_3	-
			R4	IO_L24P_3	-
P4	IO_L24N_3	-
			M6	IO_L25P_3	-

L6	IO_L25N_3	-
			P3	IO_L26P_3	-
N4	IO_L26N_3	-
			M5	IO_L31P_3	-
M4	IO_L31N_VREF_3	-
			V2	IO_L32P_M3DQ14_3	FPGA_5_LP_P
V1	IO_L32N_M3DQ15_3	FPGA_5_LP_N
			U3	IO_L33P_M3DQ12_3	FPGA_7_HS_P
U1	IO_L33N_M3DQ13_3	FPGA_7_HS_N
			T2	IO_L34P_M3UDQS_3	FPGA_6_HS_P
T1	IO_L34N_M3UDQSN_3	FPGA_6_HS_N
			R3	IO_L35P_M3DQ10_3	FPGA_5_HS_P
R1	IO_L35N_M3DQ11_3	FPGA_5_HS_N
			P2	IO_L36P_M3DQ8_3	FPGA_4_HS_P
P1	IO_L36N_M3DQ9_3	FPGA_4_HS_N
			N3	IO_L37P_M3DQ0_3	FPGA_4_LP_P
N1	IO_L37N_M3DQ1_3	FPGA_4_LP_N
			M2	IO_L38P_M3DQ2_3	FPGA_CLK1_LP_P
M1	IO_L38N_M3DQ3_3	FPGA_CLK1_LP_N
			L3	IO_L39P_M3LDQS_3	MIPI_IO1
L1	IO_L39N_M3LDQSN_3	MIPI_IO0
			K2	IO_L40P_M3DQ6_3	FPGA_CLK0_LP_P
K1	IO_L40N_M3DQ7_3	FPGA_CLK0_LP_N
			J3	IO_L41P_GCLK27_M3DQ4_3	FPGA_CLK0_HS_P
J1	IO_L41N_GCLK26_M3DQ5_3	FPGA_CLK0_HS_N
			M3	IO_L42P_GCLK25_TRDY2_M3UDM_3	FPGA_CLK1_HS_P
L4	IO_L42N_GCLK24_M3LDM_3	FPGA_CLK1_HS_N
			K5	IO_L43P_GCLK23_M3RASN_3	-
K4	IO_L43N_GCLK22_IRDY2_M3CASN_3	-
			K3	IO_L44P_GCLK21_M3A5_3	-
J4	IO_L44N_GCLK20_M3A6_3	-
			K6	IO_L45P_M3A3_3	-
J6	IO_L45N_M3ODT_3	-

H4	IO_L46P_M3CLK_3	FPGA_3_LP_P
			H3	IO_L46N_M3CLKN_3	FPGA_3_LP_N
H2	IO_L47P_M3A0_3	FPGA_2_LP_P
			H1	IO_L47N_M3A1_3	FPGA_2_LP_N
G3	IO_L48P_M3BA0_3	FPGA_3_HS_P
			G1	IO_L48N_M3BA1_3	FPGA_3_HS_N
H6	IO_L49P_M3A7_3	-
			H5	IO_L49N_M3A2_3	-
F2	IO_L50P_M3ME_3	FPGA_2_HS_P
			F1	IO_L50N_M3BA2_3	FPGA_2_HS_N
G4	IO_L51P_M3A10_3	-
			F3	IO_L51N_M3A4_3	-
E3	IO_L52P_M3A8_3	FPGA_1_HS_P
			E1	IO_L52N_M3A9_3	FPGA_1_HS_N
D2	IO_L53P_M3CKE_3	FPGA_0_HS_P
			D1	IO_L53N_M3A12_3	FPGA_0_HS_N
C3	IO_L54P_M3RESET_3	FPGA_1_LP_P
			C1	IO_L54N_M3A11_3	FPGA_1_LP_N
G6	IO_L55P_M3A13_3	-
			F5	IO_L55N_M3A14_3	-
K7	IO_L57P_3	-
			K8	IO_L57N_VREF_3	-
D5	IO_L58P_3	-
			E4	IO_L58N_3	-
J7	IO_L59P_3	-
			H8	IO_L59N_3	-
B2	IO_L60P_3	FPGA_0_LP_P
			B1	IO_L60N_3	FPGA_0_LP_N
G7	IO_L80P_3	-
			F7	IO_L80N_3	-
D3	IO_L81P_3	-
			C4	IO_L81N_3	-
E5	IO_L82P_3	-

E6	IO_L82N_3	-
			A2	IO_L83P_3	MIPI_IO3
B3	IO_L83N_VREF_3	MIPI_IO20
			C2	VCCO_3_1	VCC_2V5
F4	VCCO_3_2	VCC_2V5
			F6	VCCO_3_3	VCC_2V5
G2	VCCO_3_4	VCC_2V5
			J5	VCCO_3_5	VCC_2V5
L2	VCCO_3_6	VCC_2V5
			L7	VCCO_3_7	VCC_2V5
N5	VCCO_3_8	VCC_2V5
			R2	VCCO_3_9	VCC_2V5
U5	VCCO_3_10	VCC_2V5
			W2	VCCO_3_11	VCC_2V5

The pin of table 2 MC20901 chip one and network label thereof

Pin number	Pin content	Network label
			1	NC1	-
2	D-PHY-D-P	DPHY_CH1_P
			3	D-PHY-D-N	DPHY_CH1_N
4	GND1	GND
			5	BTA	GND
6	PIN-SWAP	GND
			7	D-PHY-C-P	DPHY_CH2_P
8	D-PHY-C-N	DPHY_CH2_N
			9	GND2	GND
10	D-PHY-B-P	DPHY_CH3_P
			11	D-PHY-B-N	DPHY_CH3_N
12	NC2	-
			13	D-PHY-A-P	DPHY_CLK0_P
14	D-PHY-A-N	DPHY_CLK0_N
			15	VDDIO1	VCC_2V5
16	LP-A-N	FPGA_CLK0_LP_N

17	LP-A-P	FPGA_CLK0_LP_P
			18	LP-B-N	FPGA_3_LP_N
19	LP-B-P	FPGA_3_LP_P
			20	LP-C-N	FPGA_2_LP_N
21	LP-C-P	FPGA_2_LP_P
			22	HS-A-N	FPGA_CLK0_HS_N
23	HS-A-P	FPGA_CLK0_HS_P
			24	NC3	-
25	NC4	-
			26	HS-B-N	FPGA_3_HS_N
27	HS-B-P	FPGA_3_HS_P
			28	GND3	GND
29	HS-C-N	FPGA_2_HS_N
			30	HS-C-P	FPGA_2_HS_P
31	GND4	GND
			32	VDD	VCC_1V2
33	GND5	GND
			34	HS-D-N	FPGA_1_HS_N
35	HS-D-P	FPGA_1_HS_P
			36	NC5	-
37	HS-E-N	FPGA_0_HS_N
			38	HS-E-P	FPGA_0_HS_P
39	LP-D-N	FPGA_1_LP_N
			40	LP-D-P	FPGA_1_LP_P
41	LP-E-N	FPGA_0_LP_N
			42	LP-E-P	FPGA_0_LP_P
43	GPIO1	MIPI_IO3
			44	GPIO0	MIPI_IO2
45	VDDIO2	VCC_2V5
			46	D-PHY-E-P	DPHY_CH0_P
47	D-PHY-E-N	DPHY_CH0_N
			48	NC6	-
49	GND	GND

The pin of table 3 MC20901 chip two and network label thereof

Pin number	Pin content	Network label
			1	NC1	-
2	D-PHY-D-P	DPHY_CH4_P
			3	D-PHY-D-N	DPHY_CH4_N
4	GND1	GND
			5	BTA	GND
6	PIN-SWAP	GND
			7	D-PHY-C-P	DPHY_CH5_P
8	D-PHY-C-N	DPHY_CH5_N
			9	GND2	GND
10	D-PHY-B-P	DPHY_CH6_P
			11	D-PHY-B-N	DPHY_CH6_N
12	NC2	-
			13	D-PHY-A-P	DPHY_CLK7_P
14	D-PHY-A-N	DPHY_CLK7_N
			15	VDDIO1	VCC_2V5
16	LP-A-N	FPGA_7_LP_N
			17	LP-A-P	FPGA_7_LP_P
18	LP-B-N	FPGA_6_LP_N
			19	LP-B-P	FPGA_6_LP_P
20	LP-C-N	FPGA_5_LP_N
			21	LP-C-P	FPGA_5_LP_P
22	HS-A-N	FPGA_7_HS_N
			23	HS-A-P	FPGA_7_HS_P
24	NC3	-
			25	NC4	-
26	HS-B-N	FPGA_6_HS_N
			27	HS-B-P	FPGA_6_HS_P
28	GND3	GND
			29	HS-C-N	FPGA_5_HS_N
30	HS-C-P	FPGA_5_HS_P
			31	GND4	GND

32	VDD	VCC_1V2
			33	GND5	GND
34	HS-D-N	FPGA_4_HS_N
			35	HS-D-P	FPGA_4_HS_P
36	NC5	-
			37	HS-E-N	FPGA_1_HS_N
38	HS-E-P	FPGA_1_HS_P
			39	LP-D-N	FPGA_4_LP_N
40	LP-D-P	FPGA_4_LP_P
			41	LP-E-N	FPGA_CLK1_LP_N
42	LP-E-P	FPGA_CLK1_LP_P
			43	GPIO1	MIPI_IO1
44	GPIO0	MIPI_IO0
			45	VDDIO2	VCC_2V5
46	D-PHY-E-P	DPHY_CLK1_P
			47	D-PHY-E-N	DPHY_CLK1_N
48	NC6	-
			49	GND	GND

In sum, the electrical connection between fpga chip one and 2 MC20901 chips is as shown in table 4 below.

The electrical connection of table 4 parallel port transmission board

In MC20901 chip one, pin 45 connects power Vcc one, also via electric capacity C85 ground connection, via electric capacity C86 ground connection; Pin 15 connects power Vcc one, also via electric capacity C87 ground connection, via electric capacity C88 ground connection; Pin 32 power Vcc two, also via electric capacity C67 ground connection, via electric capacity C68 ground connection.

In MC20901 chip two, pin 45 connects power Vcc one, also via electric capacity C62 ground connection, via electric capacity C63 ground connection; Pin 15 connects power Vcc one, also via electric capacity C64 ground connection, via electric capacity C65 ground connection; Pin 32 power Vcc two, also via electric capacity C60 ground connection, via electric capacity C61 ground connection.

Image detection device of the present invention, the parallel port transmission board that it adopts, based on xilinx Spartan FPGA development and Design, can be supported 1lane mipi, 2lane MIPI, 4lane MIPI, 8LANE MIPI (two 4LANE mipi is synchronous) MIPI decodes also synchronous one-tenth 8/16.

Refer to Fig. 5, it is independently-powered that current detection module (for Part II) adopts four current/voltage detection chip IC IN220A to coordinate four built-in four separate alternative switch chip IC ADG811-YRU to realize four tunnels respectively.Four-way power supply AF, AVDD, DOVDD, DVDD that the camera (as camera product) that four road power supply circuits of current detection module are directed to Image-capturing platform (Part IV) respectively needs do the measurement of four ranges, and precision can reach 1uA.It is independently-powered that current detection module adopts four current/voltage detection chip IC IN220A to realize four tunnels.Four current/voltage detection chip IC IN220A are connected by I2C (as SDA and SCL) and the fpga chip two (i.e. xilinx Spartan6XC6SLX45 FPGA) of Image-capturing platform.IC IN220A refers to IN220A chip.Therefore current detection module has high accuracy 4 range, four tunnels of product of can focusing shooting are independently-powered.

Incorporated by reference to Fig. 6, Fig. 7, it is the electrical connection schematic diagram of four current/voltage detection chip IC IN220A and four built-in four separate alternative switch chip IC ADG811-YRU, and ICADG811-YRU refers to ADG811-YRU chip.Four current/voltage detection chip IC IN220A are respectively U20, U22, U24, U27, and four built-in four separate alternative switch chip IC ADG811-YRU are respectively U21, U23, U25, U26, and the electrical connection between them is as shown in table 4.

The electrical connection of table 4 current detection module

Wherein, according to popular understanding, V33 is expressed as the power supply of 33V, and GND is expressed as ground, and IN1 ~ IN16 represents that input connects the corresponding output of fpga chip two for control U21, U23, U25, U26 respectively.

In U20, pin 6 is via electric capacity C164 electrical ground, and pin 9 connects power supply DVDD1 via resistance R43, and pin 10 connects power supply DVDD via resistance R33, and pin 10 also connects pin 9 via electric capacity C161.

In U22, pin 6 is via electric capacity C165 electrical ground, and pin 9 connects power supply DODD1 via resistance R44, and pin 10 connects power supply DODD via resistance R38, and pin 10 also connects pin 9 via electric capacity C162.

In U24, pin 6 is via electric capacity C171 electrical ground, and pin 9 connects power supply AVDD1 via resistance R55, and pin 10 connects power supply AVDD via resistance R47, and pin 10 also connects pin 9 via electric capacity C168.

In U27, pin 6 is via electric capacity C172 electrical ground, and pin 9 connects power supply AF1 via resistance R56, and pin 10 connects power supply AF via resistance R48, and pin 10 also connects pin 9 via electric capacity C167.

In U21, pin 2 connects power supply DVDD1 via resistance R35, and pin 7 connects power supply DVDD1 via resistance R37, and pin 10 connects power supply DVDD1 via resistance 34, pin 13 connects power supply V33 and via electric capacity C164 electrical ground, pin 15 connects power supply DVDD1 via resistance R36.

In U23, pin 2 connects power supply DODD1 via resistance R42, and pin 7 connects power supply DODD1 via resistance R39, and pin 10 connects power supply DODD1 via resistance 40, pin 13 connects power supply V33 and via electric capacity C166 electrical ground, pin 15 connects power supply DODD1 via resistance R41.

In U25, pin 2 connects power supply AVDD1 via resistance R51, and pin 7 connects power supply AVDD1 via resistance R49, and pin 10 connects power supply AVDD1 via resistance 50, pin 13 connects power supply V33 and via electric capacity C169 electrical ground, pin 15 connects power supply AVDD1 via resistance R45.

In U26, pin 2 connects power supply AF1 via resistance R54, and pin 7 connects power supply AF1 via resistance R53, and pin 10 connects power supply AF1 via resistance 52, pin 13 connects power supply V33 and via electric capacity C170 electrical ground, pin 15 connects power supply AF1 via resistance R46.

Refer to Fig. 8, open short-circuit detecting module can for the camera product inserted under the state be not energized detection chip pin open short circuit, power under avoiding product short-circuit conditions, damage caused to product and mainboard, simultaneously also can tackle this badness product.Open short-circuit detecting module to be connected with the fpga chip one that parallel port is transmitted in board, the AD data of being split short circuit by fpga chip one carry out gathering and analyzing, simultaneously fpga chip one with controlling when opening short-circuit detecting camera with isolation and the short circuit on mainboard ground, and the disconnection of the Signal Products such as PWDN, RESET, I2C and receiving terminal be connected.

Opening short-circuit detecting module adopts 2 selectable switch chips (ADG706 chip) to realize in conjunction with analog to digital converter (AD7477AAKSZ-500RL7 chip) design.2 ADG706 chips are U6, U7, and AD7477AAKSZ-500RL7 chip is U5, and the annexation between them is as shown in table 5.

The electrical connection of short-circuit detecting module opened by table 5

Network label	U6	U7	U5
				VCC	1	1	1
AFS	4	25	-
				DVDDS	5	24	-
DOVDDS	6	23	-
				AVDDS	7	22	-
VPPS	8	21	-
				GND	12，27	12，27，28	2
B3	14	-	-
				B2	15	-	-
B1	16	-	-
				B0	17	-	-
OS_EN	18	18	-
				SGND	19	10	-
S_MCLK1	20	9	-
				S_MCLK2	21	8	-
S_RST	22	7	-
				S_PWDN	23	6	-
S_SCL	24	5	-
				S_SDA	25	4	-

TEST	28	-	3
				AD_CS#	-	-	6
AD_D	-	-	5
				AD_CLK	-	14	4
A3	-	15	-
				A2	-	16	-
A1	-	17	-
				A0	-	18	-

Wherein, in U5, pin 3 is via resistance R90 electrical ground.

In U6, pin 1 is via electric capacity C40, electric capacity C41 electrical ground respectively, and pin 28 meets power supply VCC via resistance R9.

In U7, pin 1 is via electric capacity C38, electric capacity C39 electrical ground respectively.

Refer to Fig. 9, Image-capturing platform transmits board, current detection module as whole platform PC and parallel port and opens the maincenter plate of transfer of data of short-circuit detecting module, and (wherein AVDD supports 3.3V, 2.8V, 2.5V, 1.8V, 1.5V, 0V not only to provide the voltage module of eurypalynous different camera; DOVDD supports 3.3V, 2.8V, 2.5V, 1.8V, 1.5V, 0V; DVDD provides 3.3V, 2.8V, 1.8V, 1.5V, 1.2V, 0V) and support every road independence power down function, provide duplexing polytype I2C communication pattern (8 bit address 8 place values, 8 bit address 16 place values, 16 bit address 8 place values, 16 bit address 16 place values, 16 bit address 32 place values, 32 address 32 place values etc.); Kind (6.25M, 12.5M, 25M, 50M) when providing the camera Product supply of multi-frequency; Support the software exchange of PWDN and RESET.The major function of this Image-capturing platform is mutual by control signal and picture signal and PC main program.

Refer to Figure 10, software architecture is be based upon on the basis of PC, transmits board, current detection module, opens the mutual primary control program of short-circuit detecting module, Image-capturing platform, be connected by the line of USB3.0 with Part IV with parallel port.PC is responsible for receiving image data processing, extracts characteristics of image, judges the work such as properties of product; Have good human-computer interaction interface simultaneously, the sequential of Control card and product, control parallel port transmission board, current detection module, open the work etc. of short-circuit detecting module, Image-capturing platform (being respectively Part I, Part II, Part III, Part IV), and embedded in Database Unit, have the characteristic of historical product extracted, analyze, data mining duty.

The data statistics data digging method that software architecture adopts as shown in FIG. 11 and 12.First: conventional 6 steps complete automatic exposure (AE).Referring to Figure 11, setting data storehouse, writing some products ((referring to image detection device of the present invention)) data in database, as recorded 1000 product data.The data of each product come like this: 1, test A product; 2, the initial luminance data of A product under light source is extracted; 3, control A product does automatic exposure (completing automatic exposure as adopted conventional 6 steps), reaches object brightness, product register when extracting the target of A product, that is extracts the register of A product now product; 4, initial luminance data and AE are completed product register information data-in storehouse during object brightness.

Afterwards, when follow-up test product, refer to Figure 12, as product B to be measured, get final product 2 steps and complete AE, obtain product B current light source initial luminance data, search database, does Data Matching, data mining process, finds the product register matched according to the initial luminance data of product B in a database, this product register product register of product (in the database) is write product B to be measured, then finely tunes AE.AE action is completed: form database by data statistics in such energy two step, then data mining in a database.

This data statistics data digging method can be designed to following data statistics data mining device in Software Module Design: this data statistics data mining device comprises data statistics module and data-mining module.

Data statistics module is used for forming database by data statistics, and it comprises initial luminance data acquiring unit one, product register acquiring unit two, record cell.Initial luminance data acquiring unit one is for extracting the initial luminance data of test products under light source; Product register acquiring unit two does automatic exposure (completing automatic exposure as adopted conventional 6 steps) for controlling test products, reach object brightness, product register when extracting the target of test products, that is extracts the register of test products now product; Record cell is used for product register information data-in storehouse when initial luminance data and AE being completed object brightness.Repeatedly add up at least 1000 test products.

The data-mining module data mining be used in a database goes out the product register of product needed to be measured, and it comprises initial luminance data acquiring unit two, search unit, product register acquiring unit two, writing unit, fine-adjusting unit.Initial luminance data acquiring unit two is for obtaining the current light source initial luminance data of product to be measured; Search unit is used for search database, and do Data Matching, data mining process, product register acquiring unit two is for finding the product register matched in a database according to the initial luminance data of product to be measured; Writing unit is used for this product register product register of product (in the database) to write product to be measured, and fine-adjusting unit is used for starting product to be measured fine setting AE according to the product register of write.

The data statistics data digging method that software architecture adopts, once at test products in early stage, after setting up the database of product register, just facilitates the test of follow-up product to be tested according to initial luminance data, improves testing efficiency.

Board housing, as shown in figure 13, adopts aluminum alloy casing, belonging to mechanism design, designing especially for protecting overall board.Shell comprises the upper casing 18 and lower casing 17 that are fastened togather up and down.The fpga chip that parallel port transmission board is higher with the caloric value of Image-capturing platform is directly connected with housing by radiating silica gel sheet, USB3.0 line and board interface rock for avoiding producing when moving with equipment height, transmit board by an accessory 15 and parallel port to be connected, accessory 15 transmits the interface section of board for fixing USB3.0 line and parallel port.

The foregoing is only preferred embodiment of the present invention, not in order to limit the present invention, all any amendments done within the spirit and principles in the present invention, equivalent replacement and improvement etc., all should be included within protection scope of the present invention.

Claims (10)

1. the image detection device that four tunnels are independently-powered, it comprises Image-capturing platform, current detection module; It is characterized in that: it is independently-powered that this current detection module adopts four current/voltage detection chip to coordinate four built-in four separate alternative switch chips to realize four tunnels respectively, four-way power supply AF, AVDD, DOVDD, DVDD that the camera that four road power supply circuits of this current detection module are directed to this Image-capturing platform respectively needs do the measurement of four ranges.

2. the image detection device that four tunnels according to claim 1 are independently-powered, is characterized in that: four current/voltage detection chip adopt IN220A chip respectively: U20, U22, U24, U27; Four built-in four separate alternative switch chips adopt built-in four separate alternative switch ADG811-YRU chips respectively: U21, U23, U25, U26.

3. the image detection device that four tunnels according to claim 2 are independently-powered, is characterized in that: the pin electrical connection between four IN220A chips and four ADG811-YRU chips is as shown in the table:

4. the image detection device that four tunnels according to claim 3 are independently-powered, it is characterized in that: in U20, pin 6 is via electric capacity C164 electrical ground, pin 9 connects power supply DVDD1 via resistance R43, pin 10 connects power supply DVDD via resistance R33, and pin 10 also connects pin 9 via electric capacity C161.

5. the image detection device that four tunnels according to claim 3 are independently-powered, it is characterized in that: in U22, pin 6 is via electric capacity C165 electrical ground, pin 9 connects power supply DODD1 via resistance R44, pin 10 connects power supply DODD via resistance R38, and pin 10 also connects pin 9 via electric capacity C162.

6. the image detection device that four tunnels according to claim 3 are independently-powered, it is characterized in that: in U24, pin 6 is via electric capacity C171 electrical ground, pin 9 connects power supply AVDD1 via resistance R55, pin 10 connects power supply AVDD via resistance R47, and pin 10 also connects pin 9 via electric capacity C168.

7. the image detection device that four tunnels according to claim 3 are independently-powered, it is characterized in that: in U27, pin 6 is via electric capacity C172 electrical ground, pin 9 connects power supply AF1 via resistance R56, pin 10 connects power supply AF via resistance R48, and pin 10 also connects pin 9 via electric capacity C167.

8. the image detection device that four tunnels according to claim 3 are independently-powered, it is characterized in that: in U21, pin 2 connects power supply DVDD1 via resistance R35, pin 7 connects power supply DVDD1 via resistance R37, pin 10 connects power supply DVDD1 via resistance 34, pin 13 connects power supply V33 and via electric capacity C164 electrical ground, pin 15 connects power supply DVDD1 via resistance R36.

9. the image detection device that four tunnels according to claim 3 are independently-powered, it is characterized in that: in U23, pin 2 connects power supply DODD1 via resistance R42, pin 7 connects power supply DODD1 via resistance R39, pin 10 connects power supply DODD1 via resistance 40, pin 13 connects power supply V33 and via electric capacity C166 electrical ground, pin 15 connects power supply DODD1 via resistance R41.

10. the image detection device that four tunnels according to claim 3 are independently-powered, it is characterized in that: in U25, pin 2 connects power supply AVDD1 via resistance R51, pin 7 connects power supply AVDD1 via resistance R49, pin 10 connects power supply AVDD1 via resistance 50, pin 13 connects power supply V33 and via electric capacity C169 electrical ground, pin 15 connects power supply AVDD1 via resistance R45

In U26, pin 2 connects power supply AF1 via resistance R54, and pin 7 connects power supply AF1 via resistance R53, and pin 10 connects power supply AF1 via resistance 52, pin 13 connects power supply V33 and via electric capacity C170 electrical ground, pin 15 connects power supply AF1 via resistance R46.