CN104519359B - Carry out the device and method of video code flow processing - Google Patents
Carry out the device and method of video code flow processing Download PDFInfo
- Publication number
- CN104519359B CN104519359B CN201310456600.4A CN201310456600A CN104519359B CN 104519359 B CN104519359 B CN 104519359B CN 201310456600 A CN201310456600 A CN 201310456600A CN 104519359 B CN104519359 B CN 104519359B
- Authority
- CN
- China
- Prior art keywords
- chip
- netra
- main control
- chips
- code flow
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Landscapes
- Closed-Circuit Television Systems (AREA)
- Two-Way Televisions, Distribution Of Moving Picture Or The Like (AREA)
Abstract
The invention discloses the device and method for carrying out video code flow processing, wherein, the equipment includes Intel main control chips, PCI E bridging chips and at least one piece Netra from chip；The Intel main control chips, read the video code flow from external equipment, configure from chip mapping space, determine mapping space address, video code flow is sent into Netra corresponding with mapping space address from chip shared drive by PCI E bridging chips；The PCI E bridging chips, carry out Intel main control chips and Netra from the information exchange between chip；The Netra reads video code flow from chip from shared drive, carries out streaming video processing, the code stream after processing is sent.The present invention program can improve code stream disposal ability, and the problem of video code flow processing is limited can be solved again.
Description
Technical field
The present invention relates to the information processing technology, more particularly to carry out the device and method of video code flow processing.
Background technology
In video data process field, people carry out the performance requirement more and more higher of video code flow processing to equipment, single
The equipment performance of chip can not meet the market demand, so multi core chip scheme is quickly grown in recent years, various solution party
Case emerges in an endless stream.
The processing that equipment carries out video code flow is specifically included：Chip reads the video code flow from external equipment, carries out code
Stream video processing, the code stream after processing is sent.
Present multi core chip scheme is substantially the group of combination either multiple Netra chips of multiple Intel chips
Close, illustrate separately below.
Scheme one, equipment is made up of multiple Intel chips：
Due to Intel chip processing capabilities it is limited the characteristics of, this scheme is had obvious defect, cause Intel cores
The video code flow disposal ability of piece can not meet user's demand growing to high integration, HD video.
Scheme two, equipment is made up of multiple Netra chips：
Netra, is specific to the powerful digital media processing platform of digital video monitoring application；Netra integrated chips
ARM-A8 and digital signal processor（DSP, Digital Signal Processor）.Netra chips in the industry cycle have compared with
Good code stream disposal ability, Netra chips are integrated in by the reading of high definition multichannel code stream, compression, display and control function
On, the demand of HD video can be met.But Nerta chips are operated under linux system, Nerta chips are opened first by software
Send out kit（SDK, Software Development Kit）SDK reads video code flow, specifically, calls SDK to take stream function
Read the video code flow from external equipment；Then Nerta chips carry out video code flow processing again.First SDK is said below
It is bright.
SDK refers to for setting up opening for application software for specific software kit, software frame, hardware platform, operating system etc.
The set of hair instrument, middle finger of the present invention is used for the SDK for carrying out video flowing reading.The video code flow of reading comes from external equipment, outside
Code stream processing equipment is sent to after the specific monitoring device as in video monitoring system of portion's equipment, monitoring device collection video code flow
Carry out code stream processing, including coding, decoding, transcoding etc..The monitoring that multiple different vendors are usually contained in video monitoring system is set
Standby, code stream processing equipment needs to carry out code stream processing to the monitoring device of multiple different vendors.Linux is a kind of free and open
The class Unix operating systems of source code, and the SDK that each manufacturer provides is developed under windows systems mostly, is caused a lot
SDK can not be run on Netra chips, and then can not successfully read the video code flow from different external equipments, make video codes
Stream process is limited.
Analyzed more than, employing mode one, Intel chips are operated under windows systems, can normal call SDK take
Stream function, reads the video code flow from external equipment, then carry out streaming video processing；But due to Intel chip processing capabilities
It is limited, it can not but meet demand.Although employing mode two, Netra chips have preferably disposal ability, but because operating in Linux
System, it is impossible to integrated SDK, causes that the video code flow from different external equipments can not be read, and makes video code flow processing limited.
To sum up, or the existing scheme for carrying out video code flow processing has the not enough defect of disposal ability, otherwise in the presence of because
It is unable to the limited defect of video code flow processing caused by compatible to SD K.
The content of the invention
The invention provides a kind of equipment for carrying out video code flow processing, the equipment can improve code stream disposal ability, again
The problem of video code flow processing is limited can be solved.
The invention provides a kind of method for carrying out video code flow processing, this method can improve code stream disposal ability, again
The problem of video code flow processing is limited can be solved.
A kind of equipment for carrying out video code flow processing, it is mutual that this method equipment includes Intel main control chips, expanding peripherals part
Connection standard PCI-E bridging chips and at least one piece Netra are from chip；
The Intel main control chips, read the video code flow from external equipment, configure from chip mapping space, it is determined that
Mapping space address, Netra corresponding with mapping space address is sent to from chip by video code flow by PCI-E bridging chips
Shared drive；
The PCI-E bridging chips, carry out Intel main control chips and Netra from the information exchange between chip；
The Netra reads video code flow from chip from shared drive, streaming video processing is carried out, by the code after processing
Stream is sent.
It is preferred that the Netra includes ARM-A8 and digital signal processor DSP from chip；
The Intel main control chips, before the video code flow from external equipment is read, also pass through the PCI-E bridges
Connect chip and receive the mapping space address information from the ARM-A8, by the PCI-E bridging chips to the ARM-A8
Feedback response message；
The ARM-A8, the Intel master controls are sent to by the PCI-E bridging chips by mapping space address information
Chip, and the feedback response message from the Intel main control chips is received by the PCI-E bridging chips, start described
DSP；
The DSP, reads video code flow from shared drive, and streaming video processing is carried out to it, by the code stream after processing
Send.
It is preferred that the DSP, reads video code flow from shared drive, it is decoded, encoded or transcoding processing,
Code stream after processing is sent.
It is preferred that the Intel main control chips, after the mapping space address information from the ARM-A8 is received,
Initiation parameter assignment is also sent to ARM-A8 by the PCI-E bridging chips.
It is preferred that the Intel main control chips, call SDK SDK to take stream function, reading is set from outside
Standby video code flow.
A kind of method for carrying out video code flow processing, this method includes：
Intel main control chips read the video code flow from external equipment；
Intel main control chips are configured from chip mapping space, determine mapping space address, video code flow is passed through into PCI-E
Bridging chip is sent to Netra corresponding with mapping space address from chip shared drive；
Netra reads video code flow from chip from shared drive, carries out streaming video processing；
Netra sends the code stream after processing from chip.
It is preferred that before the video code flow of the Intel main control chips reading from external equipment, this method also includes：
Mapping space address information is sent to Intel master controls by Netra from the ARM-A8 of chip by PCI-E bridging chips
Chip；
Intel main control chips by PCI-E bridging chips with receiving from Netra from the ARM-A8 of chip mapping space
After the information of location, the ARM-A8 feedback response messages by PCI-E bridging chips to Netra from chip；
Netra starts DSP after receiving feedback response message from the ARM-A8 of chip；
Netra reads video code flow from chip from shared drive, carries out streaming video processing, and the code stream after processing is sent
Go out, specifically include：DSP reads video code flow from shared drive, and streaming video processing is carried out to it, by the code stream after processing
Send.
Include it is preferred that the DSP carries out streaming video processing to the video code flow of reading：
DSP is decoded to the video code flow of reading, encoded or transcoding processing.
It is preferred that the Netra is sent mapping space address information by PCI-E bridging chips from the ARM-A8 of chip
Before Intel main control chips, this method includes：
Netra from the ARM-A8 of chip read type parameter in index value, judge index value whether be from chip identification,
If it is, mapping space address information is sent into Intel main control chips by PCI-E bridging chips described in performing；
Intel main control chips also assign initiation parameter after the mapping space address information from ARM-A8 is received
Value is sent to ARM-A8s of the Netra from chip by PCI-E bridging chips.
It is preferred that the Intel main control chips read the video code flow from external equipment, including：
Intel main control chips call SDK to take stream function, read and come from external equipment video code flow.
From such scheme as can be seen that in the present invention, carry out the equipment of video code flow processing include Intel main control chips,
PCI-E bridging chips and at least one piece Netra are from chip；Intel main control chips read the video code flow from external equipment；
Intel main control chips are configured from chip mapping space, determine mapping space address, video code flow is passed through into PCI-E bridging chips
Netra corresponding with mapping space address is sent to from chip shared drive；Netra reads video codes from chip from shared drive
Stream, carries out streaming video processing；Netra sends the code stream after processing from chip.The present invention uses Intel main control chips
Plus Netra realizes video code flow processing equipment from the mode of chip, Intel main control chips read video code flow.So, Intel
Main control chip is operated under windows systems, and the reading that SDK carries out video code flow can be normally run when needed；Also, fill
The disposal ability for dividing application Netra chips extremely strong, is handled the video code flow of reading.So as to both improve at code code stream
Reason ability, solves the problem of video code flow processing is limited again.
Brief description of the drawings
Fig. 1 carries out the device structure schematic diagram of video code flow processing for the present invention；
Fig. 2 carries out the method indicative flowchart of video code flow processing for the present invention；
Fig. 3 is main control chip of the present invention and starts the example flow diagram of communication from progress between chip.
Embodiment
For the object, technical solutions and advantages of the present invention are more clearly understood, with reference to embodiment and accompanying drawing, to this
Invention is further described.
The present invention adds Netra to realize video code flow processing equipment by the way of chip using Intel main control chips, by
Intel main control chips read video code flow, then the video code flow of reading is handled from chip with Netra；So,
Intel main control chips are operated under windows systems, and the reading that SDK carries out video code flow can be normally run when needed；And
And, the extremely strong disposal ability of Netra chips is fully applied, the video code flow of reading is handled.So as to both improve code code
Stream process ability, solves the problem of video code flow processing is limited again.
It is the device structure schematic diagram that the present invention carries out video code flow processing referring to Fig. 1, the equipment includes Intel master controls
Chip, expanding peripherals part interconnection standard（PCI-E, Peripheral Component Interconnect Express）Bridge
Chip and at least one piece Netra are met from chip, Fig. 1 is examples of 4 Netra from chip；
The Intel main control chips, read the video code flow from external equipment, configure from chip mapping space, it is determined that
Mapping space address, Netra corresponding with mapping space address is sent to from chip by video code flow by PCI-E bridging chips
Shared drive；
The PCI-E bridging chips, carry out Intel main control chips and Netra from the information exchange between chip；
The Netra reads video code flow from chip from shared drive, streaming video processing is carried out, by the code after processing
Stream is sent.
External equipment is the equipment of Intel main control chip carries, for example, passing through LAN（LAN, Local Area
Network）The carry equipment of connection, or, pass through Inter integrated circuits（I2C, Inter-Integrated Circuit）Always
The carry equipment of line connection.
Intel main control chips carry out overall control to video code flow processing, each Netra of Intel main control chip memory storages
From the mapping space address of chip, the communal spaces of the mapping space address correspondence Netra from chip；When needed, determine and reflect
Space address is penetrated, video code flow is sent to the corresponding communal space by PCI-E bridging chips, the mapping space determined
Corresponding location possibility is the part or all of communal spaces of the Netra from chip, it is also possible to correspond to two or more Netra from core
The part or all of communal space of piece.
Intel main control chips and Netra by PCI-E bridging chips between chip from information exchange is carried out, using PCI-E
Bus carries out information transfer；Specifically, the information from Intel main control chips is sent to Netra from chip, will come from
Netra is sent to Intel main control chips from the information of chip.
It is preferred that the Netra specifically includes ARM-A8 and DSP from chip；
The Intel main control chips, before the video code flow from external equipment is read, also pass through the PCI-E bridges
Connect chip and receive the mapping space address information from the ARM-A8, by the PCI-E bridging chips to the ARM-A8
Feedback response message；
The ARM-A8, the Intel master controls are sent to by the PCI-E bridging chips by mapping space address information
Chip, and the feedback response message from the Intel main control chips is received by the PCI-E bridging chips, start described
DSP；
The DSP, reads video code flow from shared drive, and streaming video processing is carried out to it, by the code stream after processing
Send.
The DSP processing of video code flow is included it is a variety of, such as decoding, coding or transcoding processing.
Intel main control chips are read before the video code flow from external equipment, and Intel main control chips and Netra are from core
Startup communication process will be carried out between piece, should during, Netra is from the ARM-A8 of chip by respective mapping space address information
Notify to give Intel main control chips.
It is preferred that the Intel main control chips, after the mapping space address information from the ARM-A8 is received,
Initiation parameter assignment is also sent to ARM-A8 by the PCI-E bridging chips.The initiation parameter is entered as Intel
Main control chip is notified to Netra in start-up course from the initiation parameter of chip, can be set as needed, such as including video
DSP total numbers, video formats that type, the equipment of code stream processing equipment are included etc.；Wherein video formats are that Netra enters from chip
Standard after the processing of row video code flow.
When Intel main control chips are read from external equipment video code flow, when needing operation SDK, from itself
Corresponding SDK is read in memory space, SDK is run, calls SDK to take stream function, reads and comes from external equipment video code flow.
The SDK stored in Intel main control chips, can be stored in itself memory space after appointed website acquisition in advance.When
So, the present invention program is applicable not only to need the situation with SDK, is also applied for other and never calls SDK taking stream function to be regarded
The situation that frequency code stream is read, such as reads the situation of video code flow using proprietary protocol or standard agreement from external equipment.
In the present invention, carrying out the equipment of video code flow processing includes Intel main control chips, PCI-E bridging chips and at least
One piece of Netra is from chip；Intel main control chips read the video code flow from external equipment；Intel main control chips are configured from core
Piece mapping space, determines mapping space address, and video code flow is sent to and mapping space address pair by PCI-E bridging chips
The Netra answered is from chip shared drive；Netra reads video code flow from chip from shared drive, carries out streaming video processing；
Netra sends the code stream after processing from chip.The present invention adds Netra by the way of chip using Intel main control chips
Video code flow processing equipment is realized, Intel main control chips read video code flow, and Netra is flowed into from chip to the video codes of reading
Row processing；So, Intel main control chips are operated under windows systems, and SDK can be normally run when needed and carries out video
The reading of code stream；Also, fully the extremely strong disposal ability of application Netra chips, is handled the video code flow of reading.From
And, code code stream disposal ability had both been improved, the problem of video code flow processing is limited is solved again.
It is the method indicative flowchart that the present invention carries out video code flow processing, it comprises the following steps referring to Fig. 2：
Step 201, Intel main control chips read the video code flow from external equipment.
Before this step, Intel main control chips will be driven initialization, and Intel main control chips and Netra are from chip
Between will carry out startup communication process, should during, Netra leads to respective mapping space address information from the ARM-A8 of chip
Know and give Intel main control chips.
Device power, Intel main control chips operation primary control program, primary control program is driven initialization, carries out DSP initial
The preparation of change；The driving initialization of Intel main control chips is similar with general Intel chip initiation processes, enters here
Row brief description；It is generally comprised：Device power, Intel main control chips reset to equipment, prevent equipment from can not operate；
The register address of Intel main control chip mapped devices；Uboot and equipment operational factor are downloaded, starts uboot operation,
Detect internal memory whether successful initialization；Download kernel；Download file system；Start kernel.It is driven after initialization,
Intel main control chips and Netra will carry out startup communication process between chip.
Below by Fig. 3, Intel main control chips and Netra are illustrated from startup communication is carried out between chip,
Intel main control chips and Netra pass through by PCI-E bridging chips progress transfer biography from the information exchange of chip in the flow
It is defeated, here for the ease of narration, not by the statement of PCI-E bridging chips on stream.In Fig. 3 flow, Intel main control chips fortune
Row Windows systems, Netra is performed from the operating process of chip by ARM-A8 therein, the application program in ARM-A8
For hicore, here, only operation hicore middle DSP initialization and DSP command process threads, DSP is started to realize.
Fig. 3 flow comprises the following steps：
Step 301, Intel main control chips and Netra read respective DSP index values from chip respectively（dspIdx）, such as
Fruit dspIdx is 0, then performs step 302, otherwise waits for the startup interruption since chip.
Intel main control chips and Netra store respective type parameter respectively from chip, to be shown to be main control chip
Or from chip；Type parameter is represented with DSP index values, in this example, if 0, then is shown to be main control chip, otherwise for from
Chip.After device power, Intel main control chips and Netra will read respective dspIdx from chip, carry out numerical value judgement；Tool
Body, what Netra started from chip first is that on ARM-A8, numerical value judgement is carried out by ARM-A8.
When needing operation SDK, this step is specifically included：Intel main control chips call SDK to take stream function, read
Fetch from external equipment video code flow.
Step 302, Netra sends startup from chip to Intel main control chips and interrupted.
Intel main control chips, which are received, to be started after interruption, is continued waiting for Netra and is sent mapping space address information from chip.
Here Intel main control chips and Netra are carried out from the first time time synchronized between chip：Netra from chip to
Intel main control chips send to start and interrupted, and represent to come into hicore DSP launching process from chip.
Step 303, Netra sends mapping space address information from chip to Intel main control chips.
Specifically, ARM-A8 maps DSP space address, DSP communal space address information is obtained, here by acquisition
Communal space address information is referred to as mapping space address information.
Step 304, initiation parameter assignment is sent to Netra from chip by Intel main control chips.
Intel main control chips are that DSP carries out initiation parameter assignment.
Step 305, Intel main control chips send initialization from chip to Netra and interrupted.
Here Intel main control chips and Netra are carried out from second of time synchronized between chip：Master chip is to from chip
Send the initialization completed on initiation parameter assignment to interrupt, expression has been set up DSP states mapping ground on master chip
Location and parameter assignment success.
Intel main control chips send initialization from chip to Netra and interrupted, to inform that Netra starts DSP from chip.
Step 306, the initialization that Netra receives Intel main control chips from chip is interrupted, and starts DSP.
Step 307, Netra sends initialization from chip to Intel main control chips and completes to interrupt.
Here Intel main control chips and Netra are carried out from the third time time synchronized between chip：Start from chip DSP
After completion, send and complete to interrupt on the initialization of DSP start completions.
Step 202, the configuration of Intel main control chips determines mapping space address, video codes is circulated from chip mapping space
Cross PCI-E bridging chips and be sent to Netra corresponding with mapping space address from chip shared drive.
Intel main control chip memory storages mapping space addresses of each Netra from chip, mapping space address correspondence
The communal spaces of the Netra from chip；When needed, mapping space address is determined, video code flow is passed through into PCI-E bridging chips
The corresponding communal space is sent to, the corresponding mapping space address possibility determined is shared skies of the Netra from chip
Between, it is also possible to the communal spaces of the correspondence two or more Netra from chip.
Step 203, Netra reads video code flow from chip from shared drive, carries out streaming video processing.
Processing to video code flow includes decoding, coding or transcoding etc..
Step 204, Netra sends the code stream after processing from chip.
Specifically, display wall is for example sent to be shown.
The foregoing is merely illustrative of the preferred embodiments of the present invention, is not intended to limit the invention, all essences in the present invention
God is with principle, and any modification, equivalent substitution and improvements done etc. should be included within the scope of protection of the invention.
Claims (10)
1. a kind of equipment for carrying out video code flow processing, it is characterised in that the equipment includes Intel main control chips, expanding peripherals
Part interconnection standard PCI-E bridging chips and at least one piece Netra are from chip；
The Intel main control chips, are operated under Windows systems, read the video code flow from external equipment, are configured from core
Piece mapping space, determines mapping space address, and video code flow is sent to and mapping space address pair by PCI-E bridging chips
The Netra answered is from chip shared drive；
The PCI-E bridging chips, carry out Intel main control chips and Netra from the information exchange between chip；
The Netra reads video code flow from chip from shared drive, carries out streaming video processing, and the code stream after processing is sent out
See off.
2. equipment as claimed in claim 1, it is characterised in that the Netra includes at ARM-A8 and data signal from chip
Manage device DSP；
The Intel main control chips, before the video code flow from external equipment is read, also bridge core by the PCI-E
Piece receives the mapping space address information from the ARM-A8, is fed back by the PCI-E bridging chips to the ARM-A8
Response message；
The ARM-A8, the Intel master controls core is sent to by the PCI-E bridging chips by mapping space address information
Piece, and the feedback response message from the Intel main control chips is received by the PCI-E bridging chips, start described
DSP；
The DSP, reads video code flow from shared drive, and streaming video processing is carried out to it, and the code stream after processing is sent
Go out.
3. equipment as claimed in claim 2, it is characterised in that the DSP, reads video code flow, to it from shared drive
Decoded, encoded or transcoding processing, the code stream after processing is sent.
4. equipment as claimed in claim 2, it is characterised in that the Intel main control chips, the ARM-A8 is come from receiving
Mapping space address information after, initiation parameter assignment is also sent to ARM-A8 by the PCI-E bridging chips.
5. the equipment as any one of Claims 1-4, it is characterised in that
The Intel main control chips, call SDK SDK to take stream function, read and come from external equipment video code flow.
6. a kind of method that video code flow processing is carried out based on equipment described in claim 1, it is characterised in that this method includes：
Intel main control chips are operated under Windows systems, read the video code flow from external equipment；
Intel main control chips are configured from chip mapping space, determine mapping space address, video code flow is bridged by PCI-E
Chip is sent to Netra corresponding with mapping space address from chip shared drive；
Netra reads video code flow from chip from shared drive, carries out streaming video processing；
Netra sends the code stream after processing from chip.
7. method as claimed in claim 6, it is characterised in that the Intel main control chips read the video codes from external equipment
Before stream, this method also includes：
Mapping space address information is sent to Intel master control cores by Netra from the ARM-A8 of chip by PCI-E bridging chips
Piece；
Intel main control chips are received by PCI-E bridging chips to be believed from Netra from the ARM-A8 of chip mapping space address
After breath, the ARM-A8 feedback response messages by PCI-E bridging chips to Netra from chip；
Netra starts DSP after receiving feedback response message from the ARM-A8 of chip；
Netra reads video code flow from chip from shared drive, carries out streaming video processing, the code stream after processing is sent out
Go, specifically include：DSP reads video code flow from shared drive, and streaming video processing is carried out to it, and the code stream after processing is sent out
See off.
8. method as claimed in claim 7, it is characterised in that the DSP carries out streaming video processing to the video code flow of reading and wrapped
Include：
DSP is decoded to the video code flow of reading, encoded or transcoding processing.
9. method as claimed in claim 7, it is characterised in that the Netra will by PCI-E bridging chips from the ARM-A8 of chip
Mapping space address information is sent to before Intel main control chips, and this method includes：
Netra from the ARM-A8 of chip read type parameter in index value, judge index value whether be from chip identification, if
It is that then execution is described is sent to Intel main control chips by PCI-E bridging chips by mapping space address information；
Intel main control chips also lead to initiation parameter assignment after the mapping space address information from ARM-A8 is received
Cross PCI-E bridging chips and be sent to ARM-A8s of the Netra from chip.
10. the method as any one of claim 6 to 9, it is characterised in that the Intel main control chips read and come from
The video code flow of external equipment, including：
Intel main control chips call SDK to take stream function, read and come from external equipment video code flow.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310456600.4A CN104519359B (en) | 2013-09-29 | 2013-09-29 | Carry out the device and method of video code flow processing |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310456600.4A CN104519359B (en) | 2013-09-29 | 2013-09-29 | Carry out the device and method of video code flow processing |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN104519359A CN104519359A (en) | 2015-04-15 |
| CN104519359B true CN104519359B (en) | 2017-09-22 |
Family
ID=52793985
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201310456600.4A Active CN104519359B (en) | 2013-09-29 | 2013-09-29 | Carry out the device and method of video code flow processing |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN104519359B (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP3644193A4 (en) * | 2018-08-23 | 2020-11-25 | Shenzhen Goodix Technology Co., Ltd. | Interrupt processing method, master chip, slave chip, and multi-chip system |
| CN114401418B (en) * | 2021-12-30 | 2023-09-12 | 北京北广科技股份有限公司 | Embedded audio and video server based on multiple ARM chip architectures |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1433207A (en) * | 2003-02-26 | 2003-07-30 | 北京艾尼通科技有限公司 | Video telephone conference system and its audio/video processing method |
| EP2228734A1 (en) * | 2009-03-10 | 2010-09-15 | Kabushiki Kaisha Toshiba | Portable electronic device and access control method in portable electronic device |
| CN102438127A (en) * | 2011-10-08 | 2012-05-02 | 杭州海康威视数字技术股份有限公司 | Monitoring device, monitoring system and monitoring method supporting hybrid access |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW439380B (en) * | 1995-10-09 | 2001-06-07 | Hitachi Ltd | Terminal apparatus |
-
2013
- 2013-09-29 CN CN201310456600.4A patent/CN104519359B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1433207A (en) * | 2003-02-26 | 2003-07-30 | 北京艾尼通科技有限公司 | Video telephone conference system and its audio/video processing method |
| EP2228734A1 (en) * | 2009-03-10 | 2010-09-15 | Kabushiki Kaisha Toshiba | Portable electronic device and access control method in portable electronic device |
| CN102438127A (en) * | 2011-10-08 | 2012-05-02 | 杭州海康威视数字技术股份有限公司 | Monitoring device, monitoring system and monitoring method supporting hybrid access |
Non-Patent Citations (1)
| Title |
|---|
| 管庆;朱海;王凯;宋金涛;袁高爽茜.基于TMS320DM8168的视频监控跟踪系统.《数据采集与处理》.2012,第27卷(第6期), * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN104519359A (en) | 2015-04-15 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR101364929B1 (en) | Apparatus and methods for improved sata device interaction without a sas expander | |
| US10635630B2 (en) | Flexible protocol and associated hardware for one-wire radio frequency front-end interface | |
| US10642778B2 (en) | Slave master-write/read datagram payload extension | |
| TWI614608B (en) | Apparatus, system and method for communication of touch sensor information | |
| TWI536257B (en) | Scalable input/output system and techniques | |
| WO2022227818A1 (en) | Method and apparatus for network configuration, and smart home device | |
| US10496562B1 (en) | Low latency virtual general purpose input/output over I3C | |
| US20070070042A1 (en) | Control system and method for controlling a keyboard-video-mouse (KVM) switch | |
| KR20170126904A (en) | Farewell reset and restart method for coexistence of legacy and next generation devices over a shared multi-mode bus | |
| CN108107827A (en) | A kind of SRIO control methods based on the soft core of ZYNQ platforms | |
| CN112698942B (en) | Artificial intelligence service system, master control device and slave control device | |
| CN114089713A (en) | Communication method based on UDS, ECU and upper computer | |
| CN104519359B (en) | Carry out the device and method of video code flow processing | |
| US20150207731A1 (en) | System and method of forwarding ipmi message packets based on logical unit number (lun) | |
| CN107996026A (en) | Multiple operating system multimedia coding-decoding method, device and electronic equipment | |
| WO2016119623A1 (en) | Method and device for realizing network sharing | |
| US10402365B2 (en) | Data lane validation procedure for multilane protocols | |
| CN111736792A (en) | Programmable logic device, control method and control system thereof and video processor | |
| JP2010532540A (en) | Token protocol | |
| CN100391150C (en) | Data transfer device and data transfer method of virtual ether net device | |
| CN110162499A (en) | A kind of PECI bus switch device, method and system | |
| WO2023155363A1 (en) | Server dynamic hot backup method, apparatus and device, and storage medium | |
| US20200097434A1 (en) | Enhanced high data rate technique for i3c | |
| CN106506617B (en) | Data compression method and equipment | |
| CN113259395B (en) | Data communication device and method in embedded environment |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |